MipsMSAInstrInfo.td revision c879eabcc25c4099a50939ed0bca86471201b183
1//===- MipsMSAInstrInfo.td - MSA ASE instructions -*- tablegen ------------*-=// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file describes Mips MSA ASE instructions. 11// 12//===----------------------------------------------------------------------===// 13 14def SDT_MipsVecCond : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisVec<1>]>; 15def SDT_VSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>, 16 SDTCisInt<1>, 17 SDTCisSameAs<1, 2>, 18 SDTCisVT<3, OtherVT>]>; 19def SDT_VFSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>, 20 SDTCisFP<1>, 21 SDTCisSameAs<1, 2>, 22 SDTCisVT<3, OtherVT>]>; 23def SDT_VSHF : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisVec<0>, 24 SDTCisInt<1>, SDTCisVec<1>, 25 SDTCisSameAs<0, 2>, SDTCisSameAs<2, 3>]>; 26def SDT_SHF : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>, 27 SDTCisVT<1, i32>, SDTCisSameAs<0, 2>]>; 28def SDT_ILV : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>, 29 SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>]>; 30 31def MipsVAllNonZero : SDNode<"MipsISD::VALL_NONZERO", SDT_MipsVecCond>; 32def MipsVAnyNonZero : SDNode<"MipsISD::VANY_NONZERO", SDT_MipsVecCond>; 33def MipsVAllZero : SDNode<"MipsISD::VALL_ZERO", SDT_MipsVecCond>; 34def MipsVAnyZero : SDNode<"MipsISD::VANY_ZERO", SDT_MipsVecCond>; 35def MipsVSMax : SDNode<"MipsISD::VSMAX", SDTIntBinOp, 36 [SDNPCommutative, SDNPAssociative]>; 37def MipsVSMin : SDNode<"MipsISD::VSMIN", SDTIntBinOp, 38 [SDNPCommutative, SDNPAssociative]>; 39def MipsVUMax : SDNode<"MipsISD::VUMAX", SDTIntBinOp, 40 [SDNPCommutative, SDNPAssociative]>; 41def MipsVUMin : SDNode<"MipsISD::VUMIN", SDTIntBinOp, 42 [SDNPCommutative, SDNPAssociative]>; 43def MipsVNOR : SDNode<"MipsISD::VNOR", SDTIntBinOp, 44 [SDNPCommutative, SDNPAssociative]>; 45def MipsVSHF : SDNode<"MipsISD::VSHF", SDT_VSHF>; 46def MipsSHF : SDNode<"MipsISD::SHF", SDT_SHF>; 47def MipsILVEV : SDNode<"MipsISD::ILVEV", SDT_ILV>; 48def MipsILVOD : SDNode<"MipsISD::ILVOD", SDT_ILV>; 49def MipsILVL : SDNode<"MipsISD::ILVL", SDT_ILV>; 50def MipsILVR : SDNode<"MipsISD::ILVR", SDT_ILV>; 51def MipsPCKEV : SDNode<"MipsISD::PCKEV", SDT_ILV>; 52def MipsPCKOD : SDNode<"MipsISD::PCKOD", SDT_ILV>; 53 54def vsetcc : SDNode<"ISD::SETCC", SDT_VSetCC>; 55def vfsetcc : SDNode<"ISD::SETCC", SDT_VFSetCC>; 56 57def MipsVExtractSExt : SDNode<"MipsISD::VEXTRACT_SEXT_ELT", 58 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 59def MipsVExtractZExt : SDNode<"MipsISD::VEXTRACT_ZEXT_ELT", 60 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 61 62// Operands 63 64def uimm3 : Operand<i32> { 65 let PrintMethod = "printUnsignedImm"; 66} 67 68def uimm4 : Operand<i32> { 69 let PrintMethod = "printUnsignedImm"; 70} 71 72def uimm8 : Operand<i32> { 73 let PrintMethod = "printUnsignedImm"; 74} 75 76def simm5 : Operand<i32>; 77 78def simm10 : Operand<i32>; 79 80def vsplat_uimm1 : Operand<vAny> { 81 let PrintMethod = "printUnsignedImm8"; 82} 83 84def vsplat_uimm2 : Operand<vAny> { 85 let PrintMethod = "printUnsignedImm8"; 86} 87 88def vsplat_uimm3 : Operand<vAny> { 89 let PrintMethod = "printUnsignedImm"; 90} 91 92def vsplat_uimm4 : Operand<vAny> { 93 let PrintMethod = "printUnsignedImm"; 94} 95 96def vsplat_uimm5 : Operand<vAny> { 97 let PrintMethod = "printUnsignedImm"; 98} 99 100def vsplat_uimm6 : Operand<vAny> { 101 let PrintMethod = "printUnsignedImm"; 102} 103 104def vsplat_uimm8 : Operand<vAny> { 105 let PrintMethod = "printUnsignedImm"; 106} 107 108def vsplat_simm5 : Operand<vAny>; 109 110def vsplat_simm10 : Operand<vAny>; 111 112// Pattern fragments 113def vextract_sext_i8 : PatFrag<(ops node:$vec, node:$idx), 114 (MipsVExtractSExt node:$vec, node:$idx, i8)>; 115def vextract_sext_i16 : PatFrag<(ops node:$vec, node:$idx), 116 (MipsVExtractSExt node:$vec, node:$idx, i16)>; 117def vextract_sext_i32 : PatFrag<(ops node:$vec, node:$idx), 118 (MipsVExtractSExt node:$vec, node:$idx, i32)>; 119 120def vextract_zext_i8 : PatFrag<(ops node:$vec, node:$idx), 121 (MipsVExtractZExt node:$vec, node:$idx, i8)>; 122def vextract_zext_i16 : PatFrag<(ops node:$vec, node:$idx), 123 (MipsVExtractZExt node:$vec, node:$idx, i16)>; 124def vextract_zext_i32 : PatFrag<(ops node:$vec, node:$idx), 125 (MipsVExtractZExt node:$vec, node:$idx, i32)>; 126 127def vinsert_v16i8 : PatFrag<(ops node:$vec, node:$val, node:$idx), 128 (v16i8 (vector_insert node:$vec, node:$val, node:$idx))>; 129def vinsert_v8i16 : PatFrag<(ops node:$vec, node:$val, node:$idx), 130 (v8i16 (vector_insert node:$vec, node:$val, node:$idx))>; 131def vinsert_v4i32 : PatFrag<(ops node:$vec, node:$val, node:$idx), 132 (v4i32 (vector_insert node:$vec, node:$val, node:$idx))>; 133 134class vfsetcc_type<ValueType ResTy, ValueType OpTy, CondCode CC> : 135 PatFrag<(ops node:$lhs, node:$rhs), 136 (ResTy (vfsetcc (OpTy node:$lhs), (OpTy node:$rhs), CC))>; 137 138// ISD::SETFALSE cannot occur 139def vfsetoeq_v4f32 : vfsetcc_type<v4i32, v4f32, SETOEQ>; 140def vfsetoeq_v2f64 : vfsetcc_type<v2i64, v2f64, SETOEQ>; 141def vfsetoge_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGE>; 142def vfsetoge_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGE>; 143def vfsetogt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGT>; 144def vfsetogt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGT>; 145def vfsetole_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLE>; 146def vfsetole_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLE>; 147def vfsetolt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLT>; 148def vfsetolt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLT>; 149def vfsetone_v4f32 : vfsetcc_type<v4i32, v4f32, SETONE>; 150def vfsetone_v2f64 : vfsetcc_type<v2i64, v2f64, SETONE>; 151def vfsetord_v4f32 : vfsetcc_type<v4i32, v4f32, SETO>; 152def vfsetord_v2f64 : vfsetcc_type<v2i64, v2f64, SETO>; 153def vfsetun_v4f32 : vfsetcc_type<v4i32, v4f32, SETUO>; 154def vfsetun_v2f64 : vfsetcc_type<v2i64, v2f64, SETUO>; 155def vfsetueq_v4f32 : vfsetcc_type<v4i32, v4f32, SETUEQ>; 156def vfsetueq_v2f64 : vfsetcc_type<v2i64, v2f64, SETUEQ>; 157def vfsetuge_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGE>; 158def vfsetuge_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGE>; 159def vfsetugt_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGT>; 160def vfsetugt_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGT>; 161def vfsetule_v4f32 : vfsetcc_type<v4i32, v4f32, SETULE>; 162def vfsetule_v2f64 : vfsetcc_type<v2i64, v2f64, SETULE>; 163def vfsetult_v4f32 : vfsetcc_type<v4i32, v4f32, SETULT>; 164def vfsetult_v2f64 : vfsetcc_type<v2i64, v2f64, SETULT>; 165def vfsetune_v4f32 : vfsetcc_type<v4i32, v4f32, SETUNE>; 166def vfsetune_v2f64 : vfsetcc_type<v2i64, v2f64, SETUNE>; 167// ISD::SETTRUE cannot occur 168// ISD::SETFALSE2 cannot occur 169// ISD::SETTRUE2 cannot occur 170 171class vsetcc_type<ValueType ResTy, CondCode CC> : 172 PatFrag<(ops node:$lhs, node:$rhs), 173 (ResTy (vsetcc node:$lhs, node:$rhs, CC))>; 174 175def vseteq_v16i8 : vsetcc_type<v16i8, SETEQ>; 176def vseteq_v8i16 : vsetcc_type<v8i16, SETEQ>; 177def vseteq_v4i32 : vsetcc_type<v4i32, SETEQ>; 178def vseteq_v2i64 : vsetcc_type<v2i64, SETEQ>; 179def vsetle_v16i8 : vsetcc_type<v16i8, SETLE>; 180def vsetle_v8i16 : vsetcc_type<v8i16, SETLE>; 181def vsetle_v4i32 : vsetcc_type<v4i32, SETLE>; 182def vsetle_v2i64 : vsetcc_type<v2i64, SETLE>; 183def vsetlt_v16i8 : vsetcc_type<v16i8, SETLT>; 184def vsetlt_v8i16 : vsetcc_type<v8i16, SETLT>; 185def vsetlt_v4i32 : vsetcc_type<v4i32, SETLT>; 186def vsetlt_v2i64 : vsetcc_type<v2i64, SETLT>; 187def vsetule_v16i8 : vsetcc_type<v16i8, SETULE>; 188def vsetule_v8i16 : vsetcc_type<v8i16, SETULE>; 189def vsetule_v4i32 : vsetcc_type<v4i32, SETULE>; 190def vsetule_v2i64 : vsetcc_type<v2i64, SETULE>; 191def vsetult_v16i8 : vsetcc_type<v16i8, SETULT>; 192def vsetult_v8i16 : vsetcc_type<v8i16, SETULT>; 193def vsetult_v4i32 : vsetcc_type<v4i32, SETULT>; 194def vsetult_v2i64 : vsetcc_type<v2i64, SETULT>; 195 196def vsplati8 : PatFrag<(ops node:$e0), 197 (v16i8 (build_vector node:$e0, node:$e0, 198 node:$e0, node:$e0, 199 node:$e0, node:$e0, 200 node:$e0, node:$e0, 201 node:$e0, node:$e0, 202 node:$e0, node:$e0, 203 node:$e0, node:$e0, 204 node:$e0, node:$e0))>; 205def vsplati16 : PatFrag<(ops node:$e0), 206 (v8i16 (build_vector node:$e0, node:$e0, 207 node:$e0, node:$e0, 208 node:$e0, node:$e0, 209 node:$e0, node:$e0))>; 210def vsplati32 : PatFrag<(ops node:$e0), 211 (v4i32 (build_vector node:$e0, node:$e0, 212 node:$e0, node:$e0))>; 213def vsplati64 : PatFrag<(ops node:$e0), 214 (v2i64 (build_vector:$v0 node:$e0, node:$e0))>; 215 216class SplatPatLeaf<Operand opclass, dag frag, code pred = [{}], 217 SDNodeXForm xform = NOOP_SDNodeXForm> 218 : PatLeaf<frag, pred, xform> { 219 Operand OpClass = opclass; 220} 221 222class SplatComplexPattern<Operand opclass, ValueType ty, int numops, string fn, 223 list<SDNode> roots = [], 224 list<SDNodeProperty> props = []> : 225 ComplexPattern<ty, numops, fn, roots, props> { 226 Operand OpClass = opclass; 227} 228 229def vsplati8_uimm3 : SplatComplexPattern<vsplat_uimm3, v16i8, 1, 230 "selectVSplatUimm3", 231 [build_vector, bitconvert]>; 232 233def vsplati8_uimm4 : SplatComplexPattern<vsplat_uimm4, v16i8, 1, 234 "selectVSplatUimm4", 235 [build_vector, bitconvert]>; 236 237def vsplati8_uimm5 : SplatComplexPattern<vsplat_uimm5, v16i8, 1, 238 "selectVSplatUimm5", 239 [build_vector, bitconvert]>; 240 241def vsplati8_uimm8 : SplatComplexPattern<vsplat_uimm8, v16i8, 1, 242 "selectVSplatUimm8", 243 [build_vector, bitconvert]>; 244 245def vsplati8_simm5 : SplatComplexPattern<vsplat_simm5, v16i8, 1, 246 "selectVSplatSimm5", 247 [build_vector, bitconvert]>; 248 249def vsplati16_uimm3 : SplatComplexPattern<vsplat_uimm3, v8i16, 1, 250 "selectVSplatUimm3", 251 [build_vector, bitconvert]>; 252 253def vsplati16_uimm4 : SplatComplexPattern<vsplat_uimm4, v8i16, 1, 254 "selectVSplatUimm4", 255 [build_vector, bitconvert]>; 256 257def vsplati16_uimm5 : SplatComplexPattern<vsplat_uimm5, v8i16, 1, 258 "selectVSplatUimm5", 259 [build_vector, bitconvert]>; 260 261def vsplati16_simm5 : SplatComplexPattern<vsplat_simm5, v8i16, 1, 262 "selectVSplatSimm5", 263 [build_vector, bitconvert]>; 264 265def vsplati32_uimm2 : SplatComplexPattern<vsplat_uimm2, v4i32, 1, 266 "selectVSplatUimm2", 267 [build_vector, bitconvert]>; 268 269def vsplati32_uimm5 : SplatComplexPattern<vsplat_uimm5, v4i32, 1, 270 "selectVSplatUimm5", 271 [build_vector, bitconvert]>; 272 273def vsplati32_simm5 : SplatComplexPattern<vsplat_simm5, v4i32, 1, 274 "selectVSplatSimm5", 275 [build_vector, bitconvert]>; 276 277def vsplati64_uimm1 : SplatComplexPattern<vsplat_uimm1, v2i64, 1, 278 "selectVSplatUimm1", 279 [build_vector, bitconvert]>; 280 281def vsplati64_uimm5 : SplatComplexPattern<vsplat_uimm5, v2i64, 1, 282 "selectVSplatUimm5", 283 [build_vector, bitconvert]>; 284 285def vsplati64_uimm6 : SplatComplexPattern<vsplat_uimm6, v2i64, 1, 286 "selectVSplatUimm6", 287 [build_vector, bitconvert]>; 288 289def vsplati64_simm5 : SplatComplexPattern<vsplat_simm5, v2i64, 1, 290 "selectVSplatSimm5", 291 [build_vector, bitconvert]>; 292 293// Any build_vector that is a constant splat with a value that is an exact 294// power of 2 295def vsplat_uimm_pow2 : ComplexPattern<vAny, 1, "selectVSplatUimmPow2", 296 [build_vector, bitconvert]>; 297 298// Immediates 299def immSExt5 : ImmLeaf<i32, [{return isInt<5>(Imm);}]>; 300def immSExt10: ImmLeaf<i32, [{return isInt<10>(Imm);}]>; 301 302// Instruction encoding. 303class ADD_A_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010000>; 304class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>; 305class ADD_A_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010000>; 306class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>; 307 308class ADDS_A_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010000>; 309class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>; 310class ADDS_A_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010000>; 311class ADDS_A_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010000>; 312 313class ADDS_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010000>; 314class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>; 315class ADDS_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010000>; 316class ADDS_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010000>; 317 318class ADDS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010000>; 319class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>; 320class ADDS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010000>; 321class ADDS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010000>; 322 323class ADDV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001110>; 324class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>; 325class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>; 326class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>; 327 328class ADDVI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000110>; 329class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>; 330class ADDVI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000110>; 331class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>; 332 333class AND_V_ENC : MSA_VEC_FMT<0b00000, 0b011110>; 334 335class ANDI_B_ENC : MSA_I8_FMT<0b00, 0b000000>; 336 337class ASUB_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010001>; 338class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>; 339class ASUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010001>; 340class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>; 341 342class ASUB_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010001>; 343class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>; 344class ASUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010001>; 345class ASUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010001>; 346 347class AVE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010000>; 348class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>; 349class AVE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010000>; 350class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>; 351 352class AVE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010000>; 353class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>; 354class AVE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010000>; 355class AVE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010000>; 356 357class AVER_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010000>; 358class AVER_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010000>; 359class AVER_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010000>; 360class AVER_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010000>; 361 362class AVER_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010000>; 363class AVER_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010000>; 364class AVER_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010000>; 365class AVER_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010000>; 366 367class BCLR_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001101>; 368class BCLR_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001101>; 369class BCLR_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001101>; 370class BCLR_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001101>; 371 372class BCLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001001>; 373class BCLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001001>; 374class BCLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001001>; 375class BCLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001001>; 376 377class BINSL_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001101>; 378class BINSL_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001101>; 379class BINSL_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001101>; 380class BINSL_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001101>; 381 382class BINSLI_B_ENC : MSA_BIT_B_FMT<0b110, 0b001001>; 383class BINSLI_H_ENC : MSA_BIT_H_FMT<0b110, 0b001001>; 384class BINSLI_W_ENC : MSA_BIT_W_FMT<0b110, 0b001001>; 385class BINSLI_D_ENC : MSA_BIT_D_FMT<0b110, 0b001001>; 386 387class BINSR_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001101>; 388class BINSR_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001101>; 389class BINSR_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001101>; 390class BINSR_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001101>; 391 392class BINSRI_B_ENC : MSA_BIT_B_FMT<0b111, 0b001001>; 393class BINSRI_H_ENC : MSA_BIT_H_FMT<0b111, 0b001001>; 394class BINSRI_W_ENC : MSA_BIT_W_FMT<0b111, 0b001001>; 395class BINSRI_D_ENC : MSA_BIT_D_FMT<0b111, 0b001001>; 396 397class BMNZ_V_ENC : MSA_VEC_FMT<0b00100, 0b011110>; 398 399class BMNZI_B_ENC : MSA_I8_FMT<0b00, 0b000001>; 400 401class BMZ_V_ENC : MSA_VEC_FMT<0b00101, 0b011110>; 402 403class BMZI_B_ENC : MSA_I8_FMT<0b01, 0b000001>; 404 405class BNEG_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001101>; 406class BNEG_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001101>; 407class BNEG_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001101>; 408class BNEG_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001101>; 409 410class BNEGI_B_ENC : MSA_BIT_B_FMT<0b101, 0b001001>; 411class BNEGI_H_ENC : MSA_BIT_H_FMT<0b101, 0b001001>; 412class BNEGI_W_ENC : MSA_BIT_W_FMT<0b101, 0b001001>; 413class BNEGI_D_ENC : MSA_BIT_D_FMT<0b101, 0b001001>; 414 415class BNZ_B_ENC : MSA_I10_FMT<0b000, 0b00, 0b001100>; 416class BNZ_H_ENC : MSA_I10_FMT<0b000, 0b01, 0b001100>; 417class BNZ_W_ENC : MSA_I10_FMT<0b000, 0b10, 0b001100>; 418class BNZ_D_ENC : MSA_I10_FMT<0b000, 0b11, 0b001100>; 419 420class BNZ_V_ENC : MSA_VEC_FMT<0b01000, 0b011110>; 421 422class BSEL_V_ENC : MSA_VECS10_FMT<0b00110, 0b011110>; 423 424class BSELI_B_ENC : MSA_I8_FMT<0b10, 0b000001>; 425 426class BSET_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001101>; 427class BSET_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001101>; 428class BSET_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001101>; 429class BSET_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001101>; 430 431class BSETI_B_ENC : MSA_BIT_B_FMT<0b100, 0b001001>; 432class BSETI_H_ENC : MSA_BIT_H_FMT<0b100, 0b001001>; 433class BSETI_W_ENC : MSA_BIT_W_FMT<0b100, 0b001001>; 434class BSETI_D_ENC : MSA_BIT_D_FMT<0b100, 0b001001>; 435 436class BZ_B_ENC : MSA_I10_FMT<0b001, 0b00, 0b001100>; 437class BZ_H_ENC : MSA_I10_FMT<0b001, 0b01, 0b001100>; 438class BZ_W_ENC : MSA_I10_FMT<0b001, 0b10, 0b001100>; 439class BZ_D_ENC : MSA_I10_FMT<0b001, 0b11, 0b001100>; 440 441class BZ_V_ENC : MSA_VECS10_FMT<0b01001, 0b011110>; 442 443class CEQ_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001111>; 444class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>; 445class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>; 446class CEQ_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001111>; 447 448class CEQI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000111>; 449class CEQI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000111>; 450class CEQI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000111>; 451class CEQI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000111>; 452 453class CFCMSA_ENC : MSA_ELM_FMT<0b0001111110, 0b011001>; 454 455class CLE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001111>; 456class CLE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001111>; 457class CLE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001111>; 458class CLE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001111>; 459 460class CLE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001111>; 461class CLE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001111>; 462class CLE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001111>; 463class CLE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001111>; 464 465class CLEI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000111>; 466class CLEI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000111>; 467class CLEI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000111>; 468class CLEI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000111>; 469 470class CLEI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000111>; 471class CLEI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000111>; 472class CLEI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000111>; 473class CLEI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000111>; 474 475class CLT_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001111>; 476class CLT_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001111>; 477class CLT_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001111>; 478class CLT_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001111>; 479 480class CLT_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001111>; 481class CLT_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001111>; 482class CLT_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001111>; 483class CLT_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001111>; 484 485class CLTI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000111>; 486class CLTI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000111>; 487class CLTI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000111>; 488class CLTI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000111>; 489 490class CLTI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000111>; 491class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>; 492class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>; 493class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>; 494 495class COPY_S_B_ENC : MSA_ELM_B_FMT<0b0010, 0b011001>; 496class COPY_S_H_ENC : MSA_ELM_H_FMT<0b0010, 0b011001>; 497class COPY_S_W_ENC : MSA_ELM_W_FMT<0b0010, 0b011001>; 498 499class COPY_U_B_ENC : MSA_ELM_B_FMT<0b0011, 0b011001>; 500class COPY_U_H_ENC : MSA_ELM_H_FMT<0b0011, 0b011001>; 501class COPY_U_W_ENC : MSA_ELM_W_FMT<0b0011, 0b011001>; 502 503class CTCMSA_ENC : MSA_ELM_FMT<0b0000111110, 0b011001>; 504 505class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>; 506class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>; 507class DIV_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010010>; 508class DIV_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010010>; 509 510class DIV_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010010>; 511class DIV_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010010>; 512class DIV_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010010>; 513class DIV_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010010>; 514 515class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>; 516class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>; 517class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>; 518 519class DOTP_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010011>; 520class DOTP_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010011>; 521class DOTP_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010011>; 522 523class DPADD_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010011>; 524class DPADD_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010011>; 525class DPADD_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010011>; 526 527class DPADD_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010011>; 528class DPADD_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010011>; 529class DPADD_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010011>; 530 531class DPSUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010011>; 532class DPSUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010011>; 533class DPSUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010011>; 534 535class DPSUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010011>; 536class DPSUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010011>; 537class DPSUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010011>; 538 539class FADD_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011011>; 540class FADD_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011011>; 541 542class FCAF_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011010>; 543class FCAF_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011010>; 544 545class FCEQ_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011010>; 546class FCEQ_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011010>; 547 548class FCLASS_W_ENC : MSA_2RF_FMT<0b110010000, 0b0, 0b011110>; 549class FCLASS_D_ENC : MSA_2RF_FMT<0b110010000, 0b1, 0b011110>; 550 551class FCLE_W_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011010>; 552class FCLE_D_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011010>; 553 554class FCLT_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011010>; 555class FCLT_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011010>; 556 557class FCNE_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011100>; 558class FCNE_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011100>; 559 560class FCOR_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011100>; 561class FCOR_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011100>; 562 563class FCUEQ_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011010>; 564class FCUEQ_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011010>; 565 566class FCULE_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011010>; 567class FCULE_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011010>; 568 569class FCULT_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011010>; 570class FCULT_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011010>; 571 572class FCUN_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011010>; 573class FCUN_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011010>; 574 575class FCUNE_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011100>; 576class FCUNE_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011100>; 577 578class FDIV_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011011>; 579class FDIV_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011011>; 580 581class FEXDO_H_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011011>; 582class FEXDO_W_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011011>; 583 584class FEXP2_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011011>; 585class FEXP2_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011011>; 586 587class FEXUPL_W_ENC : MSA_2RF_FMT<0b110011000, 0b0, 0b011110>; 588class FEXUPL_D_ENC : MSA_2RF_FMT<0b110011000, 0b1, 0b011110>; 589 590class FEXUPR_W_ENC : MSA_2RF_FMT<0b110011001, 0b0, 0b011110>; 591class FEXUPR_D_ENC : MSA_2RF_FMT<0b110011001, 0b1, 0b011110>; 592 593class FFINT_S_W_ENC : MSA_2RF_FMT<0b110011110, 0b0, 0b011110>; 594class FFINT_S_D_ENC : MSA_2RF_FMT<0b110011110, 0b1, 0b011110>; 595 596class FFINT_U_W_ENC : MSA_2RF_FMT<0b110011111, 0b0, 0b011110>; 597class FFINT_U_D_ENC : MSA_2RF_FMT<0b110011111, 0b1, 0b011110>; 598 599class FFQL_W_ENC : MSA_2RF_FMT<0b110011010, 0b0, 0b011110>; 600class FFQL_D_ENC : MSA_2RF_FMT<0b110011010, 0b1, 0b011110>; 601 602class FFQR_W_ENC : MSA_2RF_FMT<0b110011011, 0b0, 0b011110>; 603class FFQR_D_ENC : MSA_2RF_FMT<0b110011011, 0b1, 0b011110>; 604 605class FILL_B_ENC : MSA_2R_FILL_FMT<0b11000000, 0b00, 0b011110>; 606class FILL_H_ENC : MSA_2R_FILL_FMT<0b11000000, 0b01, 0b011110>; 607class FILL_W_ENC : MSA_2R_FILL_FMT<0b11000000, 0b10, 0b011110>; 608 609class FLOG2_W_ENC : MSA_2RF_FMT<0b110010111, 0b0, 0b011110>; 610class FLOG2_D_ENC : MSA_2RF_FMT<0b110010111, 0b1, 0b011110>; 611 612class FMADD_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011011>; 613class FMADD_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011011>; 614 615class FMAX_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011011>; 616class FMAX_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011011>; 617 618class FMAX_A_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011011>; 619class FMAX_A_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011011>; 620 621class FMIN_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011011>; 622class FMIN_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011011>; 623 624class FMIN_A_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011011>; 625class FMIN_A_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011011>; 626 627class FMSUB_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011011>; 628class FMSUB_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011011>; 629 630class FMUL_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011011>; 631class FMUL_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011011>; 632 633class FRINT_W_ENC : MSA_2RF_FMT<0b110010110, 0b0, 0b011110>; 634class FRINT_D_ENC : MSA_2RF_FMT<0b110010110, 0b1, 0b011110>; 635 636class FRCP_W_ENC : MSA_2RF_FMT<0b110010101, 0b0, 0b011110>; 637class FRCP_D_ENC : MSA_2RF_FMT<0b110010101, 0b1, 0b011110>; 638 639class FRSQRT_W_ENC : MSA_2RF_FMT<0b110010100, 0b0, 0b011110>; 640class FRSQRT_D_ENC : MSA_2RF_FMT<0b110010100, 0b1, 0b011110>; 641 642class FSAF_W_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011010>; 643class FSAF_D_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011010>; 644 645class FSEQ_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011010>; 646class FSEQ_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011010>; 647 648class FSLE_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011010>; 649class FSLE_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011010>; 650 651class FSLT_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011010>; 652class FSLT_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011010>; 653 654class FSNE_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011100>; 655class FSNE_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011100>; 656 657class FSOR_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011100>; 658class FSOR_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011100>; 659 660class FSQRT_W_ENC : MSA_2RF_FMT<0b110010011, 0b0, 0b011110>; 661class FSQRT_D_ENC : MSA_2RF_FMT<0b110010011, 0b1, 0b011110>; 662 663class FSUB_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011011>; 664class FSUB_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011011>; 665 666class FSUEQ_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011010>; 667class FSUEQ_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011010>; 668 669class FSULE_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011010>; 670class FSULE_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011010>; 671 672class FSULT_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011010>; 673class FSULT_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011010>; 674 675class FSUN_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011010>; 676class FSUN_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011010>; 677 678class FSUNE_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011100>; 679class FSUNE_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011100>; 680 681class FTRUNC_S_W_ENC : MSA_2RF_FMT<0b110010001, 0b0, 0b011110>; 682class FTRUNC_S_D_ENC : MSA_2RF_FMT<0b110010001, 0b1, 0b011110>; 683 684class FTRUNC_U_W_ENC : MSA_2RF_FMT<0b110010010, 0b0, 0b011110>; 685class FTRUNC_U_D_ENC : MSA_2RF_FMT<0b110010010, 0b1, 0b011110>; 686 687class FTINT_S_W_ENC : MSA_2RF_FMT<0b110011100, 0b0, 0b011110>; 688class FTINT_S_D_ENC : MSA_2RF_FMT<0b110011100, 0b1, 0b011110>; 689 690class FTINT_U_W_ENC : MSA_2RF_FMT<0b110011101, 0b0, 0b011110>; 691class FTINT_U_D_ENC : MSA_2RF_FMT<0b110011101, 0b1, 0b011110>; 692 693class FTQ_H_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011011>; 694class FTQ_W_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011011>; 695 696class HADD_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010101>; 697class HADD_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010101>; 698class HADD_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010101>; 699 700class HADD_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010101>; 701class HADD_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010101>; 702class HADD_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010101>; 703 704class HSUB_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010101>; 705class HSUB_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010101>; 706class HSUB_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010101>; 707 708class HSUB_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010101>; 709class HSUB_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010101>; 710class HSUB_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010101>; 711 712class ILVEV_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010100>; 713class ILVEV_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010100>; 714class ILVEV_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010100>; 715class ILVEV_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010100>; 716 717class ILVL_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010100>; 718class ILVL_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010100>; 719class ILVL_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010100>; 720class ILVL_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010100>; 721 722class ILVOD_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010100>; 723class ILVOD_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010100>; 724class ILVOD_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010100>; 725class ILVOD_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010100>; 726 727class ILVR_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010100>; 728class ILVR_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010100>; 729class ILVR_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010100>; 730class ILVR_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010100>; 731 732class INSERT_B_ENC : MSA_ELM_B_FMT<0b0100, 0b011001>; 733class INSERT_H_ENC : MSA_ELM_H_FMT<0b0100, 0b011001>; 734class INSERT_W_ENC : MSA_ELM_W_FMT<0b0100, 0b011001>; 735 736class INSVE_B_ENC : MSA_ELM_B_FMT<0b0101, 0b011001>; 737class INSVE_H_ENC : MSA_ELM_H_FMT<0b0101, 0b011001>; 738class INSVE_W_ENC : MSA_ELM_W_FMT<0b0101, 0b011001>; 739class INSVE_D_ENC : MSA_ELM_D_FMT<0b0101, 0b011001>; 740 741class LD_B_ENC : MSA_I5_FMT<0b110, 0b00, 0b000111>; 742class LD_H_ENC : MSA_I5_FMT<0b110, 0b01, 0b000111>; 743class LD_W_ENC : MSA_I5_FMT<0b110, 0b10, 0b000111>; 744class LD_D_ENC : MSA_I5_FMT<0b110, 0b11, 0b000111>; 745 746class LDI_B_ENC : MSA_I10_FMT<0b010, 0b00, 0b001100>; 747class LDI_H_ENC : MSA_I10_FMT<0b010, 0b01, 0b001100>; 748class LDI_W_ENC : MSA_I10_FMT<0b010, 0b10, 0b001100>; 749class LDI_D_ENC : MSA_I10_FMT<0b010, 0b11, 0b001100>; 750 751class LDX_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001111>; 752class LDX_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001111>; 753class LDX_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001111>; 754class LDX_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001111>; 755 756class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>; 757class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>; 758 759class MADDR_Q_H_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011100>; 760class MADDR_Q_W_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011100>; 761 762class MADDV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010010>; 763class MADDV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010010>; 764class MADDV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010010>; 765class MADDV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010010>; 766 767class MAX_A_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001110>; 768class MAX_A_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001110>; 769class MAX_A_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001110>; 770class MAX_A_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001110>; 771 772class MAX_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001110>; 773class MAX_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001110>; 774class MAX_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001110>; 775class MAX_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001110>; 776 777class MAX_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001110>; 778class MAX_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001110>; 779class MAX_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001110>; 780class MAX_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001110>; 781 782class MAXI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000110>; 783class MAXI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000110>; 784class MAXI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000110>; 785class MAXI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000110>; 786 787class MAXI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000110>; 788class MAXI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000110>; 789class MAXI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000110>; 790class MAXI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000110>; 791 792class MIN_A_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001110>; 793class MIN_A_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001110>; 794class MIN_A_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001110>; 795class MIN_A_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001110>; 796 797class MIN_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001110>; 798class MIN_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001110>; 799class MIN_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001110>; 800class MIN_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001110>; 801 802class MIN_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001110>; 803class MIN_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001110>; 804class MIN_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001110>; 805class MIN_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001110>; 806 807class MINI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000110>; 808class MINI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000110>; 809class MINI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000110>; 810class MINI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000110>; 811 812class MINI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000110>; 813class MINI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000110>; 814class MINI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000110>; 815class MINI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000110>; 816 817class MOD_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010010>; 818class MOD_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010010>; 819class MOD_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010010>; 820class MOD_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010010>; 821 822class MOD_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010010>; 823class MOD_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010010>; 824class MOD_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010010>; 825class MOD_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010010>; 826 827class MOVE_V_ENC : MSA_ELM_FMT<0b0010111110, 0b011001>; 828 829class MSUB_Q_H_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011100>; 830class MSUB_Q_W_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011100>; 831 832class MSUBR_Q_H_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011100>; 833class MSUBR_Q_W_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011100>; 834 835class MSUBV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010010>; 836class MSUBV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010010>; 837class MSUBV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010010>; 838class MSUBV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010010>; 839 840class MUL_Q_H_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011100>; 841class MUL_Q_W_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011100>; 842 843class MULR_Q_H_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011100>; 844class MULR_Q_W_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011100>; 845 846class MULV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010010>; 847class MULV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010010>; 848class MULV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010010>; 849class MULV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010010>; 850 851class NLOC_B_ENC : MSA_2R_FMT<0b11000010, 0b00, 0b011110>; 852class NLOC_H_ENC : MSA_2R_FMT<0b11000010, 0b01, 0b011110>; 853class NLOC_W_ENC : MSA_2R_FMT<0b11000010, 0b10, 0b011110>; 854class NLOC_D_ENC : MSA_2R_FMT<0b11000010, 0b11, 0b011110>; 855 856class NLZC_B_ENC : MSA_2R_FMT<0b11000011, 0b00, 0b011110>; 857class NLZC_H_ENC : MSA_2R_FMT<0b11000011, 0b01, 0b011110>; 858class NLZC_W_ENC : MSA_2R_FMT<0b11000011, 0b10, 0b011110>; 859class NLZC_D_ENC : MSA_2R_FMT<0b11000011, 0b11, 0b011110>; 860 861class NOR_V_ENC : MSA_VEC_FMT<0b00010, 0b011110>; 862 863class NORI_B_ENC : MSA_I8_FMT<0b10, 0b000000>; 864 865class OR_V_ENC : MSA_VEC_FMT<0b00001, 0b011110>; 866 867class ORI_B_ENC : MSA_I8_FMT<0b01, 0b000000>; 868 869class PCKEV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010100>; 870class PCKEV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010100>; 871class PCKEV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010100>; 872class PCKEV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010100>; 873 874class PCKOD_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010100>; 875class PCKOD_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010100>; 876class PCKOD_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010100>; 877class PCKOD_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010100>; 878 879class PCNT_B_ENC : MSA_2R_FMT<0b11000001, 0b00, 0b011110>; 880class PCNT_H_ENC : MSA_2R_FMT<0b11000001, 0b01, 0b011110>; 881class PCNT_W_ENC : MSA_2R_FMT<0b11000001, 0b10, 0b011110>; 882class PCNT_D_ENC : MSA_2R_FMT<0b11000001, 0b11, 0b011110>; 883 884class SAT_S_B_ENC : MSA_BIT_B_FMT<0b000, 0b001010>; 885class SAT_S_H_ENC : MSA_BIT_H_FMT<0b000, 0b001010>; 886class SAT_S_W_ENC : MSA_BIT_W_FMT<0b000, 0b001010>; 887class SAT_S_D_ENC : MSA_BIT_D_FMT<0b000, 0b001010>; 888 889class SAT_U_B_ENC : MSA_BIT_B_FMT<0b001, 0b001010>; 890class SAT_U_H_ENC : MSA_BIT_H_FMT<0b001, 0b001010>; 891class SAT_U_W_ENC : MSA_BIT_W_FMT<0b001, 0b001010>; 892class SAT_U_D_ENC : MSA_BIT_D_FMT<0b001, 0b001010>; 893 894class SHF_B_ENC : MSA_I8_FMT<0b00, 0b000010>; 895class SHF_H_ENC : MSA_I8_FMT<0b01, 0b000010>; 896class SHF_W_ENC : MSA_I8_FMT<0b10, 0b000010>; 897 898class SLD_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010100>; 899class SLD_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010100>; 900class SLD_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010100>; 901class SLD_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010100>; 902 903class SLDI_B_ENC : MSA_ELM_B_FMT<0b0000, 0b011001>; 904class SLDI_H_ENC : MSA_ELM_H_FMT<0b0000, 0b011001>; 905class SLDI_W_ENC : MSA_ELM_W_FMT<0b0000, 0b011001>; 906class SLDI_D_ENC : MSA_ELM_D_FMT<0b0000, 0b011001>; 907 908class SLL_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001101>; 909class SLL_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001101>; 910class SLL_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001101>; 911class SLL_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001101>; 912 913class SLLI_B_ENC : MSA_BIT_B_FMT<0b000, 0b001001>; 914class SLLI_H_ENC : MSA_BIT_H_FMT<0b000, 0b001001>; 915class SLLI_W_ENC : MSA_BIT_W_FMT<0b000, 0b001001>; 916class SLLI_D_ENC : MSA_BIT_D_FMT<0b000, 0b001001>; 917 918class SPLAT_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010100>; 919class SPLAT_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010100>; 920class SPLAT_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010100>; 921class SPLAT_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010100>; 922 923class SPLATI_B_ENC : MSA_ELM_B_FMT<0b0001, 0b011001>; 924class SPLATI_H_ENC : MSA_ELM_H_FMT<0b0001, 0b011001>; 925class SPLATI_W_ENC : MSA_ELM_W_FMT<0b0001, 0b011001>; 926class SPLATI_D_ENC : MSA_ELM_D_FMT<0b0001, 0b011001>; 927 928class SRA_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001101>; 929class SRA_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001101>; 930class SRA_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001101>; 931class SRA_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001101>; 932 933class SRAI_B_ENC : MSA_BIT_B_FMT<0b001, 0b001001>; 934class SRAI_H_ENC : MSA_BIT_H_FMT<0b001, 0b001001>; 935class SRAI_W_ENC : MSA_BIT_W_FMT<0b001, 0b001001>; 936class SRAI_D_ENC : MSA_BIT_D_FMT<0b001, 0b001001>; 937 938class SRAR_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010101>; 939class SRAR_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010101>; 940class SRAR_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010101>; 941class SRAR_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010101>; 942 943class SRARI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001010>; 944class SRARI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001010>; 945class SRARI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001010>; 946class SRARI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001010>; 947 948class SRL_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001101>; 949class SRL_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001101>; 950class SRL_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001101>; 951class SRL_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001101>; 952 953class SRLI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001001>; 954class SRLI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001001>; 955class SRLI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001001>; 956class SRLI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001001>; 957 958class SRLR_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010101>; 959class SRLR_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010101>; 960class SRLR_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010101>; 961class SRLR_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010101>; 962 963class SRLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001010>; 964class SRLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001010>; 965class SRLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001010>; 966class SRLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001010>; 967 968class ST_B_ENC : MSA_I5_FMT<0b111, 0b00, 0b000111>; 969class ST_H_ENC : MSA_I5_FMT<0b111, 0b01, 0b000111>; 970class ST_W_ENC : MSA_I5_FMT<0b111, 0b10, 0b000111>; 971class ST_D_ENC : MSA_I5_FMT<0b111, 0b11, 0b000111>; 972 973class STX_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001111>; 974class STX_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001111>; 975class STX_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001111>; 976class STX_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001111>; 977 978class SUBS_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010001>; 979class SUBS_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010001>; 980class SUBS_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010001>; 981class SUBS_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010001>; 982 983class SUBS_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010001>; 984class SUBS_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010001>; 985class SUBS_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010001>; 986class SUBS_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010001>; 987 988class SUBSUS_U_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010001>; 989class SUBSUS_U_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010001>; 990class SUBSUS_U_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010001>; 991class SUBSUS_U_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010001>; 992 993class SUBSUU_S_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010001>; 994class SUBSUU_S_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010001>; 995class SUBSUU_S_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010001>; 996class SUBSUU_S_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010001>; 997 998class SUBV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001110>; 999class SUBV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001110>; 1000class SUBV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001110>; 1001class SUBV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001110>; 1002 1003class SUBVI_B_ENC : MSA_I5_FMT<0b001, 0b00, 0b000110>; 1004class SUBVI_H_ENC : MSA_I5_FMT<0b001, 0b01, 0b000110>; 1005class SUBVI_W_ENC : MSA_I5_FMT<0b001, 0b10, 0b000110>; 1006class SUBVI_D_ENC : MSA_I5_FMT<0b001, 0b11, 0b000110>; 1007 1008class VSHF_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010101>; 1009class VSHF_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010101>; 1010class VSHF_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010101>; 1011class VSHF_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010101>; 1012 1013class XOR_V_ENC : MSA_VEC_FMT<0b00011, 0b011110>; 1014 1015class XORI_B_ENC : MSA_I8_FMT<0b11, 0b000000>; 1016 1017// Instruction desc. 1018class MSA_BIT_B_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1019 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1020 InstrItinClass itin = NoItinerary> { 1021 dag OutOperandList = (outs RCWD:$wd); 1022 dag InOperandList = (ins RCWS:$ws, uimm3:$u3); 1023 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u3"); 1024 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt3:$u3))]; 1025 InstrItinClass Itinerary = itin; 1026} 1027 1028class MSA_BIT_H_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1029 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1030 InstrItinClass itin = NoItinerary> { 1031 dag OutOperandList = (outs RCWD:$wd); 1032 dag InOperandList = (ins RCWS:$ws, uimm4:$u4); 1033 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u4"); 1034 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt4:$u4))]; 1035 InstrItinClass Itinerary = itin; 1036} 1037 1038class MSA_BIT_W_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1039 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1040 InstrItinClass itin = NoItinerary> { 1041 dag OutOperandList = (outs RCWD:$wd); 1042 dag InOperandList = (ins RCWS:$ws, uimm5:$u5); 1043 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5"); 1044 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt5:$u5))]; 1045 InstrItinClass Itinerary = itin; 1046} 1047 1048class MSA_BIT_D_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1049 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1050 InstrItinClass itin = NoItinerary> { 1051 dag OutOperandList = (outs RCWD:$wd); 1052 dag InOperandList = (ins RCWS:$ws, uimm6:$u6); 1053 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u6"); 1054 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt6:$u6))]; 1055 InstrItinClass Itinerary = itin; 1056} 1057 1058class MSA_BIT_SPLAT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1059 SplatComplexPattern SplatImm, RegisterClass RCWD, 1060 RegisterClass RCWS = RCWD, 1061 InstrItinClass itin = NoItinerary> { 1062 dag OutOperandList = (outs RCWD:$wd); 1063 dag InOperandList = (ins RCWS:$ws, SplatImm.OpClass:$u); 1064 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u"); 1065 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, SplatImm:$u))]; 1066 InstrItinClass Itinerary = itin; 1067} 1068 1069class MSA_COPY_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1070 ValueType VecTy, RegisterClass RCD, RegisterClass RCWS, 1071 InstrItinClass itin = NoItinerary> { 1072 dag OutOperandList = (outs RCD:$rd); 1073 dag InOperandList = (ins RCWS:$ws, uimm4:$n); 1074 string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]"); 1075 list<dag> Pattern = [(set RCD:$rd, (OpNode (VecTy RCWS:$ws), immZExt4:$n))]; 1076 InstrItinClass Itinerary = itin; 1077} 1078 1079class MSA_COPY_PSEUDO_BASE<SDPatternOperator OpNode, ValueType VecTy, 1080 RegisterClass RCD, RegisterClass RCWS> : 1081 MipsPseudo<(outs RCD:$wd), (ins RCWS:$ws, uimm4:$n), 1082 [(set RCD:$wd, (OpNode (VecTy RCWS:$ws), immZExt4:$n))]> { 1083 bit usesCustomInserter = 1; 1084} 1085 1086class MSA_I5_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1087 SplatComplexPattern SplatImm, RegisterOperand ROWD, 1088 RegisterOperand ROWS = ROWD, 1089 InstrItinClass itin = NoItinerary> { 1090 dag OutOperandList = (outs ROWD:$wd); 1091 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$imm); 1092 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $imm"); 1093 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$imm))]; 1094 InstrItinClass Itinerary = itin; 1095} 1096 1097class MSA_I8_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1098 SplatComplexPattern SplatImm, RegisterOperand ROWD, 1099 RegisterOperand ROWS = ROWD, 1100 InstrItinClass itin = NoItinerary> { 1101 dag OutOperandList = (outs ROWD:$wd); 1102 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$u8); 1103 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1104 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$u8))]; 1105 InstrItinClass Itinerary = itin; 1106} 1107 1108// This class is deprecated and will be removed in the next few patches 1109class MSA_I8_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1110 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1111 InstrItinClass itin = NoItinerary> { 1112 dag OutOperandList = (outs ROWD:$wd); 1113 dag InOperandList = (ins ROWS:$ws, uimm8:$u8); 1114 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1115 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt8:$u8))]; 1116 InstrItinClass Itinerary = itin; 1117} 1118 1119class MSA_I8_SHF_DESC_BASE<string instr_asm, RegisterOperand ROWD, 1120 RegisterOperand ROWS = ROWD, 1121 InstrItinClass itin = NoItinerary> { 1122 dag OutOperandList = (outs ROWD:$wd); 1123 dag InOperandList = (ins ROWS:$ws, uimm8:$u8); 1124 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1125 list<dag> Pattern = [(set ROWD:$wd, (MipsSHF immZExt8:$u8, ROWS:$ws))]; 1126 InstrItinClass Itinerary = itin; 1127} 1128 1129class MSA_I10_LDI_DESC_BASE<string instr_asm, RegisterClass RCWD, 1130 InstrItinClass itin = NoItinerary> { 1131 dag OutOperandList = (outs RCWD:$wd); 1132 dag InOperandList = (ins vsplat_simm10:$i10); 1133 string AsmString = !strconcat(instr_asm, "\t$wd, $i10"); 1134 // LDI is matched using custom matching code in MipsSEISelDAGToDAG.cpp 1135 list<dag> Pattern = []; 1136 bit hasSideEffects = 0; 1137 InstrItinClass Itinerary = itin; 1138} 1139 1140class MSA_2R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1141 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1142 InstrItinClass itin = NoItinerary> { 1143 dag OutOperandList = (outs ROWD:$wd); 1144 dag InOperandList = (ins ROWS:$ws); 1145 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 1146 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))]; 1147 InstrItinClass Itinerary = itin; 1148} 1149 1150class MSA_2R_FILL_DESC_BASE<string instr_asm, ValueType VT, 1151 SDPatternOperator OpNode, RegisterOperand ROWD, 1152 RegisterOperand ROWS = ROWD, 1153 InstrItinClass itin = NoItinerary> { 1154 dag OutOperandList = (outs ROWD:$wd); 1155 dag InOperandList = (ins ROWS:$rs); 1156 string AsmString = !strconcat(instr_asm, "\t$wd, $rs"); 1157 list<dag> Pattern = [(set ROWD:$wd, (VT (OpNode ROWS:$rs)))]; 1158 InstrItinClass Itinerary = itin; 1159} 1160 1161class MSA_2RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1162 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1163 InstrItinClass itin = NoItinerary> { 1164 dag OutOperandList = (outs ROWD:$wd); 1165 dag InOperandList = (ins ROWS:$ws); 1166 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 1167 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))]; 1168 InstrItinClass Itinerary = itin; 1169} 1170 1171class MSA_3R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1172 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1173 RegisterOperand ROWT = ROWD, 1174 InstrItinClass itin = NoItinerary> { 1175 dag OutOperandList = (outs ROWD:$wd); 1176 dag InOperandList = (ins ROWS:$ws, ROWT:$wt); 1177 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1178 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))]; 1179 InstrItinClass Itinerary = itin; 1180} 1181 1182class MSA_3R_VSHF_DESC_BASE<string instr_asm, RegisterOperand ROWD, 1183 RegisterOperand ROWS = ROWD, 1184 RegisterOperand ROWT = ROWD, 1185 InstrItinClass itin = NoItinerary> { 1186 dag OutOperandList = (outs ROWD:$wd); 1187 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt); 1188 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1189 list<dag> Pattern = [(set ROWD:$wd, (MipsVSHF ROWD:$wd_in, ROWS:$ws, 1190 ROWT:$wt))]; 1191 string Constraints = "$wd = $wd_in"; 1192 InstrItinClass Itinerary = itin; 1193} 1194 1195class MSA_3R_4R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1196 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1197 RegisterOperand ROWT = ROWD, 1198 InstrItinClass itin = NoItinerary> { 1199 dag OutOperandList = (outs ROWD:$wd); 1200 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt); 1201 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1202 list<dag> Pattern = [(set ROWD:$wd, 1203 (OpNode ROWD:$wd_in, ROWS:$ws, ROWT:$wt))]; 1204 InstrItinClass Itinerary = itin; 1205 string Constraints = "$wd = $wd_in"; 1206} 1207 1208class MSA_3RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1209 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1210 RegisterOperand ROWT = ROWD, 1211 InstrItinClass itin = NoItinerary> : 1212 MSA_3R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>; 1213 1214class MSA_3RF_4RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1215 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1216 RegisterOperand ROWT = ROWD, 1217 InstrItinClass itin = NoItinerary> : 1218 MSA_3R_4R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>; 1219 1220class MSA_CBRANCH_DESC_BASE<string instr_asm, RegisterClass RCWD> { 1221 dag OutOperandList = (outs); 1222 dag InOperandList = (ins RCWD:$wd, brtarget:$offset); 1223 string AsmString = !strconcat(instr_asm, "\t$wd, $offset"); 1224 list<dag> Pattern = []; 1225 InstrItinClass Itinerary = IIBranch; 1226 bit isBranch = 1; 1227 bit isTerminator = 1; 1228 bit hasDelaySlot = 1; 1229 list<Register> Defs = [AT]; 1230} 1231 1232class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1233 RegisterClass RCWD, RegisterClass RCS, 1234 InstrItinClass itin = NoItinerary> { 1235 dag OutOperandList = (outs RCWD:$wd); 1236 dag InOperandList = (ins RCWD:$wd_in, RCS:$rs, uimm6:$n); 1237 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $rs"); 1238 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWD:$wd_in, 1239 RCS:$rs, 1240 immZExt6:$n))]; 1241 InstrItinClass Itinerary = itin; 1242 string Constraints = "$wd = $wd_in"; 1243} 1244 1245class MSA_INSERT_PSEUDO_BASE<SDPatternOperator OpNode, ValueType Ty, 1246 RegisterClass RCWD, RegisterClass RCFS> : 1247 MipsPseudo<(outs RCWD:$wd), (ins RCWD:$wd_in, uimm6:$n, RCFS:$fs), 1248 [(set RCWD:$wd, (OpNode (Ty RCWD:$wd_in), RCFS:$fs, 1249 immZExt6:$n))]> { 1250 bit usesCustomInserter = 1; 1251 string Constraints = "$wd = $wd_in"; 1252} 1253 1254class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1255 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1256 InstrItinClass itin = NoItinerary> { 1257 dag OutOperandList = (outs RCWD:$wd); 1258 dag InOperandList = (ins RCWD:$wd_in, uimm6:$n, RCWS:$ws); 1259 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[0]"); 1260 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWD:$wd_in, 1261 immZExt6:$n, 1262 RCWS:$ws))]; 1263 InstrItinClass Itinerary = itin; 1264 string Constraints = "$wd = $wd_in"; 1265} 1266 1267class MSA_VEC_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1268 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1269 RegisterClass RCWT = RCWD, 1270 InstrItinClass itin = NoItinerary> { 1271 dag OutOperandList = (outs RCWD:$wd); 1272 dag InOperandList = (ins RCWS:$ws, RCWT:$wt); 1273 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1274 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]; 1275 InstrItinClass Itinerary = itin; 1276} 1277 1278class MSA_ELM_SPLAT_DESC_BASE<string instr_asm, SplatComplexPattern SplatImm, 1279 RegisterClass RCWD, 1280 RegisterClass RCWS = RCWD, 1281 InstrItinClass itin = NoItinerary> { 1282 dag OutOperandList = (outs RCWD:$wd); 1283 dag InOperandList = (ins RCWS:$ws, SplatImm.OpClass:$u3); 1284 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$u3]"); 1285 list<dag> Pattern = [(set RCWD:$wd, (MipsVSHF SplatImm:$u3, RCWS:$ws, 1286 RCWS:$ws))]; 1287 InstrItinClass Itinerary = itin; 1288} 1289 1290class MSA_VEC_PSEUDO_BASE<SDPatternOperator OpNode, RegisterClass RCWD, 1291 RegisterClass RCWS = RCWD, 1292 RegisterClass RCWT = RCWD> : 1293 MipsPseudo<(outs RCWD:$wd), (ins RCWS:$ws, RCWT:$wt), 1294 [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]>; 1295 1296class ADD_A_B_DESC : MSA_3R_DESC_BASE<"add_a.b", int_mips_add_a_b, MSA128BOpnd>, 1297 IsCommutable; 1298class ADD_A_H_DESC : MSA_3R_DESC_BASE<"add_a.h", int_mips_add_a_h, MSA128HOpnd>, 1299 IsCommutable; 1300class ADD_A_W_DESC : MSA_3R_DESC_BASE<"add_a.w", int_mips_add_a_w, MSA128WOpnd>, 1301 IsCommutable; 1302class ADD_A_D_DESC : MSA_3R_DESC_BASE<"add_a.d", int_mips_add_a_d, MSA128DOpnd>, 1303 IsCommutable; 1304 1305class ADDS_A_B_DESC : MSA_3R_DESC_BASE<"adds_a.b", int_mips_adds_a_b, 1306 MSA128BOpnd>, IsCommutable; 1307class ADDS_A_H_DESC : MSA_3R_DESC_BASE<"adds_a.h", int_mips_adds_a_h, 1308 MSA128HOpnd>, IsCommutable; 1309class ADDS_A_W_DESC : MSA_3R_DESC_BASE<"adds_a.w", int_mips_adds_a_w, 1310 MSA128WOpnd>, IsCommutable; 1311class ADDS_A_D_DESC : MSA_3R_DESC_BASE<"adds_a.d", int_mips_adds_a_d, 1312 MSA128DOpnd>, IsCommutable; 1313 1314class ADDS_S_B_DESC : MSA_3R_DESC_BASE<"adds_s.b", int_mips_adds_s_b, 1315 MSA128BOpnd>, IsCommutable; 1316class ADDS_S_H_DESC : MSA_3R_DESC_BASE<"adds_s.h", int_mips_adds_s_h, 1317 MSA128HOpnd>, IsCommutable; 1318class ADDS_S_W_DESC : MSA_3R_DESC_BASE<"adds_s.w", int_mips_adds_s_w, 1319 MSA128WOpnd>, IsCommutable; 1320class ADDS_S_D_DESC : MSA_3R_DESC_BASE<"adds_s.d", int_mips_adds_s_d, 1321 MSA128DOpnd>, IsCommutable; 1322 1323class ADDS_U_B_DESC : MSA_3R_DESC_BASE<"adds_u.b", int_mips_adds_u_b, 1324 MSA128BOpnd>, IsCommutable; 1325class ADDS_U_H_DESC : MSA_3R_DESC_BASE<"adds_u.h", int_mips_adds_u_h, 1326 MSA128HOpnd>, IsCommutable; 1327class ADDS_U_W_DESC : MSA_3R_DESC_BASE<"adds_u.w", int_mips_adds_u_w, 1328 MSA128WOpnd>, IsCommutable; 1329class ADDS_U_D_DESC : MSA_3R_DESC_BASE<"adds_u.d", int_mips_adds_u_d, 1330 MSA128DOpnd>, IsCommutable; 1331 1332class ADDV_B_DESC : MSA_3R_DESC_BASE<"addv.b", add, MSA128BOpnd>, IsCommutable; 1333class ADDV_H_DESC : MSA_3R_DESC_BASE<"addv.h", add, MSA128HOpnd>, IsCommutable; 1334class ADDV_W_DESC : MSA_3R_DESC_BASE<"addv.w", add, MSA128WOpnd>, IsCommutable; 1335class ADDV_D_DESC : MSA_3R_DESC_BASE<"addv.d", add, MSA128DOpnd>, IsCommutable; 1336 1337class ADDVI_B_DESC : MSA_I5_DESC_BASE<"addvi.b", add, vsplati8_uimm5, 1338 MSA128BOpnd>; 1339class ADDVI_H_DESC : MSA_I5_DESC_BASE<"addvi.h", add, vsplati16_uimm5, 1340 MSA128HOpnd>; 1341class ADDVI_W_DESC : MSA_I5_DESC_BASE<"addvi.w", add, vsplati32_uimm5, 1342 MSA128WOpnd>; 1343class ADDVI_D_DESC : MSA_I5_DESC_BASE<"addvi.d", add, vsplati64_uimm5, 1344 MSA128DOpnd>; 1345 1346class AND_V_DESC : MSA_VEC_DESC_BASE<"and.v", and, MSA128B>; 1347class AND_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128H>; 1348class AND_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128W>; 1349class AND_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128D>; 1350 1351class ANDI_B_DESC : MSA_I8_DESC_BASE<"andi.b", and, vsplati8_uimm8, 1352 MSA128BOpnd>; 1353 1354class ASUB_S_B_DESC : MSA_3R_DESC_BASE<"asub_s.b", int_mips_asub_s_b, 1355 MSA128BOpnd>; 1356class ASUB_S_H_DESC : MSA_3R_DESC_BASE<"asub_s.h", int_mips_asub_s_h, 1357 MSA128HOpnd>; 1358class ASUB_S_W_DESC : MSA_3R_DESC_BASE<"asub_s.w", int_mips_asub_s_w, 1359 MSA128WOpnd>; 1360class ASUB_S_D_DESC : MSA_3R_DESC_BASE<"asub_s.d", int_mips_asub_s_d, 1361 MSA128DOpnd>; 1362 1363class ASUB_U_B_DESC : MSA_3R_DESC_BASE<"asub_u.b", int_mips_asub_u_b, 1364 MSA128BOpnd>; 1365class ASUB_U_H_DESC : MSA_3R_DESC_BASE<"asub_u.h", int_mips_asub_u_h, 1366 MSA128HOpnd>; 1367class ASUB_U_W_DESC : MSA_3R_DESC_BASE<"asub_u.w", int_mips_asub_u_w, 1368 MSA128WOpnd>; 1369class ASUB_U_D_DESC : MSA_3R_DESC_BASE<"asub_u.d", int_mips_asub_u_d, 1370 MSA128DOpnd>; 1371 1372class AVE_S_B_DESC : MSA_3R_DESC_BASE<"ave_s.b", int_mips_ave_s_b, MSA128BOpnd>, 1373 IsCommutable; 1374class AVE_S_H_DESC : MSA_3R_DESC_BASE<"ave_s.h", int_mips_ave_s_h, MSA128HOpnd>, 1375 IsCommutable; 1376class AVE_S_W_DESC : MSA_3R_DESC_BASE<"ave_s.w", int_mips_ave_s_w, MSA128WOpnd>, 1377 IsCommutable; 1378class AVE_S_D_DESC : MSA_3R_DESC_BASE<"ave_s.d", int_mips_ave_s_d, MSA128DOpnd>, 1379 IsCommutable; 1380 1381class AVE_U_B_DESC : MSA_3R_DESC_BASE<"ave_u.b", int_mips_ave_u_b, MSA128BOpnd>, 1382 IsCommutable; 1383class AVE_U_H_DESC : MSA_3R_DESC_BASE<"ave_u.h", int_mips_ave_u_h, MSA128HOpnd>, 1384 IsCommutable; 1385class AVE_U_W_DESC : MSA_3R_DESC_BASE<"ave_u.w", int_mips_ave_u_w, MSA128WOpnd>, 1386 IsCommutable; 1387class AVE_U_D_DESC : MSA_3R_DESC_BASE<"ave_u.d", int_mips_ave_u_d, MSA128DOpnd>, 1388 IsCommutable; 1389 1390class AVER_S_B_DESC : MSA_3R_DESC_BASE<"aver_s.b", int_mips_aver_s_b, 1391 MSA128BOpnd>, IsCommutable; 1392class AVER_S_H_DESC : MSA_3R_DESC_BASE<"aver_s.h", int_mips_aver_s_h, 1393 MSA128HOpnd>, IsCommutable; 1394class AVER_S_W_DESC : MSA_3R_DESC_BASE<"aver_s.w", int_mips_aver_s_w, 1395 MSA128WOpnd>, IsCommutable; 1396class AVER_S_D_DESC : MSA_3R_DESC_BASE<"aver_s.d", int_mips_aver_s_d, 1397 MSA128DOpnd>, IsCommutable; 1398 1399class AVER_U_B_DESC : MSA_3R_DESC_BASE<"aver_u.b", int_mips_aver_u_b, 1400 MSA128BOpnd>, IsCommutable; 1401class AVER_U_H_DESC : MSA_3R_DESC_BASE<"aver_u.h", int_mips_aver_u_h, 1402 MSA128HOpnd>, IsCommutable; 1403class AVER_U_W_DESC : MSA_3R_DESC_BASE<"aver_u.w", int_mips_aver_u_w, 1404 MSA128WOpnd>, IsCommutable; 1405class AVER_U_D_DESC : MSA_3R_DESC_BASE<"aver_u.d", int_mips_aver_u_d, 1406 MSA128DOpnd>, IsCommutable; 1407 1408class BCLR_B_DESC : MSA_3R_DESC_BASE<"bclr.b", int_mips_bclr_b, MSA128BOpnd>; 1409class BCLR_H_DESC : MSA_3R_DESC_BASE<"bclr.h", int_mips_bclr_h, MSA128HOpnd>; 1410class BCLR_W_DESC : MSA_3R_DESC_BASE<"bclr.w", int_mips_bclr_w, MSA128WOpnd>; 1411class BCLR_D_DESC : MSA_3R_DESC_BASE<"bclr.d", int_mips_bclr_d, MSA128DOpnd>; 1412 1413class BCLRI_B_DESC : MSA_BIT_B_DESC_BASE<"bclri.b", int_mips_bclri_b, MSA128B>; 1414class BCLRI_H_DESC : MSA_BIT_H_DESC_BASE<"bclri.h", int_mips_bclri_h, MSA128H>; 1415class BCLRI_W_DESC : MSA_BIT_W_DESC_BASE<"bclri.w", int_mips_bclri_w, MSA128W>; 1416class BCLRI_D_DESC : MSA_BIT_D_DESC_BASE<"bclri.d", int_mips_bclri_d, MSA128D>; 1417 1418class BINSL_B_DESC : MSA_3R_DESC_BASE<"binsl.b", int_mips_binsl_b, MSA128BOpnd>; 1419class BINSL_H_DESC : MSA_3R_DESC_BASE<"binsl.h", int_mips_binsl_h, MSA128HOpnd>; 1420class BINSL_W_DESC : MSA_3R_DESC_BASE<"binsl.w", int_mips_binsl_w, MSA128WOpnd>; 1421class BINSL_D_DESC : MSA_3R_DESC_BASE<"binsl.d", int_mips_binsl_d, MSA128DOpnd>; 1422 1423class BINSLI_B_DESC : MSA_BIT_B_DESC_BASE<"binsli.b", int_mips_binsli_b, 1424 MSA128B>; 1425class BINSLI_H_DESC : MSA_BIT_H_DESC_BASE<"binsli.h", int_mips_binsli_h, 1426 MSA128H>; 1427class BINSLI_W_DESC : MSA_BIT_W_DESC_BASE<"binsli.w", int_mips_binsli_w, 1428 MSA128W>; 1429class BINSLI_D_DESC : MSA_BIT_D_DESC_BASE<"binsli.d", int_mips_binsli_d, 1430 MSA128D>; 1431 1432class BINSR_B_DESC : MSA_3R_DESC_BASE<"binsr.b", int_mips_binsr_b, MSA128BOpnd>; 1433class BINSR_H_DESC : MSA_3R_DESC_BASE<"binsr.h", int_mips_binsr_h, MSA128HOpnd>; 1434class BINSR_W_DESC : MSA_3R_DESC_BASE<"binsr.w", int_mips_binsr_w, MSA128WOpnd>; 1435class BINSR_D_DESC : MSA_3R_DESC_BASE<"binsr.d", int_mips_binsr_d, MSA128DOpnd>; 1436 1437class BINSRI_B_DESC : MSA_BIT_B_DESC_BASE<"binsri.b", int_mips_binsri_b, 1438 MSA128B>; 1439class BINSRI_H_DESC : MSA_BIT_H_DESC_BASE<"binsri.h", int_mips_binsri_h, 1440 MSA128H>; 1441class BINSRI_W_DESC : MSA_BIT_W_DESC_BASE<"binsri.w", int_mips_binsri_w, 1442 MSA128W>; 1443class BINSRI_D_DESC : MSA_BIT_D_DESC_BASE<"binsri.d", int_mips_binsri_d, 1444 MSA128D>; 1445 1446class BMNZ_V_DESC : MSA_VEC_DESC_BASE<"bmnz.v", int_mips_bmnz_v, MSA128B>; 1447 1448class BMNZI_B_DESC : MSA_I8_X_DESC_BASE<"bmnzi.b", int_mips_bmnzi_b, 1449 MSA128BOpnd>; 1450 1451class BMZ_V_DESC : MSA_VEC_DESC_BASE<"bmz.v", int_mips_bmz_v, MSA128B>; 1452 1453class BMZI_B_DESC : MSA_I8_X_DESC_BASE<"bmzi.b", int_mips_bmzi_b, MSA128BOpnd>; 1454 1455class BNEG_B_DESC : MSA_3R_DESC_BASE<"bneg.b", int_mips_bneg_b, MSA128BOpnd>; 1456class BNEG_H_DESC : MSA_3R_DESC_BASE<"bneg.h", int_mips_bneg_h, MSA128HOpnd>; 1457class BNEG_W_DESC : MSA_3R_DESC_BASE<"bneg.w", int_mips_bneg_w, MSA128WOpnd>; 1458class BNEG_D_DESC : MSA_3R_DESC_BASE<"bneg.d", int_mips_bneg_d, MSA128DOpnd>; 1459 1460class BNEGI_B_DESC : MSA_BIT_B_DESC_BASE<"bnegi.b", int_mips_bnegi_b, MSA128B>; 1461class BNEGI_H_DESC : MSA_BIT_H_DESC_BASE<"bnegi.h", int_mips_bnegi_h, MSA128H>; 1462class BNEGI_W_DESC : MSA_BIT_W_DESC_BASE<"bnegi.w", int_mips_bnegi_w, MSA128W>; 1463class BNEGI_D_DESC : MSA_BIT_D_DESC_BASE<"bnegi.d", int_mips_bnegi_d, MSA128D>; 1464 1465class BNZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bnz.b", MSA128B>; 1466class BNZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bnz.h", MSA128H>; 1467class BNZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bnz.w", MSA128W>; 1468class BNZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bnz.d", MSA128D>; 1469 1470class BNZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bnz.v", MSA128B>; 1471 1472class BSEL_V_DESC { 1473 dag OutOperandList = (outs MSA128B:$wd); 1474 dag InOperandList = (ins MSA128B:$wd_in, MSA128B:$ws, MSA128B:$wt); 1475 string AsmString = "bsel.v\t$wd, $ws, $wt"; 1476 list<dag> Pattern = [(set MSA128B:$wd, (vselect MSA128B:$wd_in, MSA128B:$ws, 1477 MSA128B:$wt))]; 1478 InstrItinClass Itinerary = NoItinerary; 1479 string Constraints = "$wd = $wd_in"; 1480} 1481 1482class BSELI_B_DESC { 1483 dag OutOperandList = (outs MSA128BOpnd:$wd); 1484 dag InOperandList = (ins MSA128BOpnd:$wd_in, MSA128BOpnd:$ws, 1485 vsplat_uimm8:$u8); 1486 string AsmString = "bseli.b\t$wd, $ws, $u8"; 1487 list<dag> Pattern = [(set MSA128BOpnd:$wd, (vselect MSA128BOpnd:$wd_in, 1488 MSA128BOpnd:$ws, 1489 vsplati8_uimm8:$u8))]; 1490 InstrItinClass Itinerary = NoItinerary; 1491 string Constraints = "$wd = $wd_in"; 1492} 1493 1494class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", int_mips_bset_b, MSA128BOpnd>; 1495class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", int_mips_bset_h, MSA128HOpnd>; 1496class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", int_mips_bset_w, MSA128WOpnd>; 1497class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", int_mips_bset_d, MSA128DOpnd>; 1498 1499class BSETI_B_DESC : MSA_BIT_B_DESC_BASE<"bseti.b", int_mips_bseti_b, MSA128B>; 1500class BSETI_H_DESC : MSA_BIT_H_DESC_BASE<"bseti.h", int_mips_bseti_h, MSA128H>; 1501class BSETI_W_DESC : MSA_BIT_W_DESC_BASE<"bseti.w", int_mips_bseti_w, MSA128W>; 1502class BSETI_D_DESC : MSA_BIT_D_DESC_BASE<"bseti.d", int_mips_bseti_d, MSA128D>; 1503 1504class BZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bz.b", MSA128B>; 1505class BZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bz.h", MSA128H>; 1506class BZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bz.w", MSA128W>; 1507class BZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bz.d", MSA128D>; 1508 1509class BZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bz.v", MSA128B>; 1510 1511class CEQ_B_DESC : MSA_3R_DESC_BASE<"ceq.b", vseteq_v16i8, MSA128BOpnd>, 1512 IsCommutable; 1513class CEQ_H_DESC : MSA_3R_DESC_BASE<"ceq.h", vseteq_v8i16, MSA128HOpnd>, 1514 IsCommutable; 1515class CEQ_W_DESC : MSA_3R_DESC_BASE<"ceq.w", vseteq_v4i32, MSA128WOpnd>, 1516 IsCommutable; 1517class CEQ_D_DESC : MSA_3R_DESC_BASE<"ceq.d", vseteq_v2i64, MSA128DOpnd>, 1518 IsCommutable; 1519 1520class CEQI_B_DESC : MSA_I5_DESC_BASE<"ceqi.b", vseteq_v16i8, vsplati8_simm5, 1521 MSA128BOpnd>; 1522class CEQI_H_DESC : MSA_I5_DESC_BASE<"ceqi.h", vseteq_v8i16, vsplati16_simm5, 1523 MSA128HOpnd>; 1524class CEQI_W_DESC : MSA_I5_DESC_BASE<"ceqi.w", vseteq_v4i32, vsplati32_simm5, 1525 MSA128WOpnd>; 1526class CEQI_D_DESC : MSA_I5_DESC_BASE<"ceqi.d", vseteq_v2i64, vsplati64_simm5, 1527 MSA128DOpnd>; 1528 1529class CFCMSA_DESC { 1530 dag OutOperandList = (outs GPR32:$rd); 1531 dag InOperandList = (ins MSACtrl:$cs); 1532 string AsmString = "cfcmsa\t$rd, $cs"; 1533 InstrItinClass Itinerary = NoItinerary; 1534 bit hasSideEffects = 1; 1535} 1536 1537class CLE_S_B_DESC : MSA_3R_DESC_BASE<"cle_s.b", vsetle_v16i8, MSA128BOpnd>; 1538class CLE_S_H_DESC : MSA_3R_DESC_BASE<"cle_s.h", vsetle_v8i16, MSA128HOpnd>; 1539class CLE_S_W_DESC : MSA_3R_DESC_BASE<"cle_s.w", vsetle_v4i32, MSA128WOpnd>; 1540class CLE_S_D_DESC : MSA_3R_DESC_BASE<"cle_s.d", vsetle_v2i64, MSA128DOpnd>; 1541 1542class CLE_U_B_DESC : MSA_3R_DESC_BASE<"cle_u.b", vsetule_v16i8, MSA128BOpnd>; 1543class CLE_U_H_DESC : MSA_3R_DESC_BASE<"cle_u.h", vsetule_v8i16, MSA128HOpnd>; 1544class CLE_U_W_DESC : MSA_3R_DESC_BASE<"cle_u.w", vsetule_v4i32, MSA128WOpnd>; 1545class CLE_U_D_DESC : MSA_3R_DESC_BASE<"cle_u.d", vsetule_v2i64, MSA128DOpnd>; 1546 1547class CLEI_S_B_DESC : MSA_I5_DESC_BASE<"clei_s.b", vsetle_v16i8, 1548 vsplati8_simm5, MSA128BOpnd>; 1549class CLEI_S_H_DESC : MSA_I5_DESC_BASE<"clei_s.h", vsetle_v8i16, 1550 vsplati16_simm5, MSA128HOpnd>; 1551class CLEI_S_W_DESC : MSA_I5_DESC_BASE<"clei_s.w", vsetle_v4i32, 1552 vsplati32_simm5, MSA128WOpnd>; 1553class CLEI_S_D_DESC : MSA_I5_DESC_BASE<"clei_s.d", vsetle_v2i64, 1554 vsplati64_simm5, MSA128DOpnd>; 1555 1556class CLEI_U_B_DESC : MSA_I5_DESC_BASE<"clei_u.b", vsetule_v16i8, 1557 vsplati8_uimm5, MSA128BOpnd>; 1558class CLEI_U_H_DESC : MSA_I5_DESC_BASE<"clei_u.h", vsetule_v8i16, 1559 vsplati16_uimm5, MSA128HOpnd>; 1560class CLEI_U_W_DESC : MSA_I5_DESC_BASE<"clei_u.w", vsetule_v4i32, 1561 vsplati32_uimm5, MSA128WOpnd>; 1562class CLEI_U_D_DESC : MSA_I5_DESC_BASE<"clei_u.d", vsetule_v2i64, 1563 vsplati64_uimm5, MSA128DOpnd>; 1564 1565class CLT_S_B_DESC : MSA_3R_DESC_BASE<"clt_s.b", vsetlt_v16i8, MSA128BOpnd>; 1566class CLT_S_H_DESC : MSA_3R_DESC_BASE<"clt_s.h", vsetlt_v8i16, MSA128HOpnd>; 1567class CLT_S_W_DESC : MSA_3R_DESC_BASE<"clt_s.w", vsetlt_v4i32, MSA128WOpnd>; 1568class CLT_S_D_DESC : MSA_3R_DESC_BASE<"clt_s.d", vsetlt_v2i64, MSA128DOpnd>; 1569 1570class CLT_U_B_DESC : MSA_3R_DESC_BASE<"clt_u.b", vsetult_v16i8, MSA128BOpnd>; 1571class CLT_U_H_DESC : MSA_3R_DESC_BASE<"clt_u.h", vsetult_v8i16, MSA128HOpnd>; 1572class CLT_U_W_DESC : MSA_3R_DESC_BASE<"clt_u.w", vsetult_v4i32, MSA128WOpnd>; 1573class CLT_U_D_DESC : MSA_3R_DESC_BASE<"clt_u.d", vsetult_v2i64, MSA128DOpnd>; 1574 1575class CLTI_S_B_DESC : MSA_I5_DESC_BASE<"clti_s.b", vsetlt_v16i8, 1576 vsplati8_simm5, MSA128BOpnd>; 1577class CLTI_S_H_DESC : MSA_I5_DESC_BASE<"clti_s.h", vsetlt_v8i16, 1578 vsplati16_simm5, MSA128HOpnd>; 1579class CLTI_S_W_DESC : MSA_I5_DESC_BASE<"clti_s.w", vsetlt_v4i32, 1580 vsplati32_simm5, MSA128WOpnd>; 1581class CLTI_S_D_DESC : MSA_I5_DESC_BASE<"clti_s.d", vsetlt_v2i64, 1582 vsplati64_simm5, MSA128DOpnd>; 1583 1584class CLTI_U_B_DESC : MSA_I5_DESC_BASE<"clti_u.b", vsetult_v16i8, 1585 vsplati8_uimm5, MSA128BOpnd>; 1586class CLTI_U_H_DESC : MSA_I5_DESC_BASE<"clti_u.h", vsetult_v8i16, 1587 vsplati16_uimm5, MSA128HOpnd>; 1588class CLTI_U_W_DESC : MSA_I5_DESC_BASE<"clti_u.w", vsetult_v4i32, 1589 vsplati32_uimm5, MSA128WOpnd>; 1590class CLTI_U_D_DESC : MSA_I5_DESC_BASE<"clti_u.d", vsetult_v2i64, 1591 vsplati64_uimm5, MSA128DOpnd>; 1592 1593class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", vextract_sext_i8, v16i8, 1594 GPR32, MSA128B>; 1595class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", vextract_sext_i16, v8i16, 1596 GPR32, MSA128H>; 1597class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", vextract_sext_i32, v4i32, 1598 GPR32, MSA128W>; 1599 1600class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", vextract_zext_i8, v16i8, 1601 GPR32, MSA128B>; 1602class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", vextract_zext_i16, v8i16, 1603 GPR32, MSA128H>; 1604class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", vextract_zext_i32, v4i32, 1605 GPR32, MSA128W>; 1606 1607class COPY_FW_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v4f32, FGR32, 1608 MSA128W>; 1609class COPY_FD_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v2f64, FGR64, 1610 MSA128D>; 1611 1612class CTCMSA_DESC { 1613 dag OutOperandList = (outs); 1614 dag InOperandList = (ins MSACtrl:$cd, GPR32:$rs); 1615 string AsmString = "ctcmsa\t$cd, $rs"; 1616 InstrItinClass Itinerary = NoItinerary; 1617 bit hasSideEffects = 1; 1618} 1619 1620class DIV_S_B_DESC : MSA_3R_DESC_BASE<"div_s.b", sdiv, MSA128BOpnd>; 1621class DIV_S_H_DESC : MSA_3R_DESC_BASE<"div_s.h", sdiv, MSA128HOpnd>; 1622class DIV_S_W_DESC : MSA_3R_DESC_BASE<"div_s.w", sdiv, MSA128WOpnd>; 1623class DIV_S_D_DESC : MSA_3R_DESC_BASE<"div_s.d", sdiv, MSA128DOpnd>; 1624 1625class DIV_U_B_DESC : MSA_3R_DESC_BASE<"div_u.b", udiv, MSA128BOpnd>; 1626class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", udiv, MSA128HOpnd>; 1627class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", udiv, MSA128WOpnd>; 1628class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", udiv, MSA128DOpnd>; 1629 1630class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h, 1631 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>, 1632 IsCommutable; 1633class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w, 1634 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>, 1635 IsCommutable; 1636class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d, 1637 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>, 1638 IsCommutable; 1639 1640class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h, 1641 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>, 1642 IsCommutable; 1643class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w, 1644 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>, 1645 IsCommutable; 1646class DOTP_U_D_DESC : MSA_3R_DESC_BASE<"dotp_u.d", int_mips_dotp_u_d, 1647 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>, 1648 IsCommutable; 1649 1650class DPADD_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.h", int_mips_dpadd_s_h, 1651 MSA128HOpnd, MSA128BOpnd, 1652 MSA128BOpnd>, IsCommutable; 1653class DPADD_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.w", int_mips_dpadd_s_w, 1654 MSA128WOpnd, MSA128HOpnd, 1655 MSA128HOpnd>, IsCommutable; 1656class DPADD_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.d", int_mips_dpadd_s_d, 1657 MSA128DOpnd, MSA128WOpnd, 1658 MSA128WOpnd>, IsCommutable; 1659 1660class DPADD_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.h", int_mips_dpadd_u_h, 1661 MSA128HOpnd, MSA128BOpnd, 1662 MSA128BOpnd>, IsCommutable; 1663class DPADD_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.w", int_mips_dpadd_u_w, 1664 MSA128WOpnd, MSA128HOpnd, 1665 MSA128HOpnd>, IsCommutable; 1666class DPADD_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.d", int_mips_dpadd_u_d, 1667 MSA128DOpnd, MSA128WOpnd, 1668 MSA128WOpnd>, IsCommutable; 1669 1670class DPSUB_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.h", int_mips_dpsub_s_h, 1671 MSA128HOpnd, MSA128BOpnd, 1672 MSA128BOpnd>; 1673class DPSUB_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.w", int_mips_dpsub_s_w, 1674 MSA128WOpnd, MSA128HOpnd, 1675 MSA128HOpnd>; 1676class DPSUB_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.d", int_mips_dpsub_s_d, 1677 MSA128DOpnd, MSA128WOpnd, 1678 MSA128WOpnd>; 1679 1680class DPSUB_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.h", int_mips_dpsub_u_h, 1681 MSA128HOpnd, MSA128BOpnd, 1682 MSA128BOpnd>; 1683class DPSUB_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.w", int_mips_dpsub_u_w, 1684 MSA128WOpnd, MSA128HOpnd, 1685 MSA128HOpnd>; 1686class DPSUB_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.d", int_mips_dpsub_u_d, 1687 MSA128DOpnd, MSA128WOpnd, 1688 MSA128WOpnd>; 1689 1690class FADD_W_DESC : MSA_3RF_DESC_BASE<"fadd.w", fadd, MSA128WOpnd>, 1691 IsCommutable; 1692class FADD_D_DESC : MSA_3RF_DESC_BASE<"fadd.d", fadd, MSA128DOpnd>, 1693 IsCommutable; 1694 1695class FCAF_W_DESC : MSA_3RF_DESC_BASE<"fcaf.w", int_mips_fcaf_w, MSA128WOpnd>, 1696 IsCommutable; 1697class FCAF_D_DESC : MSA_3RF_DESC_BASE<"fcaf.d", int_mips_fcaf_d, MSA128DOpnd>, 1698 IsCommutable; 1699 1700class FCEQ_W_DESC : MSA_3RF_DESC_BASE<"fceq.w", vfsetoeq_v4f32, MSA128WOpnd>, 1701 IsCommutable; 1702class FCEQ_D_DESC : MSA_3RF_DESC_BASE<"fceq.d", vfsetoeq_v2f64, MSA128DOpnd>, 1703 IsCommutable; 1704 1705class FCLASS_W_DESC : MSA_2RF_DESC_BASE<"fclass.w", int_mips_fclass_w, 1706 MSA128WOpnd>; 1707class FCLASS_D_DESC : MSA_2RF_DESC_BASE<"fclass.d", int_mips_fclass_d, 1708 MSA128DOpnd>; 1709 1710class FCLE_W_DESC : MSA_3RF_DESC_BASE<"fcle.w", vfsetole_v4f32, MSA128WOpnd>; 1711class FCLE_D_DESC : MSA_3RF_DESC_BASE<"fcle.d", vfsetole_v2f64, MSA128DOpnd>; 1712 1713class FCLT_W_DESC : MSA_3RF_DESC_BASE<"fclt.w", vfsetolt_v4f32, MSA128WOpnd>; 1714class FCLT_D_DESC : MSA_3RF_DESC_BASE<"fclt.d", vfsetolt_v2f64, MSA128DOpnd>; 1715 1716class FCNE_W_DESC : MSA_3RF_DESC_BASE<"fcne.w", vfsetone_v4f32, MSA128WOpnd>, 1717 IsCommutable; 1718class FCNE_D_DESC : MSA_3RF_DESC_BASE<"fcne.d", vfsetone_v2f64, MSA128DOpnd>, 1719 IsCommutable; 1720 1721class FCOR_W_DESC : MSA_3RF_DESC_BASE<"fcor.w", vfsetord_v4f32, MSA128WOpnd>, 1722 IsCommutable; 1723class FCOR_D_DESC : MSA_3RF_DESC_BASE<"fcor.d", vfsetord_v2f64, MSA128DOpnd>, 1724 IsCommutable; 1725 1726class FCUEQ_W_DESC : MSA_3RF_DESC_BASE<"fcueq.w", vfsetueq_v4f32, MSA128WOpnd>, 1727 IsCommutable; 1728class FCUEQ_D_DESC : MSA_3RF_DESC_BASE<"fcueq.d", vfsetueq_v2f64, MSA128DOpnd>, 1729 IsCommutable; 1730 1731class FCULE_W_DESC : MSA_3RF_DESC_BASE<"fcule.w", vfsetule_v4f32, MSA128WOpnd>, 1732 IsCommutable; 1733class FCULE_D_DESC : MSA_3RF_DESC_BASE<"fcule.d", vfsetule_v2f64, MSA128DOpnd>, 1734 IsCommutable; 1735 1736class FCULT_W_DESC : MSA_3RF_DESC_BASE<"fcult.w", vfsetult_v4f32, MSA128WOpnd>, 1737 IsCommutable; 1738class FCULT_D_DESC : MSA_3RF_DESC_BASE<"fcult.d", vfsetult_v2f64, MSA128DOpnd>, 1739 IsCommutable; 1740 1741class FCUN_W_DESC : MSA_3RF_DESC_BASE<"fcun.w", vfsetun_v4f32, MSA128WOpnd>, 1742 IsCommutable; 1743class FCUN_D_DESC : MSA_3RF_DESC_BASE<"fcun.d", vfsetun_v2f64, MSA128DOpnd>, 1744 IsCommutable; 1745 1746class FCUNE_W_DESC : MSA_3RF_DESC_BASE<"fcune.w", vfsetune_v4f32, MSA128WOpnd>, 1747 IsCommutable; 1748class FCUNE_D_DESC : MSA_3RF_DESC_BASE<"fcune.d", vfsetune_v2f64, MSA128DOpnd>, 1749 IsCommutable; 1750 1751class FDIV_W_DESC : MSA_3RF_DESC_BASE<"fdiv.w", fdiv, MSA128WOpnd>; 1752class FDIV_D_DESC : MSA_3RF_DESC_BASE<"fdiv.d", fdiv, MSA128DOpnd>; 1753 1754class FEXDO_H_DESC : MSA_3RF_DESC_BASE<"fexdo.h", int_mips_fexdo_h, 1755 MSA128HOpnd, MSA128WOpnd, MSA128WOpnd>; 1756class FEXDO_W_DESC : MSA_3RF_DESC_BASE<"fexdo.w", int_mips_fexdo_w, 1757 MSA128WOpnd, MSA128DOpnd, MSA128DOpnd>; 1758 1759class FEXP2_W_DESC : MSA_3RF_DESC_BASE<"fexp2.w", int_mips_fexp2_w, 1760 MSA128WOpnd>; 1761class FEXP2_D_DESC : MSA_3RF_DESC_BASE<"fexp2.d", int_mips_fexp2_d, 1762 MSA128DOpnd>; 1763 1764class FEXUPL_W_DESC : MSA_2RF_DESC_BASE<"fexupl.w", int_mips_fexupl_w, 1765 MSA128WOpnd, MSA128HOpnd>; 1766class FEXUPL_D_DESC : MSA_2RF_DESC_BASE<"fexupl.d", int_mips_fexupl_d, 1767 MSA128DOpnd, MSA128WOpnd>; 1768 1769class FEXUPR_W_DESC : MSA_2RF_DESC_BASE<"fexupr.w", int_mips_fexupr_w, 1770 MSA128WOpnd, MSA128HOpnd>; 1771class FEXUPR_D_DESC : MSA_2RF_DESC_BASE<"fexupr.d", int_mips_fexupr_d, 1772 MSA128DOpnd, MSA128WOpnd>; 1773 1774class FFINT_S_W_DESC : MSA_2RF_DESC_BASE<"ffint_s.w", sint_to_fp, MSA128WOpnd>; 1775class FFINT_S_D_DESC : MSA_2RF_DESC_BASE<"ffint_s.d", sint_to_fp, MSA128DOpnd>; 1776 1777class FFINT_U_W_DESC : MSA_2RF_DESC_BASE<"ffint_u.w", uint_to_fp, MSA128WOpnd>; 1778class FFINT_U_D_DESC : MSA_2RF_DESC_BASE<"ffint_u.d", uint_to_fp, MSA128DOpnd>; 1779 1780class FFQL_W_DESC : MSA_2RF_DESC_BASE<"ffql.w", int_mips_ffql_w, 1781 MSA128WOpnd, MSA128HOpnd>; 1782class FFQL_D_DESC : MSA_2RF_DESC_BASE<"ffql.d", int_mips_ffql_d, 1783 MSA128DOpnd, MSA128WOpnd>; 1784 1785class FFQR_W_DESC : MSA_2RF_DESC_BASE<"ffqr.w", int_mips_ffqr_w, 1786 MSA128WOpnd, MSA128HOpnd>; 1787class FFQR_D_DESC : MSA_2RF_DESC_BASE<"ffqr.d", int_mips_ffqr_d, 1788 MSA128DOpnd, MSA128WOpnd>; 1789 1790class FILL_B_DESC : MSA_2R_FILL_DESC_BASE<"fill.b", v16i8, vsplati8, 1791 MSA128BOpnd, GPR32Opnd>; 1792class FILL_H_DESC : MSA_2R_FILL_DESC_BASE<"fill.h", v8i16, vsplati16, 1793 MSA128HOpnd, GPR32Opnd>; 1794class FILL_W_DESC : MSA_2R_FILL_DESC_BASE<"fill.w", v4i32, vsplati32, 1795 MSA128WOpnd, GPR32Opnd>; 1796 1797class FLOG2_W_DESC : MSA_2RF_DESC_BASE<"flog2.w", flog2, MSA128WOpnd>; 1798class FLOG2_D_DESC : MSA_2RF_DESC_BASE<"flog2.d", flog2, MSA128DOpnd>; 1799 1800class FMADD_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.w", fma, MSA128WOpnd>; 1801class FMADD_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.d", fma, MSA128DOpnd>; 1802 1803class FMAX_W_DESC : MSA_3RF_DESC_BASE<"fmax.w", int_mips_fmax_w, MSA128WOpnd>; 1804class FMAX_D_DESC : MSA_3RF_DESC_BASE<"fmax.d", int_mips_fmax_d, MSA128DOpnd>; 1805 1806class FMAX_A_W_DESC : MSA_3RF_DESC_BASE<"fmax_a.w", int_mips_fmax_a_w, 1807 MSA128WOpnd>; 1808class FMAX_A_D_DESC : MSA_3RF_DESC_BASE<"fmax_a.d", int_mips_fmax_a_d, 1809 MSA128DOpnd>; 1810 1811class FMIN_W_DESC : MSA_3RF_DESC_BASE<"fmin.w", int_mips_fmin_w, MSA128WOpnd>; 1812class FMIN_D_DESC : MSA_3RF_DESC_BASE<"fmin.d", int_mips_fmin_d, MSA128DOpnd>; 1813 1814class FMIN_A_W_DESC : MSA_3RF_DESC_BASE<"fmin_a.w", int_mips_fmin_a_w, 1815 MSA128WOpnd>; 1816class FMIN_A_D_DESC : MSA_3RF_DESC_BASE<"fmin_a.d", int_mips_fmin_a_d, 1817 MSA128DOpnd>; 1818 1819class FMSUB_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.w", int_mips_fmsub_w, 1820 MSA128WOpnd>; 1821class FMSUB_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.d", int_mips_fmsub_d, 1822 MSA128DOpnd>; 1823 1824class FMUL_W_DESC : MSA_3RF_DESC_BASE<"fmul.w", fmul, MSA128WOpnd>; 1825class FMUL_D_DESC : MSA_3RF_DESC_BASE<"fmul.d", fmul, MSA128DOpnd>; 1826 1827class FRINT_W_DESC : MSA_2RF_DESC_BASE<"frint.w", frint, MSA128WOpnd>; 1828class FRINT_D_DESC : MSA_2RF_DESC_BASE<"frint.d", frint, MSA128DOpnd>; 1829 1830class FRCP_W_DESC : MSA_2RF_DESC_BASE<"frcp.w", int_mips_frcp_w, MSA128WOpnd>; 1831class FRCP_D_DESC : MSA_2RF_DESC_BASE<"frcp.d", int_mips_frcp_d, MSA128DOpnd>; 1832 1833class FRSQRT_W_DESC : MSA_2RF_DESC_BASE<"frsqrt.w", int_mips_frsqrt_w, 1834 MSA128WOpnd>; 1835class FRSQRT_D_DESC : MSA_2RF_DESC_BASE<"frsqrt.d", int_mips_frsqrt_d, 1836 MSA128DOpnd>; 1837 1838class FSAF_W_DESC : MSA_3RF_DESC_BASE<"fsaf.w", int_mips_fsaf_w, MSA128WOpnd>; 1839class FSAF_D_DESC : MSA_3RF_DESC_BASE<"fsaf.d", int_mips_fsaf_d, MSA128DOpnd>; 1840 1841class FSEQ_W_DESC : MSA_3RF_DESC_BASE<"fseq.w", int_mips_fseq_w, MSA128WOpnd>; 1842class FSEQ_D_DESC : MSA_3RF_DESC_BASE<"fseq.d", int_mips_fseq_d, MSA128DOpnd>; 1843 1844class FSLE_W_DESC : MSA_3RF_DESC_BASE<"fsle.w", int_mips_fsle_w, MSA128WOpnd>; 1845class FSLE_D_DESC : MSA_3RF_DESC_BASE<"fsle.d", int_mips_fsle_d, MSA128DOpnd>; 1846 1847class FSLT_W_DESC : MSA_3RF_DESC_BASE<"fslt.w", int_mips_fslt_w, MSA128WOpnd>; 1848class FSLT_D_DESC : MSA_3RF_DESC_BASE<"fslt.d", int_mips_fslt_d, MSA128DOpnd>; 1849 1850class FSNE_W_DESC : MSA_3RF_DESC_BASE<"fsne.w", int_mips_fsne_w, MSA128WOpnd>; 1851class FSNE_D_DESC : MSA_3RF_DESC_BASE<"fsne.d", int_mips_fsne_d, MSA128DOpnd>; 1852 1853class FSOR_W_DESC : MSA_3RF_DESC_BASE<"fsor.w", int_mips_fsor_w, MSA128WOpnd>; 1854class FSOR_D_DESC : MSA_3RF_DESC_BASE<"fsor.d", int_mips_fsor_d, MSA128DOpnd>; 1855 1856class FSQRT_W_DESC : MSA_2RF_DESC_BASE<"fsqrt.w", fsqrt, MSA128WOpnd>; 1857class FSQRT_D_DESC : MSA_2RF_DESC_BASE<"fsqrt.d", fsqrt, MSA128DOpnd>; 1858 1859class FSUB_W_DESC : MSA_3RF_DESC_BASE<"fsub.w", fsub, MSA128WOpnd>; 1860class FSUB_D_DESC : MSA_3RF_DESC_BASE<"fsub.d", fsub, MSA128DOpnd>; 1861 1862class FSUEQ_W_DESC : MSA_3RF_DESC_BASE<"fsueq.w", int_mips_fsueq_w, 1863 MSA128WOpnd>; 1864class FSUEQ_D_DESC : MSA_3RF_DESC_BASE<"fsueq.d", int_mips_fsueq_d, 1865 MSA128DOpnd>; 1866 1867class FSULE_W_DESC : MSA_3RF_DESC_BASE<"fsule.w", int_mips_fsule_w, 1868 MSA128WOpnd>; 1869class FSULE_D_DESC : MSA_3RF_DESC_BASE<"fsule.d", int_mips_fsule_d, 1870 MSA128DOpnd>; 1871 1872class FSULT_W_DESC : MSA_3RF_DESC_BASE<"fsult.w", int_mips_fsult_w, 1873 MSA128WOpnd>; 1874class FSULT_D_DESC : MSA_3RF_DESC_BASE<"fsult.d", int_mips_fsult_d, 1875 MSA128DOpnd>; 1876 1877class FSUN_W_DESC : MSA_3RF_DESC_BASE<"fsun.w", int_mips_fsun_w, 1878 MSA128WOpnd>; 1879class FSUN_D_DESC : MSA_3RF_DESC_BASE<"fsun.d", int_mips_fsun_d, 1880 MSA128DOpnd>; 1881 1882class FSUNE_W_DESC : MSA_3RF_DESC_BASE<"fsune.w", int_mips_fsune_w, 1883 MSA128WOpnd>; 1884class FSUNE_D_DESC : MSA_3RF_DESC_BASE<"fsune.d", int_mips_fsune_d, 1885 MSA128DOpnd>; 1886 1887class FTRUNC_S_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.w", fp_to_sint, 1888 MSA128WOpnd>; 1889class FTRUNC_S_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.d", fp_to_sint, 1890 MSA128DOpnd>; 1891 1892class FTRUNC_U_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.w", fp_to_uint, 1893 MSA128WOpnd>; 1894class FTRUNC_U_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.d", fp_to_uint, 1895 MSA128DOpnd>; 1896 1897class FTINT_S_W_DESC : MSA_2RF_DESC_BASE<"ftint_s.w", int_mips_ftint_s_w, 1898 MSA128WOpnd>; 1899class FTINT_S_D_DESC : MSA_2RF_DESC_BASE<"ftint_s.d", int_mips_ftint_s_d, 1900 MSA128DOpnd>; 1901 1902class FTINT_U_W_DESC : MSA_2RF_DESC_BASE<"ftint_u.w", int_mips_ftint_u_w, 1903 MSA128WOpnd>; 1904class FTINT_U_D_DESC : MSA_2RF_DESC_BASE<"ftint_u.d", int_mips_ftint_u_d, 1905 MSA128DOpnd>; 1906 1907class FTQ_H_DESC : MSA_3RF_DESC_BASE<"ftq.h", int_mips_ftq_h, 1908 MSA128HOpnd, MSA128WOpnd, MSA128WOpnd>; 1909class FTQ_W_DESC : MSA_3RF_DESC_BASE<"ftq.w", int_mips_ftq_w, 1910 MSA128WOpnd, MSA128DOpnd, MSA128DOpnd>; 1911 1912class HADD_S_H_DESC : MSA_3R_DESC_BASE<"hadd_s.h", int_mips_hadd_s_h, 1913 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1914class HADD_S_W_DESC : MSA_3R_DESC_BASE<"hadd_s.w", int_mips_hadd_s_w, 1915 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 1916class HADD_S_D_DESC : MSA_3R_DESC_BASE<"hadd_s.d", int_mips_hadd_s_d, 1917 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 1918 1919class HADD_U_H_DESC : MSA_3R_DESC_BASE<"hadd_u.h", int_mips_hadd_u_h, 1920 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1921class HADD_U_W_DESC : MSA_3R_DESC_BASE<"hadd_u.w", int_mips_hadd_u_w, 1922 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 1923class HADD_U_D_DESC : MSA_3R_DESC_BASE<"hadd_u.d", int_mips_hadd_u_d, 1924 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 1925 1926class HSUB_S_H_DESC : MSA_3R_DESC_BASE<"hsub_s.h", int_mips_hsub_s_h, 1927 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1928class HSUB_S_W_DESC : MSA_3R_DESC_BASE<"hsub_s.w", int_mips_hsub_s_w, 1929 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 1930class HSUB_S_D_DESC : MSA_3R_DESC_BASE<"hsub_s.d", int_mips_hsub_s_d, 1931 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 1932 1933class HSUB_U_H_DESC : MSA_3R_DESC_BASE<"hsub_u.h", int_mips_hsub_u_h, 1934 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1935class HSUB_U_W_DESC : MSA_3R_DESC_BASE<"hsub_u.w", int_mips_hsub_u_w, 1936 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 1937class HSUB_U_D_DESC : MSA_3R_DESC_BASE<"hsub_u.d", int_mips_hsub_u_d, 1938 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 1939 1940class ILVEV_B_DESC : MSA_3R_DESC_BASE<"ilvev.b", MipsILVEV, MSA128BOpnd>; 1941class ILVEV_H_DESC : MSA_3R_DESC_BASE<"ilvev.h", MipsILVEV, MSA128HOpnd>; 1942class ILVEV_W_DESC : MSA_3R_DESC_BASE<"ilvev.w", MipsILVEV, MSA128WOpnd>; 1943class ILVEV_D_DESC : MSA_3R_DESC_BASE<"ilvev.d", MipsILVEV, MSA128DOpnd>; 1944 1945class ILVL_B_DESC : MSA_3R_DESC_BASE<"ilvl.b", MipsILVL, MSA128BOpnd>; 1946class ILVL_H_DESC : MSA_3R_DESC_BASE<"ilvl.h", MipsILVL, MSA128HOpnd>; 1947class ILVL_W_DESC : MSA_3R_DESC_BASE<"ilvl.w", MipsILVL, MSA128WOpnd>; 1948class ILVL_D_DESC : MSA_3R_DESC_BASE<"ilvl.d", MipsILVL, MSA128DOpnd>; 1949 1950class ILVOD_B_DESC : MSA_3R_DESC_BASE<"ilvod.b", MipsILVOD, MSA128BOpnd>; 1951class ILVOD_H_DESC : MSA_3R_DESC_BASE<"ilvod.h", MipsILVOD, MSA128HOpnd>; 1952class ILVOD_W_DESC : MSA_3R_DESC_BASE<"ilvod.w", MipsILVOD, MSA128WOpnd>; 1953class ILVOD_D_DESC : MSA_3R_DESC_BASE<"ilvod.d", MipsILVOD, MSA128DOpnd>; 1954 1955class ILVR_B_DESC : MSA_3R_DESC_BASE<"ilvr.b", MipsILVR, MSA128BOpnd>; 1956class ILVR_H_DESC : MSA_3R_DESC_BASE<"ilvr.h", MipsILVR, MSA128HOpnd>; 1957class ILVR_W_DESC : MSA_3R_DESC_BASE<"ilvr.w", MipsILVR, MSA128WOpnd>; 1958class ILVR_D_DESC : MSA_3R_DESC_BASE<"ilvr.d", MipsILVR, MSA128DOpnd>; 1959 1960class INSERT_B_DESC : MSA_INSERT_DESC_BASE<"insert.b", vinsert_v16i8, MSA128B, 1961 GPR32>; 1962class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", vinsert_v8i16, MSA128H, 1963 GPR32>; 1964class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", vinsert_v4i32, MSA128W, 1965 GPR32>; 1966 1967class INSERT_FW_PSEUDO_DESC : MSA_INSERT_PSEUDO_BASE<vector_insert, v4f32, 1968 MSA128W, FGR32>; 1969class INSERT_FD_PSEUDO_DESC : MSA_INSERT_PSEUDO_BASE<vector_insert, v2f64, 1970 MSA128D, FGR64>; 1971 1972class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b, MSA128B>; 1973class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h, MSA128H>; 1974class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w, MSA128W>; 1975class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d, MSA128D>; 1976 1977class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1978 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem, 1979 ComplexPattern Addr = addrRegImm, 1980 InstrItinClass itin = NoItinerary> { 1981 dag OutOperandList = (outs RCWD:$wd); 1982 dag InOperandList = (ins MemOpnd:$addr); 1983 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 1984 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))]; 1985 InstrItinClass Itinerary = itin; 1986} 1987 1988class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, MSA128B>; 1989class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, MSA128H>; 1990class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, MSA128W>; 1991class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, MSA128D>; 1992 1993class LDI_B_DESC : MSA_I10_LDI_DESC_BASE<"ldi.b", MSA128B>; 1994class LDI_H_DESC : MSA_I10_LDI_DESC_BASE<"ldi.h", MSA128H>; 1995class LDI_W_DESC : MSA_I10_LDI_DESC_BASE<"ldi.w", MSA128W>; 1996class LDI_D_DESC : MSA_I10_LDI_DESC_BASE<"ldi.d", MSA128D>; 1997 1998class LDX_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1999 ValueType TyNode, RegisterClass RCWD, 2000 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg, 2001 InstrItinClass itin = NoItinerary> { 2002 dag OutOperandList = (outs RCWD:$wd); 2003 dag InOperandList = (ins MemOpnd:$addr); 2004 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2005 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))]; 2006 InstrItinClass Itinerary = itin; 2007} 2008 2009class LDX_B_DESC : LDX_DESC_BASE<"ldx.b", load, v16i8, MSA128B>; 2010class LDX_H_DESC : LDX_DESC_BASE<"ldx.h", load, v8i16, MSA128H>; 2011class LDX_W_DESC : LDX_DESC_BASE<"ldx.w", load, v4i32, MSA128W>; 2012class LDX_D_DESC : LDX_DESC_BASE<"ldx.d", load, v2i64, MSA128D>; 2013 2014class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h, 2015 MSA128HOpnd>; 2016class MADD_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.w", int_mips_madd_q_w, 2017 MSA128WOpnd>; 2018 2019class MADDR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.h", int_mips_maddr_q_h, 2020 MSA128HOpnd>; 2021class MADDR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.w", int_mips_maddr_q_w, 2022 MSA128WOpnd>; 2023 2024class MADDV_B_DESC : MSA_3R_4R_DESC_BASE<"maddv.b", int_mips_maddv_b, 2025 MSA128BOpnd>; 2026class MADDV_H_DESC : MSA_3R_4R_DESC_BASE<"maddv.h", int_mips_maddv_h, 2027 MSA128HOpnd>; 2028class MADDV_W_DESC : MSA_3R_4R_DESC_BASE<"maddv.w", int_mips_maddv_w, 2029 MSA128WOpnd>; 2030class MADDV_D_DESC : MSA_3R_4R_DESC_BASE<"maddv.d", int_mips_maddv_d, 2031 MSA128DOpnd>; 2032 2033class MAX_A_B_DESC : MSA_3R_DESC_BASE<"max_a.b", int_mips_max_a_b, MSA128BOpnd>; 2034class MAX_A_H_DESC : MSA_3R_DESC_BASE<"max_a.h", int_mips_max_a_h, MSA128HOpnd>; 2035class MAX_A_W_DESC : MSA_3R_DESC_BASE<"max_a.w", int_mips_max_a_w, MSA128WOpnd>; 2036class MAX_A_D_DESC : MSA_3R_DESC_BASE<"max_a.d", int_mips_max_a_d, MSA128DOpnd>; 2037 2038class MAX_S_B_DESC : MSA_3R_DESC_BASE<"max_s.b", MipsVSMax, MSA128BOpnd>; 2039class MAX_S_H_DESC : MSA_3R_DESC_BASE<"max_s.h", MipsVSMax, MSA128HOpnd>; 2040class MAX_S_W_DESC : MSA_3R_DESC_BASE<"max_s.w", MipsVSMax, MSA128WOpnd>; 2041class MAX_S_D_DESC : MSA_3R_DESC_BASE<"max_s.d", MipsVSMax, MSA128DOpnd>; 2042 2043class MAX_U_B_DESC : MSA_3R_DESC_BASE<"max_u.b", MipsVUMax, MSA128BOpnd>; 2044class MAX_U_H_DESC : MSA_3R_DESC_BASE<"max_u.h", MipsVUMax, MSA128HOpnd>; 2045class MAX_U_W_DESC : MSA_3R_DESC_BASE<"max_u.w", MipsVUMax, MSA128WOpnd>; 2046class MAX_U_D_DESC : MSA_3R_DESC_BASE<"max_u.d", MipsVUMax, MSA128DOpnd>; 2047 2048class MAXI_S_B_DESC : MSA_I5_DESC_BASE<"maxi_s.b", MipsVSMax, vsplati8_simm5, 2049 MSA128BOpnd>; 2050class MAXI_S_H_DESC : MSA_I5_DESC_BASE<"maxi_s.h", MipsVSMax, vsplati16_simm5, 2051 MSA128HOpnd>; 2052class MAXI_S_W_DESC : MSA_I5_DESC_BASE<"maxi_s.w", MipsVSMax, vsplati32_simm5, 2053 MSA128WOpnd>; 2054class MAXI_S_D_DESC : MSA_I5_DESC_BASE<"maxi_s.d", MipsVSMax, vsplati64_simm5, 2055 MSA128DOpnd>; 2056 2057class MAXI_U_B_DESC : MSA_I5_DESC_BASE<"maxi_u.b", MipsVUMax, vsplati8_uimm5, 2058 MSA128BOpnd>; 2059class MAXI_U_H_DESC : MSA_I5_DESC_BASE<"maxi_u.h", MipsVUMax, vsplati16_uimm5, 2060 MSA128HOpnd>; 2061class MAXI_U_W_DESC : MSA_I5_DESC_BASE<"maxi_u.w", MipsVUMax, vsplati32_uimm5, 2062 MSA128WOpnd>; 2063class MAXI_U_D_DESC : MSA_I5_DESC_BASE<"maxi_u.d", MipsVUMax, vsplati64_uimm5, 2064 MSA128DOpnd>; 2065 2066class MIN_A_B_DESC : MSA_3R_DESC_BASE<"min_a.b", int_mips_min_a_b, MSA128BOpnd>; 2067class MIN_A_H_DESC : MSA_3R_DESC_BASE<"min_a.h", int_mips_min_a_h, MSA128HOpnd>; 2068class MIN_A_W_DESC : MSA_3R_DESC_BASE<"min_a.w", int_mips_min_a_w, MSA128WOpnd>; 2069class MIN_A_D_DESC : MSA_3R_DESC_BASE<"min_a.d", int_mips_min_a_d, MSA128DOpnd>; 2070 2071class MIN_S_B_DESC : MSA_3R_DESC_BASE<"min_s.b", MipsVSMin, MSA128BOpnd>; 2072class MIN_S_H_DESC : MSA_3R_DESC_BASE<"min_s.h", MipsVSMin, MSA128HOpnd>; 2073class MIN_S_W_DESC : MSA_3R_DESC_BASE<"min_s.w", MipsVSMin, MSA128WOpnd>; 2074class MIN_S_D_DESC : MSA_3R_DESC_BASE<"min_s.d", MipsVSMin, MSA128DOpnd>; 2075 2076class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", MipsVUMin, MSA128BOpnd>; 2077class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", MipsVUMin, MSA128HOpnd>; 2078class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", MipsVUMin, MSA128WOpnd>; 2079class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", MipsVUMin, MSA128DOpnd>; 2080 2081class MINI_S_B_DESC : MSA_I5_DESC_BASE<"mini_s.b", MipsVSMin, vsplati8_simm5, 2082 MSA128BOpnd>; 2083class MINI_S_H_DESC : MSA_I5_DESC_BASE<"mini_s.h", MipsVSMin, vsplati16_simm5, 2084 MSA128HOpnd>; 2085class MINI_S_W_DESC : MSA_I5_DESC_BASE<"mini_s.w", MipsVSMin, vsplati32_simm5, 2086 MSA128WOpnd>; 2087class MINI_S_D_DESC : MSA_I5_DESC_BASE<"mini_s.d", MipsVSMin, vsplati64_simm5, 2088 MSA128DOpnd>; 2089 2090class MINI_U_B_DESC : MSA_I5_DESC_BASE<"mini_u.b", MipsVUMin, vsplati8_uimm5, 2091 MSA128BOpnd>; 2092class MINI_U_H_DESC : MSA_I5_DESC_BASE<"mini_u.h", MipsVUMin, vsplati16_uimm5, 2093 MSA128HOpnd>; 2094class MINI_U_W_DESC : MSA_I5_DESC_BASE<"mini_u.w", MipsVUMin, vsplati32_uimm5, 2095 MSA128WOpnd>; 2096class MINI_U_D_DESC : MSA_I5_DESC_BASE<"mini_u.d", MipsVUMin, vsplati64_uimm5, 2097 MSA128DOpnd>; 2098 2099class MOD_S_B_DESC : MSA_3R_DESC_BASE<"mod_s.b", srem, MSA128BOpnd>; 2100class MOD_S_H_DESC : MSA_3R_DESC_BASE<"mod_s.h", srem, MSA128HOpnd>; 2101class MOD_S_W_DESC : MSA_3R_DESC_BASE<"mod_s.w", srem, MSA128WOpnd>; 2102class MOD_S_D_DESC : MSA_3R_DESC_BASE<"mod_s.d", srem, MSA128DOpnd>; 2103 2104class MOD_U_B_DESC : MSA_3R_DESC_BASE<"mod_u.b", urem, MSA128BOpnd>; 2105class MOD_U_H_DESC : MSA_3R_DESC_BASE<"mod_u.h", urem, MSA128HOpnd>; 2106class MOD_U_W_DESC : MSA_3R_DESC_BASE<"mod_u.w", urem, MSA128WOpnd>; 2107class MOD_U_D_DESC : MSA_3R_DESC_BASE<"mod_u.d", urem, MSA128DOpnd>; 2108 2109class MOVE_V_DESC { 2110 dag OutOperandList = (outs MSA128B:$wd); 2111 dag InOperandList = (ins MSA128B:$ws); 2112 string AsmString = "move.v\t$wd, $ws"; 2113 list<dag> Pattern = []; 2114 InstrItinClass Itinerary = NoItinerary; 2115} 2116 2117class MSUB_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.h", int_mips_msub_q_h, 2118 MSA128HOpnd>; 2119class MSUB_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.w", int_mips_msub_q_w, 2120 MSA128WOpnd>; 2121 2122class MSUBR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.h", int_mips_msubr_q_h, 2123 MSA128HOpnd>; 2124class MSUBR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.w", int_mips_msubr_q_w, 2125 MSA128WOpnd>; 2126 2127class MSUBV_B_DESC : MSA_3R_4R_DESC_BASE<"msubv.b", int_mips_msubv_b, 2128 MSA128BOpnd>; 2129class MSUBV_H_DESC : MSA_3R_4R_DESC_BASE<"msubv.h", int_mips_msubv_h, 2130 MSA128HOpnd>; 2131class MSUBV_W_DESC : MSA_3R_4R_DESC_BASE<"msubv.w", int_mips_msubv_w, 2132 MSA128WOpnd>; 2133class MSUBV_D_DESC : MSA_3R_4R_DESC_BASE<"msubv.d", int_mips_msubv_d, 2134 MSA128DOpnd>; 2135 2136class MUL_Q_H_DESC : MSA_3RF_DESC_BASE<"mul_q.h", int_mips_mul_q_h, 2137 MSA128HOpnd>; 2138class MUL_Q_W_DESC : MSA_3RF_DESC_BASE<"mul_q.w", int_mips_mul_q_w, 2139 MSA128WOpnd>; 2140 2141class MULR_Q_H_DESC : MSA_3RF_DESC_BASE<"mulr_q.h", int_mips_mulr_q_h, 2142 MSA128HOpnd>; 2143class MULR_Q_W_DESC : MSA_3RF_DESC_BASE<"mulr_q.w", int_mips_mulr_q_w, 2144 MSA128WOpnd>; 2145 2146class MULV_B_DESC : MSA_3R_DESC_BASE<"mulv.b", mul, MSA128BOpnd>; 2147class MULV_H_DESC : MSA_3R_DESC_BASE<"mulv.h", mul, MSA128HOpnd>; 2148class MULV_W_DESC : MSA_3R_DESC_BASE<"mulv.w", mul, MSA128WOpnd>; 2149class MULV_D_DESC : MSA_3R_DESC_BASE<"mulv.d", mul, MSA128DOpnd>; 2150 2151class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b, MSA128BOpnd>; 2152class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h, MSA128HOpnd>; 2153class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w, MSA128WOpnd>; 2154class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d, MSA128DOpnd>; 2155 2156class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", ctlz, MSA128BOpnd>; 2157class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", ctlz, MSA128HOpnd>; 2158class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", ctlz, MSA128WOpnd>; 2159class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", ctlz, MSA128DOpnd>; 2160 2161class NOR_V_DESC : MSA_VEC_DESC_BASE<"nor.v", MipsVNOR, MSA128B>; 2162class NOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128H>; 2163class NOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128W>; 2164class NOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128D>; 2165 2166class NORI_B_DESC : MSA_I8_DESC_BASE<"nori.b", MipsVNOR, vsplati8_uimm8, 2167 MSA128BOpnd>; 2168 2169class OR_V_DESC : MSA_VEC_DESC_BASE<"or.v", or, MSA128B>; 2170class OR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128H>; 2171class OR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128W>; 2172class OR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128D>; 2173 2174class ORI_B_DESC : MSA_I8_DESC_BASE<"ori.b", or, vsplati8_uimm8, MSA128BOpnd>; 2175 2176class PCKEV_B_DESC : MSA_3R_DESC_BASE<"pckev.b", MipsPCKEV, MSA128BOpnd>; 2177class PCKEV_H_DESC : MSA_3R_DESC_BASE<"pckev.h", MipsPCKEV, MSA128HOpnd>; 2178class PCKEV_W_DESC : MSA_3R_DESC_BASE<"pckev.w", MipsPCKEV, MSA128WOpnd>; 2179class PCKEV_D_DESC : MSA_3R_DESC_BASE<"pckev.d", MipsPCKEV, MSA128DOpnd>; 2180 2181class PCKOD_B_DESC : MSA_3R_DESC_BASE<"pckod.b", MipsPCKOD, MSA128BOpnd>; 2182class PCKOD_H_DESC : MSA_3R_DESC_BASE<"pckod.h", MipsPCKOD, MSA128HOpnd>; 2183class PCKOD_W_DESC : MSA_3R_DESC_BASE<"pckod.w", MipsPCKOD, MSA128WOpnd>; 2184class PCKOD_D_DESC : MSA_3R_DESC_BASE<"pckod.d", MipsPCKOD, MSA128DOpnd>; 2185 2186class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", ctpop, MSA128BOpnd>; 2187class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", ctpop, MSA128HOpnd>; 2188class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", ctpop, MSA128WOpnd>; 2189class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", ctpop, MSA128DOpnd>; 2190 2191class SAT_S_B_DESC : MSA_BIT_B_DESC_BASE<"sat_s.b", int_mips_sat_s_b, MSA128B>; 2192class SAT_S_H_DESC : MSA_BIT_H_DESC_BASE<"sat_s.h", int_mips_sat_s_h, MSA128H>; 2193class SAT_S_W_DESC : MSA_BIT_W_DESC_BASE<"sat_s.w", int_mips_sat_s_w, MSA128W>; 2194class SAT_S_D_DESC : MSA_BIT_D_DESC_BASE<"sat_s.d", int_mips_sat_s_d, MSA128D>; 2195 2196class SAT_U_B_DESC : MSA_BIT_B_DESC_BASE<"sat_u.b", int_mips_sat_u_b, MSA128B>; 2197class SAT_U_H_DESC : MSA_BIT_H_DESC_BASE<"sat_u.h", int_mips_sat_u_h, MSA128H>; 2198class SAT_U_W_DESC : MSA_BIT_W_DESC_BASE<"sat_u.w", int_mips_sat_u_w, MSA128W>; 2199class SAT_U_D_DESC : MSA_BIT_D_DESC_BASE<"sat_u.d", int_mips_sat_u_d, MSA128D>; 2200 2201class SHF_B_DESC : MSA_I8_SHF_DESC_BASE<"shf.b", MSA128BOpnd>; 2202class SHF_H_DESC : MSA_I8_SHF_DESC_BASE<"shf.h", MSA128HOpnd>; 2203class SHF_W_DESC : MSA_I8_SHF_DESC_BASE<"shf.w", MSA128WOpnd>; 2204 2205class SLD_B_DESC : MSA_3R_DESC_BASE<"sld.b", int_mips_sld_b, MSA128BOpnd>; 2206class SLD_H_DESC : MSA_3R_DESC_BASE<"sld.h", int_mips_sld_h, MSA128HOpnd>; 2207class SLD_W_DESC : MSA_3R_DESC_BASE<"sld.w", int_mips_sld_w, MSA128WOpnd>; 2208class SLD_D_DESC : MSA_3R_DESC_BASE<"sld.d", int_mips_sld_d, MSA128DOpnd>; 2209 2210class SLDI_B_DESC : MSA_BIT_B_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128B>; 2211class SLDI_H_DESC : MSA_BIT_H_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128H>; 2212class SLDI_W_DESC : MSA_BIT_W_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128W>; 2213class SLDI_D_DESC : MSA_BIT_D_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128D>; 2214 2215class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", shl, MSA128BOpnd>; 2216class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", shl, MSA128HOpnd>; 2217class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", shl, MSA128WOpnd>; 2218class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", shl, MSA128DOpnd>; 2219 2220class SLLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.b", shl, vsplati8_uimm3, 2221 MSA128B>; 2222class SLLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.h", shl, vsplati16_uimm4, 2223 MSA128H>; 2224class SLLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.w", shl, vsplati32_uimm5, 2225 MSA128W>; 2226class SLLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.d", shl, vsplati64_uimm6, 2227 MSA128D>; 2228 2229class SPLAT_B_DESC : MSA_3R_DESC_BASE<"splat.b", int_mips_splat_b, MSA128BOpnd, 2230 MSA128BOpnd, GPR32Opnd>; 2231class SPLAT_H_DESC : MSA_3R_DESC_BASE<"splat.h", int_mips_splat_h, MSA128HOpnd, 2232 MSA128HOpnd, GPR32Opnd>; 2233class SPLAT_W_DESC : MSA_3R_DESC_BASE<"splat.w", int_mips_splat_w, MSA128WOpnd, 2234 MSA128WOpnd, GPR32Opnd>; 2235class SPLAT_D_DESC : MSA_3R_DESC_BASE<"splat.d", int_mips_splat_d, MSA128DOpnd, 2236 MSA128DOpnd, GPR32Opnd>; 2237 2238class SPLATI_B_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.b", vsplati8_uimm4, 2239 MSA128B>; 2240class SPLATI_H_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.h", vsplati16_uimm3, 2241 MSA128H>; 2242class SPLATI_W_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.w", vsplati32_uimm2, 2243 MSA128W>; 2244class SPLATI_D_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.d", vsplati64_uimm1, 2245 MSA128D>; 2246 2247class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", sra, MSA128BOpnd>; 2248class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", sra, MSA128HOpnd>; 2249class SRA_W_DESC : MSA_3R_DESC_BASE<"sra.w", sra, MSA128WOpnd>; 2250class SRA_D_DESC : MSA_3R_DESC_BASE<"sra.d", sra, MSA128DOpnd>; 2251 2252class SRAI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.b", sra, vsplati8_uimm3, 2253 MSA128B>; 2254class SRAI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.h", sra, vsplati16_uimm4, 2255 MSA128H>; 2256class SRAI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.w", sra, vsplati32_uimm5, 2257 MSA128W>; 2258class SRAI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.d", sra, vsplati64_uimm6, 2259 MSA128D>; 2260 2261class SRAR_B_DESC : MSA_3R_DESC_BASE<"srar.b", int_mips_srar_b, MSA128BOpnd>; 2262class SRAR_H_DESC : MSA_3R_DESC_BASE<"srar.h", int_mips_srar_h, MSA128HOpnd>; 2263class SRAR_W_DESC : MSA_3R_DESC_BASE<"srar.w", int_mips_srar_w, MSA128WOpnd>; 2264class SRAR_D_DESC : MSA_3R_DESC_BASE<"srar.d", int_mips_srar_d, MSA128DOpnd>; 2265 2266class SRARI_B_DESC : MSA_BIT_B_DESC_BASE<"srari.b", int_mips_srari_b, MSA128B>; 2267class SRARI_H_DESC : MSA_BIT_H_DESC_BASE<"srari.h", int_mips_srari_h, MSA128H>; 2268class SRARI_W_DESC : MSA_BIT_W_DESC_BASE<"srari.w", int_mips_srari_w, MSA128W>; 2269class SRARI_D_DESC : MSA_BIT_D_DESC_BASE<"srari.d", int_mips_srari_d, MSA128D>; 2270 2271class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", srl, MSA128BOpnd>; 2272class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", srl, MSA128HOpnd>; 2273class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", srl, MSA128WOpnd>; 2274class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", srl, MSA128DOpnd>; 2275 2276class SRLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.b", srl, vsplati8_uimm3, 2277 MSA128B>; 2278class SRLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.h", srl, vsplati16_uimm4, 2279 MSA128H>; 2280class SRLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.w", srl, vsplati32_uimm5, 2281 MSA128W>; 2282class SRLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.d", srl, vsplati64_uimm6, 2283 MSA128D>; 2284 2285class SRLR_B_DESC : MSA_3R_DESC_BASE<"srlr.b", int_mips_srlr_b, MSA128BOpnd>; 2286class SRLR_H_DESC : MSA_3R_DESC_BASE<"srlr.h", int_mips_srlr_h, MSA128HOpnd>; 2287class SRLR_W_DESC : MSA_3R_DESC_BASE<"srlr.w", int_mips_srlr_w, MSA128WOpnd>; 2288class SRLR_D_DESC : MSA_3R_DESC_BASE<"srlr.d", int_mips_srlr_d, MSA128DOpnd>; 2289 2290class SRLRI_B_DESC : MSA_BIT_B_DESC_BASE<"srlri.b", int_mips_srlri_b, MSA128B>; 2291class SRLRI_H_DESC : MSA_BIT_H_DESC_BASE<"srlri.h", int_mips_srlri_h, MSA128H>; 2292class SRLRI_W_DESC : MSA_BIT_W_DESC_BASE<"srlri.w", int_mips_srlri_w, MSA128W>; 2293class SRLRI_D_DESC : MSA_BIT_D_DESC_BASE<"srlri.d", int_mips_srlri_d, MSA128D>; 2294 2295class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2296 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem, 2297 ComplexPattern Addr = addrRegImm, 2298 InstrItinClass itin = NoItinerary> { 2299 dag OutOperandList = (outs); 2300 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr); 2301 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2302 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)]; 2303 InstrItinClass Itinerary = itin; 2304} 2305 2306class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, MSA128B>; 2307class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, MSA128H>; 2308class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, MSA128W>; 2309class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, MSA128D>; 2310 2311class STX_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2312 ValueType TyNode, RegisterClass RCWD, 2313 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg, 2314 InstrItinClass itin = NoItinerary> { 2315 dag OutOperandList = (outs); 2316 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr); 2317 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2318 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)]; 2319 InstrItinClass Itinerary = itin; 2320} 2321 2322class STX_B_DESC : STX_DESC_BASE<"stx.b", store, v16i8, MSA128B>; 2323class STX_H_DESC : STX_DESC_BASE<"stx.h", store, v8i16, MSA128H>; 2324class STX_W_DESC : STX_DESC_BASE<"stx.w", store, v4i32, MSA128W>; 2325class STX_D_DESC : STX_DESC_BASE<"stx.d", store, v2i64, MSA128D>; 2326 2327class SUBS_S_B_DESC : MSA_3R_DESC_BASE<"subs_s.b", int_mips_subs_s_b, 2328 MSA128BOpnd>; 2329class SUBS_S_H_DESC : MSA_3R_DESC_BASE<"subs_s.h", int_mips_subs_s_h, 2330 MSA128HOpnd>; 2331class SUBS_S_W_DESC : MSA_3R_DESC_BASE<"subs_s.w", int_mips_subs_s_w, 2332 MSA128WOpnd>; 2333class SUBS_S_D_DESC : MSA_3R_DESC_BASE<"subs_s.d", int_mips_subs_s_d, 2334 MSA128DOpnd>; 2335 2336class SUBS_U_B_DESC : MSA_3R_DESC_BASE<"subs_u.b", int_mips_subs_u_b, 2337 MSA128BOpnd>; 2338class SUBS_U_H_DESC : MSA_3R_DESC_BASE<"subs_u.h", int_mips_subs_u_h, 2339 MSA128HOpnd>; 2340class SUBS_U_W_DESC : MSA_3R_DESC_BASE<"subs_u.w", int_mips_subs_u_w, 2341 MSA128WOpnd>; 2342class SUBS_U_D_DESC : MSA_3R_DESC_BASE<"subs_u.d", int_mips_subs_u_d, 2343 MSA128DOpnd>; 2344 2345class SUBSUS_U_B_DESC : MSA_3R_DESC_BASE<"subsus_u.b", int_mips_subsus_u_b, 2346 MSA128BOpnd>; 2347class SUBSUS_U_H_DESC : MSA_3R_DESC_BASE<"subsus_u.h", int_mips_subsus_u_h, 2348 MSA128HOpnd>; 2349class SUBSUS_U_W_DESC : MSA_3R_DESC_BASE<"subsus_u.w", int_mips_subsus_u_w, 2350 MSA128WOpnd>; 2351class SUBSUS_U_D_DESC : MSA_3R_DESC_BASE<"subsus_u.d", int_mips_subsus_u_d, 2352 MSA128DOpnd>; 2353 2354class SUBSUU_S_B_DESC : MSA_3R_DESC_BASE<"subsuu_s.b", int_mips_subsuu_s_b, 2355 MSA128BOpnd>; 2356class SUBSUU_S_H_DESC : MSA_3R_DESC_BASE<"subsuu_s.h", int_mips_subsuu_s_h, 2357 MSA128HOpnd>; 2358class SUBSUU_S_W_DESC : MSA_3R_DESC_BASE<"subsuu_s.w", int_mips_subsuu_s_w, 2359 MSA128WOpnd>; 2360class SUBSUU_S_D_DESC : MSA_3R_DESC_BASE<"subsuu_s.d", int_mips_subsuu_s_d, 2361 MSA128DOpnd>; 2362 2363class SUBV_B_DESC : MSA_3R_DESC_BASE<"subv.b", sub, MSA128BOpnd>; 2364class SUBV_H_DESC : MSA_3R_DESC_BASE<"subv.h", sub, MSA128HOpnd>; 2365class SUBV_W_DESC : MSA_3R_DESC_BASE<"subv.w", sub, MSA128WOpnd>; 2366class SUBV_D_DESC : MSA_3R_DESC_BASE<"subv.d", sub, MSA128DOpnd>; 2367 2368class SUBVI_B_DESC : MSA_I5_DESC_BASE<"subvi.b", sub, vsplati8_uimm5, 2369 MSA128BOpnd>; 2370class SUBVI_H_DESC : MSA_I5_DESC_BASE<"subvi.h", sub, vsplati16_uimm5, 2371 MSA128HOpnd>; 2372class SUBVI_W_DESC : MSA_I5_DESC_BASE<"subvi.w", sub, vsplati32_uimm5, 2373 MSA128WOpnd>; 2374class SUBVI_D_DESC : MSA_I5_DESC_BASE<"subvi.d", sub, vsplati64_uimm5, 2375 MSA128DOpnd>; 2376 2377class VSHF_B_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.b", MSA128BOpnd>; 2378class VSHF_H_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.h", MSA128HOpnd>; 2379class VSHF_W_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.w", MSA128WOpnd>; 2380class VSHF_D_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.d", MSA128DOpnd>; 2381 2382class XOR_V_DESC : MSA_VEC_DESC_BASE<"xor.v", xor, MSA128B>; 2383class XOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128H>; 2384class XOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128W>; 2385class XOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128D>; 2386 2387class XORI_B_DESC : MSA_I8_DESC_BASE<"xori.b", xor, vsplati8_uimm8, 2388 MSA128BOpnd>; 2389 2390// Instruction defs. 2391def ADD_A_B : ADD_A_B_ENC, ADD_A_B_DESC; 2392def ADD_A_H : ADD_A_H_ENC, ADD_A_H_DESC; 2393def ADD_A_W : ADD_A_W_ENC, ADD_A_W_DESC; 2394def ADD_A_D : ADD_A_D_ENC, ADD_A_D_DESC; 2395 2396def ADDS_A_B : ADDS_A_B_ENC, ADDS_A_B_DESC; 2397def ADDS_A_H : ADDS_A_H_ENC, ADDS_A_H_DESC; 2398def ADDS_A_W : ADDS_A_W_ENC, ADDS_A_W_DESC; 2399def ADDS_A_D : ADDS_A_D_ENC, ADDS_A_D_DESC; 2400 2401def ADDS_S_B : ADDS_S_B_ENC, ADDS_S_B_DESC; 2402def ADDS_S_H : ADDS_S_H_ENC, ADDS_S_H_DESC; 2403def ADDS_S_W : ADDS_S_W_ENC, ADDS_S_W_DESC; 2404def ADDS_S_D : ADDS_S_D_ENC, ADDS_S_D_DESC; 2405 2406def ADDS_U_B : ADDS_U_B_ENC, ADDS_U_B_DESC; 2407def ADDS_U_H : ADDS_U_H_ENC, ADDS_U_H_DESC; 2408def ADDS_U_W : ADDS_U_W_ENC, ADDS_U_W_DESC; 2409def ADDS_U_D : ADDS_U_D_ENC, ADDS_U_D_DESC; 2410 2411def ADDV_B : ADDV_B_ENC, ADDV_B_DESC; 2412def ADDV_H : ADDV_H_ENC, ADDV_H_DESC; 2413def ADDV_W : ADDV_W_ENC, ADDV_W_DESC; 2414def ADDV_D : ADDV_D_ENC, ADDV_D_DESC; 2415 2416def ADDVI_B : ADDVI_B_ENC, ADDVI_B_DESC; 2417def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC; 2418def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC; 2419def ADDVI_D : ADDVI_D_ENC, ADDVI_D_DESC; 2420 2421def AND_V : AND_V_ENC, AND_V_DESC; 2422def AND_V_H_PSEUDO : AND_V_H_PSEUDO_DESC, 2423 PseudoInstExpansion<(AND_V MSA128B:$wd, 2424 MSA128B:$ws, MSA128B:$wt)>; 2425def AND_V_W_PSEUDO : AND_V_W_PSEUDO_DESC, 2426 PseudoInstExpansion<(AND_V MSA128B:$wd, 2427 MSA128B:$ws, MSA128B:$wt)>; 2428def AND_V_D_PSEUDO : AND_V_D_PSEUDO_DESC, 2429 PseudoInstExpansion<(AND_V MSA128B:$wd, 2430 MSA128B:$ws, MSA128B:$wt)>; 2431 2432def ANDI_B : ANDI_B_ENC, ANDI_B_DESC; 2433 2434def ASUB_S_B : ASUB_S_B_ENC, ASUB_S_B_DESC; 2435def ASUB_S_H : ASUB_S_H_ENC, ASUB_S_H_DESC; 2436def ASUB_S_W : ASUB_S_W_ENC, ASUB_S_W_DESC; 2437def ASUB_S_D : ASUB_S_D_ENC, ASUB_S_D_DESC; 2438 2439def ASUB_U_B : ASUB_U_B_ENC, ASUB_U_B_DESC; 2440def ASUB_U_H : ASUB_U_H_ENC, ASUB_U_H_DESC; 2441def ASUB_U_W : ASUB_U_W_ENC, ASUB_U_W_DESC; 2442def ASUB_U_D : ASUB_U_D_ENC, ASUB_U_D_DESC; 2443 2444def AVE_S_B : AVE_S_B_ENC, AVE_S_B_DESC; 2445def AVE_S_H : AVE_S_H_ENC, AVE_S_H_DESC; 2446def AVE_S_W : AVE_S_W_ENC, AVE_S_W_DESC; 2447def AVE_S_D : AVE_S_D_ENC, AVE_S_D_DESC; 2448 2449def AVE_U_B : AVE_U_B_ENC, AVE_U_B_DESC; 2450def AVE_U_H : AVE_U_H_ENC, AVE_U_H_DESC; 2451def AVE_U_W : AVE_U_W_ENC, AVE_U_W_DESC; 2452def AVE_U_D : AVE_U_D_ENC, AVE_U_D_DESC; 2453 2454def AVER_S_B : AVER_S_B_ENC, AVER_S_B_DESC; 2455def AVER_S_H : AVER_S_H_ENC, AVER_S_H_DESC; 2456def AVER_S_W : AVER_S_W_ENC, AVER_S_W_DESC; 2457def AVER_S_D : AVER_S_D_ENC, AVER_S_D_DESC; 2458 2459def AVER_U_B : AVER_U_B_ENC, AVER_U_B_DESC; 2460def AVER_U_H : AVER_U_H_ENC, AVER_U_H_DESC; 2461def AVER_U_W : AVER_U_W_ENC, AVER_U_W_DESC; 2462def AVER_U_D : AVER_U_D_ENC, AVER_U_D_DESC; 2463 2464def BCLR_B : BCLR_B_ENC, BCLR_B_DESC; 2465def BCLR_H : BCLR_H_ENC, BCLR_H_DESC; 2466def BCLR_W : BCLR_W_ENC, BCLR_W_DESC; 2467def BCLR_D : BCLR_D_ENC, BCLR_D_DESC; 2468 2469def BCLRI_B : BCLRI_B_ENC, BCLRI_B_DESC; 2470def BCLRI_H : BCLRI_H_ENC, BCLRI_H_DESC; 2471def BCLRI_W : BCLRI_W_ENC, BCLRI_W_DESC; 2472def BCLRI_D : BCLRI_D_ENC, BCLRI_D_DESC; 2473 2474def BINSL_B : BINSL_B_ENC, BINSL_B_DESC; 2475def BINSL_H : BINSL_H_ENC, BINSL_H_DESC; 2476def BINSL_W : BINSL_W_ENC, BINSL_W_DESC; 2477def BINSL_D : BINSL_D_ENC, BINSL_D_DESC; 2478 2479def BINSLI_B : BINSLI_B_ENC, BINSLI_B_DESC; 2480def BINSLI_H : BINSLI_H_ENC, BINSLI_H_DESC; 2481def BINSLI_W : BINSLI_W_ENC, BINSLI_W_DESC; 2482def BINSLI_D : BINSLI_D_ENC, BINSLI_D_DESC; 2483 2484def BINSR_B : BINSR_B_ENC, BINSR_B_DESC; 2485def BINSR_H : BINSR_H_ENC, BINSR_H_DESC; 2486def BINSR_W : BINSR_W_ENC, BINSR_W_DESC; 2487def BINSR_D : BINSR_D_ENC, BINSR_D_DESC; 2488 2489def BINSRI_B : BINSRI_B_ENC, BINSRI_B_DESC; 2490def BINSRI_H : BINSRI_H_ENC, BINSRI_H_DESC; 2491def BINSRI_W : BINSRI_W_ENC, BINSRI_W_DESC; 2492def BINSRI_D : BINSRI_D_ENC, BINSRI_D_DESC; 2493 2494def BMNZ_V : BMNZ_V_ENC, BMNZ_V_DESC; 2495 2496def BMNZI_B : BMNZI_B_ENC, BMNZI_B_DESC; 2497 2498def BMZ_V : BMZ_V_ENC, BMZ_V_DESC; 2499 2500def BMZI_B : BMZI_B_ENC, BMZI_B_DESC; 2501 2502def BNEG_B : BNEG_B_ENC, BNEG_B_DESC; 2503def BNEG_H : BNEG_H_ENC, BNEG_H_DESC; 2504def BNEG_W : BNEG_W_ENC, BNEG_W_DESC; 2505def BNEG_D : BNEG_D_ENC, BNEG_D_DESC; 2506 2507def BNEGI_B : BNEGI_B_ENC, BNEGI_B_DESC; 2508def BNEGI_H : BNEGI_H_ENC, BNEGI_H_DESC; 2509def BNEGI_W : BNEGI_W_ENC, BNEGI_W_DESC; 2510def BNEGI_D : BNEGI_D_ENC, BNEGI_D_DESC; 2511 2512def BNZ_B : BNZ_B_ENC, BNZ_B_DESC; 2513def BNZ_H : BNZ_H_ENC, BNZ_H_DESC; 2514def BNZ_W : BNZ_W_ENC, BNZ_W_DESC; 2515def BNZ_D : BNZ_D_ENC, BNZ_D_DESC; 2516 2517def BNZ_V : BNZ_V_ENC, BNZ_V_DESC; 2518 2519def BSEL_V : BSEL_V_ENC, BSEL_V_DESC; 2520 2521class MSA_BSEL_PSEUDO_BASE<RegisterClass RC, ValueType Ty> : 2522 MipsPseudo<(outs RC:$wd), (ins RC:$wd_in, RC:$ws, RC:$wt), 2523 [(set RC:$wd, (Ty (vselect RC:$wd_in, RC:$ws, RC:$wt)))]>, 2524 PseudoInstExpansion<(BSEL_V MSA128B:$wd, MSA128B:$wd_in, MSA128B:$ws, 2525 MSA128B:$wt)> { 2526 let Constraints = "$wd_in = $wd"; 2527} 2528 2529def BSEL_H_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128H, v8i16>; 2530def BSEL_W_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128W, v4i32>; 2531def BSEL_D_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128D, v2i64>; 2532def BSEL_FW_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128W, v4f32>; 2533def BSEL_FD_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128D, v2f64>; 2534 2535def BSELI_B : BSELI_B_ENC, BSELI_B_DESC; 2536 2537def BSET_B : BSET_B_ENC, BSET_B_DESC; 2538def BSET_H : BSET_H_ENC, BSET_H_DESC; 2539def BSET_W : BSET_W_ENC, BSET_W_DESC; 2540def BSET_D : BSET_D_ENC, BSET_D_DESC; 2541 2542def BSETI_B : BSETI_B_ENC, BSETI_B_DESC; 2543def BSETI_H : BSETI_H_ENC, BSETI_H_DESC; 2544def BSETI_W : BSETI_W_ENC, BSETI_W_DESC; 2545def BSETI_D : BSETI_D_ENC, BSETI_D_DESC; 2546 2547def BZ_B : BZ_B_ENC, BZ_B_DESC; 2548def BZ_H : BZ_H_ENC, BZ_H_DESC; 2549def BZ_W : BZ_W_ENC, BZ_W_DESC; 2550def BZ_D : BZ_D_ENC, BZ_D_DESC; 2551 2552def BZ_V : BZ_V_ENC, BZ_V_DESC; 2553 2554def CEQ_B : CEQ_B_ENC, CEQ_B_DESC; 2555def CEQ_H : CEQ_H_ENC, CEQ_H_DESC; 2556def CEQ_W : CEQ_W_ENC, CEQ_W_DESC; 2557def CEQ_D : CEQ_D_ENC, CEQ_D_DESC; 2558 2559def CEQI_B : CEQI_B_ENC, CEQI_B_DESC; 2560def CEQI_H : CEQI_H_ENC, CEQI_H_DESC; 2561def CEQI_W : CEQI_W_ENC, CEQI_W_DESC; 2562def CEQI_D : CEQI_D_ENC, CEQI_D_DESC; 2563 2564def CFCMSA : CFCMSA_ENC, CFCMSA_DESC; 2565 2566def CLE_S_B : CLE_S_B_ENC, CLE_S_B_DESC; 2567def CLE_S_H : CLE_S_H_ENC, CLE_S_H_DESC; 2568def CLE_S_W : CLE_S_W_ENC, CLE_S_W_DESC; 2569def CLE_S_D : CLE_S_D_ENC, CLE_S_D_DESC; 2570 2571def CLE_U_B : CLE_U_B_ENC, CLE_U_B_DESC; 2572def CLE_U_H : CLE_U_H_ENC, CLE_U_H_DESC; 2573def CLE_U_W : CLE_U_W_ENC, CLE_U_W_DESC; 2574def CLE_U_D : CLE_U_D_ENC, CLE_U_D_DESC; 2575 2576def CLEI_S_B : CLEI_S_B_ENC, CLEI_S_B_DESC; 2577def CLEI_S_H : CLEI_S_H_ENC, CLEI_S_H_DESC; 2578def CLEI_S_W : CLEI_S_W_ENC, CLEI_S_W_DESC; 2579def CLEI_S_D : CLEI_S_D_ENC, CLEI_S_D_DESC; 2580 2581def CLEI_U_B : CLEI_U_B_ENC, CLEI_U_B_DESC; 2582def CLEI_U_H : CLEI_U_H_ENC, CLEI_U_H_DESC; 2583def CLEI_U_W : CLEI_U_W_ENC, CLEI_U_W_DESC; 2584def CLEI_U_D : CLEI_U_D_ENC, CLEI_U_D_DESC; 2585 2586def CLT_S_B : CLT_S_B_ENC, CLT_S_B_DESC; 2587def CLT_S_H : CLT_S_H_ENC, CLT_S_H_DESC; 2588def CLT_S_W : CLT_S_W_ENC, CLT_S_W_DESC; 2589def CLT_S_D : CLT_S_D_ENC, CLT_S_D_DESC; 2590 2591def CLT_U_B : CLT_U_B_ENC, CLT_U_B_DESC; 2592def CLT_U_H : CLT_U_H_ENC, CLT_U_H_DESC; 2593def CLT_U_W : CLT_U_W_ENC, CLT_U_W_DESC; 2594def CLT_U_D : CLT_U_D_ENC, CLT_U_D_DESC; 2595 2596def CLTI_S_B : CLTI_S_B_ENC, CLTI_S_B_DESC; 2597def CLTI_S_H : CLTI_S_H_ENC, CLTI_S_H_DESC; 2598def CLTI_S_W : CLTI_S_W_ENC, CLTI_S_W_DESC; 2599def CLTI_S_D : CLTI_S_D_ENC, CLTI_S_D_DESC; 2600 2601def CLTI_U_B : CLTI_U_B_ENC, CLTI_U_B_DESC; 2602def CLTI_U_H : CLTI_U_H_ENC, CLTI_U_H_DESC; 2603def CLTI_U_W : CLTI_U_W_ENC, CLTI_U_W_DESC; 2604def CLTI_U_D : CLTI_U_D_ENC, CLTI_U_D_DESC; 2605 2606def COPY_S_B : COPY_S_B_ENC, COPY_S_B_DESC; 2607def COPY_S_H : COPY_S_H_ENC, COPY_S_H_DESC; 2608def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC; 2609 2610def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC; 2611def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC; 2612def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC; 2613 2614def COPY_FW_PSEUDO : COPY_FW_PSEUDO_DESC; 2615def COPY_FD_PSEUDO : COPY_FD_PSEUDO_DESC; 2616 2617def CTCMSA : CTCMSA_ENC, CTCMSA_DESC; 2618 2619def DIV_S_B : DIV_S_B_ENC, DIV_S_B_DESC; 2620def DIV_S_H : DIV_S_H_ENC, DIV_S_H_DESC; 2621def DIV_S_W : DIV_S_W_ENC, DIV_S_W_DESC; 2622def DIV_S_D : DIV_S_D_ENC, DIV_S_D_DESC; 2623 2624def DIV_U_B : DIV_U_B_ENC, DIV_U_B_DESC; 2625def DIV_U_H : DIV_U_H_ENC, DIV_U_H_DESC; 2626def DIV_U_W : DIV_U_W_ENC, DIV_U_W_DESC; 2627def DIV_U_D : DIV_U_D_ENC, DIV_U_D_DESC; 2628 2629def DOTP_S_H : DOTP_S_H_ENC, DOTP_S_H_DESC; 2630def DOTP_S_W : DOTP_S_W_ENC, DOTP_S_W_DESC; 2631def DOTP_S_D : DOTP_S_D_ENC, DOTP_S_D_DESC; 2632 2633def DOTP_U_H : DOTP_U_H_ENC, DOTP_U_H_DESC; 2634def DOTP_U_W : DOTP_U_W_ENC, DOTP_U_W_DESC; 2635def DOTP_U_D : DOTP_U_D_ENC, DOTP_U_D_DESC; 2636 2637def DPADD_S_H : DPADD_S_H_ENC, DPADD_S_H_DESC; 2638def DPADD_S_W : DPADD_S_W_ENC, DPADD_S_W_DESC; 2639def DPADD_S_D : DPADD_S_D_ENC, DPADD_S_D_DESC; 2640 2641def DPADD_U_H : DPADD_U_H_ENC, DPADD_U_H_DESC; 2642def DPADD_U_W : DPADD_U_W_ENC, DPADD_U_W_DESC; 2643def DPADD_U_D : DPADD_U_D_ENC, DPADD_U_D_DESC; 2644 2645def DPSUB_S_H : DPSUB_S_H_ENC, DPSUB_S_H_DESC; 2646def DPSUB_S_W : DPSUB_S_W_ENC, DPSUB_S_W_DESC; 2647def DPSUB_S_D : DPSUB_S_D_ENC, DPSUB_S_D_DESC; 2648 2649def DPSUB_U_H : DPSUB_U_H_ENC, DPSUB_U_H_DESC; 2650def DPSUB_U_W : DPSUB_U_W_ENC, DPSUB_U_W_DESC; 2651def DPSUB_U_D : DPSUB_U_D_ENC, DPSUB_U_D_DESC; 2652 2653def FADD_W : FADD_W_ENC, FADD_W_DESC; 2654def FADD_D : FADD_D_ENC, FADD_D_DESC; 2655 2656def FCAF_W : FCAF_W_ENC, FCAF_W_DESC; 2657def FCAF_D : FCAF_D_ENC, FCAF_D_DESC; 2658 2659def FCEQ_W : FCEQ_W_ENC, FCEQ_W_DESC; 2660def FCEQ_D : FCEQ_D_ENC, FCEQ_D_DESC; 2661 2662def FCLE_W : FCLE_W_ENC, FCLE_W_DESC; 2663def FCLE_D : FCLE_D_ENC, FCLE_D_DESC; 2664 2665def FCLT_W : FCLT_W_ENC, FCLT_W_DESC; 2666def FCLT_D : FCLT_D_ENC, FCLT_D_DESC; 2667 2668def FCLASS_W : FCLASS_W_ENC, FCLASS_W_DESC; 2669def FCLASS_D : FCLASS_D_ENC, FCLASS_D_DESC; 2670 2671def FCNE_W : FCNE_W_ENC, FCNE_W_DESC; 2672def FCNE_D : FCNE_D_ENC, FCNE_D_DESC; 2673 2674def FCOR_W : FCOR_W_ENC, FCOR_W_DESC; 2675def FCOR_D : FCOR_D_ENC, FCOR_D_DESC; 2676 2677def FCUEQ_W : FCUEQ_W_ENC, FCUEQ_W_DESC; 2678def FCUEQ_D : FCUEQ_D_ENC, FCUEQ_D_DESC; 2679 2680def FCULE_W : FCULE_W_ENC, FCULE_W_DESC; 2681def FCULE_D : FCULE_D_ENC, FCULE_D_DESC; 2682 2683def FCULT_W : FCULT_W_ENC, FCULT_W_DESC; 2684def FCULT_D : FCULT_D_ENC, FCULT_D_DESC; 2685 2686def FCUN_W : FCUN_W_ENC, FCUN_W_DESC; 2687def FCUN_D : FCUN_D_ENC, FCUN_D_DESC; 2688 2689def FCUNE_W : FCUNE_W_ENC, FCUNE_W_DESC; 2690def FCUNE_D : FCUNE_D_ENC, FCUNE_D_DESC; 2691 2692def FDIV_W : FDIV_W_ENC, FDIV_W_DESC; 2693def FDIV_D : FDIV_D_ENC, FDIV_D_DESC; 2694 2695def FEXDO_H : FEXDO_H_ENC, FEXDO_H_DESC; 2696def FEXDO_W : FEXDO_W_ENC, FEXDO_W_DESC; 2697 2698def FEXP2_W : FEXP2_W_ENC, FEXP2_W_DESC; 2699def FEXP2_D : FEXP2_D_ENC, FEXP2_D_DESC; 2700 2701def FEXUPL_W : FEXUPL_W_ENC, FEXUPL_W_DESC; 2702def FEXUPL_D : FEXUPL_D_ENC, FEXUPL_D_DESC; 2703 2704def FEXUPR_W : FEXUPR_W_ENC, FEXUPR_W_DESC; 2705def FEXUPR_D : FEXUPR_D_ENC, FEXUPR_D_DESC; 2706 2707def FFINT_S_W : FFINT_S_W_ENC, FFINT_S_W_DESC; 2708def FFINT_S_D : FFINT_S_D_ENC, FFINT_S_D_DESC; 2709 2710def FFINT_U_W : FFINT_U_W_ENC, FFINT_U_W_DESC; 2711def FFINT_U_D : FFINT_U_D_ENC, FFINT_U_D_DESC; 2712 2713def FFQL_W : FFQL_W_ENC, FFQL_W_DESC; 2714def FFQL_D : FFQL_D_ENC, FFQL_D_DESC; 2715 2716def FFQR_W : FFQR_W_ENC, FFQR_W_DESC; 2717def FFQR_D : FFQR_D_ENC, FFQR_D_DESC; 2718 2719def FILL_B : FILL_B_ENC, FILL_B_DESC; 2720def FILL_H : FILL_H_ENC, FILL_H_DESC; 2721def FILL_W : FILL_W_ENC, FILL_W_DESC; 2722 2723def FLOG2_W : FLOG2_W_ENC, FLOG2_W_DESC; 2724def FLOG2_D : FLOG2_D_ENC, FLOG2_D_DESC; 2725 2726def FMADD_W : FMADD_W_ENC, FMADD_W_DESC; 2727def FMADD_D : FMADD_D_ENC, FMADD_D_DESC; 2728 2729def FMAX_W : FMAX_W_ENC, FMAX_W_DESC; 2730def FMAX_D : FMAX_D_ENC, FMAX_D_DESC; 2731 2732def FMAX_A_W : FMAX_A_W_ENC, FMAX_A_W_DESC; 2733def FMAX_A_D : FMAX_A_D_ENC, FMAX_A_D_DESC; 2734 2735def FMIN_W : FMIN_W_ENC, FMIN_W_DESC; 2736def FMIN_D : FMIN_D_ENC, FMIN_D_DESC; 2737 2738def FMIN_A_W : FMIN_A_W_ENC, FMIN_A_W_DESC; 2739def FMIN_A_D : FMIN_A_D_ENC, FMIN_A_D_DESC; 2740 2741def FMSUB_W : FMSUB_W_ENC, FMSUB_W_DESC; 2742def FMSUB_D : FMSUB_D_ENC, FMSUB_D_DESC; 2743 2744def FMUL_W : FMUL_W_ENC, FMUL_W_DESC; 2745def FMUL_D : FMUL_D_ENC, FMUL_D_DESC; 2746 2747def FRINT_W : FRINT_W_ENC, FRINT_W_DESC; 2748def FRINT_D : FRINT_D_ENC, FRINT_D_DESC; 2749 2750def FRCP_W : FRCP_W_ENC, FRCP_W_DESC; 2751def FRCP_D : FRCP_D_ENC, FRCP_D_DESC; 2752 2753def FRSQRT_W : FRSQRT_W_ENC, FRSQRT_W_DESC; 2754def FRSQRT_D : FRSQRT_D_ENC, FRSQRT_D_DESC; 2755 2756def FSAF_W : FSAF_W_ENC, FSAF_W_DESC; 2757def FSAF_D : FSAF_D_ENC, FSAF_D_DESC; 2758 2759def FSEQ_W : FSEQ_W_ENC, FSEQ_W_DESC; 2760def FSEQ_D : FSEQ_D_ENC, FSEQ_D_DESC; 2761 2762def FSLE_W : FSLE_W_ENC, FSLE_W_DESC; 2763def FSLE_D : FSLE_D_ENC, FSLE_D_DESC; 2764 2765def FSLT_W : FSLT_W_ENC, FSLT_W_DESC; 2766def FSLT_D : FSLT_D_ENC, FSLT_D_DESC; 2767 2768def FSNE_W : FSNE_W_ENC, FSNE_W_DESC; 2769def FSNE_D : FSNE_D_ENC, FSNE_D_DESC; 2770 2771def FSOR_W : FSOR_W_ENC, FSOR_W_DESC; 2772def FSOR_D : FSOR_D_ENC, FSOR_D_DESC; 2773 2774def FSQRT_W : FSQRT_W_ENC, FSQRT_W_DESC; 2775def FSQRT_D : FSQRT_D_ENC, FSQRT_D_DESC; 2776 2777def FSUB_W : FSUB_W_ENC, FSUB_W_DESC; 2778def FSUB_D : FSUB_D_ENC, FSUB_D_DESC; 2779 2780def FSUEQ_W : FSUEQ_W_ENC, FSUEQ_W_DESC; 2781def FSUEQ_D : FSUEQ_D_ENC, FSUEQ_D_DESC; 2782 2783def FSULE_W : FSULE_W_ENC, FSULE_W_DESC; 2784def FSULE_D : FSULE_D_ENC, FSULE_D_DESC; 2785 2786def FSULT_W : FSULT_W_ENC, FSULT_W_DESC; 2787def FSULT_D : FSULT_D_ENC, FSULT_D_DESC; 2788 2789def FSUN_W : FSUN_W_ENC, FSUN_W_DESC; 2790def FSUN_D : FSUN_D_ENC, FSUN_D_DESC; 2791 2792def FSUNE_W : FSUNE_W_ENC, FSUNE_W_DESC; 2793def FSUNE_D : FSUNE_D_ENC, FSUNE_D_DESC; 2794 2795def FTRUNC_S_W : FTRUNC_S_W_ENC, FTRUNC_S_W_DESC; 2796def FTRUNC_S_D : FTRUNC_S_D_ENC, FTRUNC_S_D_DESC; 2797 2798def FTRUNC_U_W : FTRUNC_U_W_ENC, FTRUNC_U_W_DESC; 2799def FTRUNC_U_D : FTRUNC_U_D_ENC, FTRUNC_U_D_DESC; 2800 2801def FTINT_S_W : FTINT_S_W_ENC, FTINT_S_W_DESC; 2802def FTINT_S_D : FTINT_S_D_ENC, FTINT_S_D_DESC; 2803 2804def FTINT_U_W : FTINT_U_W_ENC, FTINT_U_W_DESC; 2805def FTINT_U_D : FTINT_U_D_ENC, FTINT_U_D_DESC; 2806 2807def FTQ_H : FTQ_H_ENC, FTQ_H_DESC; 2808def FTQ_W : FTQ_W_ENC, FTQ_W_DESC; 2809 2810def HADD_S_H : HADD_S_H_ENC, HADD_S_H_DESC; 2811def HADD_S_W : HADD_S_W_ENC, HADD_S_W_DESC; 2812def HADD_S_D : HADD_S_D_ENC, HADD_S_D_DESC; 2813 2814def HADD_U_H : HADD_U_H_ENC, HADD_U_H_DESC; 2815def HADD_U_W : HADD_U_W_ENC, HADD_U_W_DESC; 2816def HADD_U_D : HADD_U_D_ENC, HADD_U_D_DESC; 2817 2818def HSUB_S_H : HSUB_S_H_ENC, HSUB_S_H_DESC; 2819def HSUB_S_W : HSUB_S_W_ENC, HSUB_S_W_DESC; 2820def HSUB_S_D : HSUB_S_D_ENC, HSUB_S_D_DESC; 2821 2822def HSUB_U_H : HSUB_U_H_ENC, HSUB_U_H_DESC; 2823def HSUB_U_W : HSUB_U_W_ENC, HSUB_U_W_DESC; 2824def HSUB_U_D : HSUB_U_D_ENC, HSUB_U_D_DESC; 2825 2826def ILVEV_B : ILVEV_B_ENC, ILVEV_B_DESC; 2827def ILVEV_H : ILVEV_H_ENC, ILVEV_H_DESC; 2828def ILVEV_W : ILVEV_W_ENC, ILVEV_W_DESC; 2829def ILVEV_D : ILVEV_D_ENC, ILVEV_D_DESC; 2830 2831def ILVL_B : ILVL_B_ENC, ILVL_B_DESC; 2832def ILVL_H : ILVL_H_ENC, ILVL_H_DESC; 2833def ILVL_W : ILVL_W_ENC, ILVL_W_DESC; 2834def ILVL_D : ILVL_D_ENC, ILVL_D_DESC; 2835 2836def ILVOD_B : ILVOD_B_ENC, ILVOD_B_DESC; 2837def ILVOD_H : ILVOD_H_ENC, ILVOD_H_DESC; 2838def ILVOD_W : ILVOD_W_ENC, ILVOD_W_DESC; 2839def ILVOD_D : ILVOD_D_ENC, ILVOD_D_DESC; 2840 2841def ILVR_B : ILVR_B_ENC, ILVR_B_DESC; 2842def ILVR_H : ILVR_H_ENC, ILVR_H_DESC; 2843def ILVR_W : ILVR_W_ENC, ILVR_W_DESC; 2844def ILVR_D : ILVR_D_ENC, ILVR_D_DESC; 2845 2846def INSERT_B : INSERT_B_ENC, INSERT_B_DESC; 2847def INSERT_H : INSERT_H_ENC, INSERT_H_DESC; 2848def INSERT_W : INSERT_W_ENC, INSERT_W_DESC; 2849 2850// INSERT_FW_PSEUDO defined after INSVE_W 2851// INSERT_FD_PSEUDO defined after INSVE_D 2852 2853def INSVE_B : INSVE_B_ENC, INSVE_B_DESC; 2854def INSVE_H : INSVE_H_ENC, INSVE_H_DESC; 2855def INSVE_W : INSVE_W_ENC, INSVE_W_DESC; 2856def INSVE_D : INSVE_D_ENC, INSVE_D_DESC; 2857 2858def INSERT_FW_PSEUDO : INSERT_FW_PSEUDO_DESC; 2859def INSERT_FD_PSEUDO : INSERT_FD_PSEUDO_DESC; 2860 2861def LD_B: LD_B_ENC, LD_B_DESC; 2862def LD_H: LD_H_ENC, LD_H_DESC; 2863def LD_W: LD_W_ENC, LD_W_DESC; 2864def LD_D: LD_D_ENC, LD_D_DESC; 2865 2866def LDI_B : LDI_B_ENC, LDI_B_DESC; 2867def LDI_H : LDI_H_ENC, LDI_H_DESC; 2868def LDI_W : LDI_W_ENC, LDI_W_DESC; 2869def LDI_D : LDI_D_ENC, LDI_D_DESC; 2870 2871def LDX_B: LDX_B_ENC, LDX_B_DESC; 2872def LDX_H: LDX_H_ENC, LDX_H_DESC; 2873def LDX_W: LDX_W_ENC, LDX_W_DESC; 2874def LDX_D: LDX_D_ENC, LDX_D_DESC; 2875 2876def MADD_Q_H : MADD_Q_H_ENC, MADD_Q_H_DESC; 2877def MADD_Q_W : MADD_Q_W_ENC, MADD_Q_W_DESC; 2878 2879def MADDR_Q_H : MADDR_Q_H_ENC, MADDR_Q_H_DESC; 2880def MADDR_Q_W : MADDR_Q_W_ENC, MADDR_Q_W_DESC; 2881 2882def MADDV_B : MADDV_B_ENC, MADDV_B_DESC; 2883def MADDV_H : MADDV_H_ENC, MADDV_H_DESC; 2884def MADDV_W : MADDV_W_ENC, MADDV_W_DESC; 2885def MADDV_D : MADDV_D_ENC, MADDV_D_DESC; 2886 2887def MAX_A_B : MAX_A_B_ENC, MAX_A_B_DESC; 2888def MAX_A_H : MAX_A_H_ENC, MAX_A_H_DESC; 2889def MAX_A_W : MAX_A_W_ENC, MAX_A_W_DESC; 2890def MAX_A_D : MAX_A_D_ENC, MAX_A_D_DESC; 2891 2892def MAX_S_B : MAX_S_B_ENC, MAX_S_B_DESC; 2893def MAX_S_H : MAX_S_H_ENC, MAX_S_H_DESC; 2894def MAX_S_W : MAX_S_W_ENC, MAX_S_W_DESC; 2895def MAX_S_D : MAX_S_D_ENC, MAX_S_D_DESC; 2896 2897def MAX_U_B : MAX_U_B_ENC, MAX_U_B_DESC; 2898def MAX_U_H : MAX_U_H_ENC, MAX_U_H_DESC; 2899def MAX_U_W : MAX_U_W_ENC, MAX_U_W_DESC; 2900def MAX_U_D : MAX_U_D_ENC, MAX_U_D_DESC; 2901 2902def MAXI_S_B : MAXI_S_B_ENC, MAXI_S_B_DESC; 2903def MAXI_S_H : MAXI_S_H_ENC, MAXI_S_H_DESC; 2904def MAXI_S_W : MAXI_S_W_ENC, MAXI_S_W_DESC; 2905def MAXI_S_D : MAXI_S_D_ENC, MAXI_S_D_DESC; 2906 2907def MAXI_U_B : MAXI_U_B_ENC, MAXI_U_B_DESC; 2908def MAXI_U_H : MAXI_U_H_ENC, MAXI_U_H_DESC; 2909def MAXI_U_W : MAXI_U_W_ENC, MAXI_U_W_DESC; 2910def MAXI_U_D : MAXI_U_D_ENC, MAXI_U_D_DESC; 2911 2912def MIN_A_B : MIN_A_B_ENC, MIN_A_B_DESC; 2913def MIN_A_H : MIN_A_H_ENC, MIN_A_H_DESC; 2914def MIN_A_W : MIN_A_W_ENC, MIN_A_W_DESC; 2915def MIN_A_D : MIN_A_D_ENC, MIN_A_D_DESC; 2916 2917def MIN_S_B : MIN_S_B_ENC, MIN_S_B_DESC; 2918def MIN_S_H : MIN_S_H_ENC, MIN_S_H_DESC; 2919def MIN_S_W : MIN_S_W_ENC, MIN_S_W_DESC; 2920def MIN_S_D : MIN_S_D_ENC, MIN_S_D_DESC; 2921 2922def MIN_U_B : MIN_U_B_ENC, MIN_U_B_DESC; 2923def MIN_U_H : MIN_U_H_ENC, MIN_U_H_DESC; 2924def MIN_U_W : MIN_U_W_ENC, MIN_U_W_DESC; 2925def MIN_U_D : MIN_U_D_ENC, MIN_U_D_DESC; 2926 2927def MINI_S_B : MINI_S_B_ENC, MINI_S_B_DESC; 2928def MINI_S_H : MINI_S_H_ENC, MINI_S_H_DESC; 2929def MINI_S_W : MINI_S_W_ENC, MINI_S_W_DESC; 2930def MINI_S_D : MINI_S_D_ENC, MINI_S_D_DESC; 2931 2932def MINI_U_B : MINI_U_B_ENC, MINI_U_B_DESC; 2933def MINI_U_H : MINI_U_H_ENC, MINI_U_H_DESC; 2934def MINI_U_W : MINI_U_W_ENC, MINI_U_W_DESC; 2935def MINI_U_D : MINI_U_D_ENC, MINI_U_D_DESC; 2936 2937def MOD_S_B : MOD_S_B_ENC, MOD_S_B_DESC; 2938def MOD_S_H : MOD_S_H_ENC, MOD_S_H_DESC; 2939def MOD_S_W : MOD_S_W_ENC, MOD_S_W_DESC; 2940def MOD_S_D : MOD_S_D_ENC, MOD_S_D_DESC; 2941 2942def MOD_U_B : MOD_U_B_ENC, MOD_U_B_DESC; 2943def MOD_U_H : MOD_U_H_ENC, MOD_U_H_DESC; 2944def MOD_U_W : MOD_U_W_ENC, MOD_U_W_DESC; 2945def MOD_U_D : MOD_U_D_ENC, MOD_U_D_DESC; 2946 2947def MOVE_V : MOVE_V_ENC, MOVE_V_DESC; 2948 2949def MSUB_Q_H : MSUB_Q_H_ENC, MSUB_Q_H_DESC; 2950def MSUB_Q_W : MSUB_Q_W_ENC, MSUB_Q_W_DESC; 2951 2952def MSUBR_Q_H : MSUBR_Q_H_ENC, MSUBR_Q_H_DESC; 2953def MSUBR_Q_W : MSUBR_Q_W_ENC, MSUBR_Q_W_DESC; 2954 2955def MSUBV_B : MSUBV_B_ENC, MSUBV_B_DESC; 2956def MSUBV_H : MSUBV_H_ENC, MSUBV_H_DESC; 2957def MSUBV_W : MSUBV_W_ENC, MSUBV_W_DESC; 2958def MSUBV_D : MSUBV_D_ENC, MSUBV_D_DESC; 2959 2960def MUL_Q_H : MUL_Q_H_ENC, MUL_Q_H_DESC; 2961def MUL_Q_W : MUL_Q_W_ENC, MUL_Q_W_DESC; 2962 2963def MULR_Q_H : MULR_Q_H_ENC, MULR_Q_H_DESC; 2964def MULR_Q_W : MULR_Q_W_ENC, MULR_Q_W_DESC; 2965 2966def MULV_B : MULV_B_ENC, MULV_B_DESC; 2967def MULV_H : MULV_H_ENC, MULV_H_DESC; 2968def MULV_W : MULV_W_ENC, MULV_W_DESC; 2969def MULV_D : MULV_D_ENC, MULV_D_DESC; 2970 2971def NLOC_B : NLOC_B_ENC, NLOC_B_DESC; 2972def NLOC_H : NLOC_H_ENC, NLOC_H_DESC; 2973def NLOC_W : NLOC_W_ENC, NLOC_W_DESC; 2974def NLOC_D : NLOC_D_ENC, NLOC_D_DESC; 2975 2976def NLZC_B : NLZC_B_ENC, NLZC_B_DESC; 2977def NLZC_H : NLZC_H_ENC, NLZC_H_DESC; 2978def NLZC_W : NLZC_W_ENC, NLZC_W_DESC; 2979def NLZC_D : NLZC_D_ENC, NLZC_D_DESC; 2980 2981def NOR_V : NOR_V_ENC, NOR_V_DESC; 2982def NOR_V_H_PSEUDO : NOR_V_H_PSEUDO_DESC, 2983 PseudoInstExpansion<(NOR_V MSA128B:$wd, 2984 MSA128B:$ws, MSA128B:$wt)>; 2985def NOR_V_W_PSEUDO : NOR_V_W_PSEUDO_DESC, 2986 PseudoInstExpansion<(NOR_V MSA128B:$wd, 2987 MSA128B:$ws, MSA128B:$wt)>; 2988def NOR_V_D_PSEUDO : NOR_V_D_PSEUDO_DESC, 2989 PseudoInstExpansion<(NOR_V MSA128B:$wd, 2990 MSA128B:$ws, MSA128B:$wt)>; 2991 2992def NORI_B : NORI_B_ENC, NORI_B_DESC; 2993 2994def OR_V : OR_V_ENC, OR_V_DESC; 2995def OR_V_H_PSEUDO : OR_V_H_PSEUDO_DESC, 2996 PseudoInstExpansion<(OR_V MSA128B:$wd, 2997 MSA128B:$ws, MSA128B:$wt)>; 2998def OR_V_W_PSEUDO : OR_V_W_PSEUDO_DESC, 2999 PseudoInstExpansion<(OR_V MSA128B:$wd, 3000 MSA128B:$ws, MSA128B:$wt)>; 3001def OR_V_D_PSEUDO : OR_V_D_PSEUDO_DESC, 3002 PseudoInstExpansion<(OR_V MSA128B:$wd, 3003 MSA128B:$ws, MSA128B:$wt)>; 3004 3005def ORI_B : ORI_B_ENC, ORI_B_DESC; 3006 3007def PCKEV_B : PCKEV_B_ENC, PCKEV_B_DESC; 3008def PCKEV_H : PCKEV_H_ENC, PCKEV_H_DESC; 3009def PCKEV_W : PCKEV_W_ENC, PCKEV_W_DESC; 3010def PCKEV_D : PCKEV_D_ENC, PCKEV_D_DESC; 3011 3012def PCKOD_B : PCKOD_B_ENC, PCKOD_B_DESC; 3013def PCKOD_H : PCKOD_H_ENC, PCKOD_H_DESC; 3014def PCKOD_W : PCKOD_W_ENC, PCKOD_W_DESC; 3015def PCKOD_D : PCKOD_D_ENC, PCKOD_D_DESC; 3016 3017def PCNT_B : PCNT_B_ENC, PCNT_B_DESC; 3018def PCNT_H : PCNT_H_ENC, PCNT_H_DESC; 3019def PCNT_W : PCNT_W_ENC, PCNT_W_DESC; 3020def PCNT_D : PCNT_D_ENC, PCNT_D_DESC; 3021 3022def SAT_S_B : SAT_S_B_ENC, SAT_S_B_DESC; 3023def SAT_S_H : SAT_S_H_ENC, SAT_S_H_DESC; 3024def SAT_S_W : SAT_S_W_ENC, SAT_S_W_DESC; 3025def SAT_S_D : SAT_S_D_ENC, SAT_S_D_DESC; 3026 3027def SAT_U_B : SAT_U_B_ENC, SAT_U_B_DESC; 3028def SAT_U_H : SAT_U_H_ENC, SAT_U_H_DESC; 3029def SAT_U_W : SAT_U_W_ENC, SAT_U_W_DESC; 3030def SAT_U_D : SAT_U_D_ENC, SAT_U_D_DESC; 3031 3032def SHF_B : SHF_B_ENC, SHF_B_DESC; 3033def SHF_H : SHF_H_ENC, SHF_H_DESC; 3034def SHF_W : SHF_W_ENC, SHF_W_DESC; 3035 3036def SLD_B : SLD_B_ENC, SLD_B_DESC; 3037def SLD_H : SLD_H_ENC, SLD_H_DESC; 3038def SLD_W : SLD_W_ENC, SLD_W_DESC; 3039def SLD_D : SLD_D_ENC, SLD_D_DESC; 3040 3041def SLDI_B : SLDI_B_ENC, SLDI_B_DESC; 3042def SLDI_H : SLDI_H_ENC, SLDI_H_DESC; 3043def SLDI_W : SLDI_W_ENC, SLDI_W_DESC; 3044def SLDI_D : SLDI_D_ENC, SLDI_D_DESC; 3045 3046def SLL_B : SLL_B_ENC, SLL_B_DESC; 3047def SLL_H : SLL_H_ENC, SLL_H_DESC; 3048def SLL_W : SLL_W_ENC, SLL_W_DESC; 3049def SLL_D : SLL_D_ENC, SLL_D_DESC; 3050 3051def SLLI_B : SLLI_B_ENC, SLLI_B_DESC; 3052def SLLI_H : SLLI_H_ENC, SLLI_H_DESC; 3053def SLLI_W : SLLI_W_ENC, SLLI_W_DESC; 3054def SLLI_D : SLLI_D_ENC, SLLI_D_DESC; 3055 3056def SPLAT_B : SPLAT_B_ENC, SPLAT_B_DESC; 3057def SPLAT_H : SPLAT_H_ENC, SPLAT_H_DESC; 3058def SPLAT_W : SPLAT_W_ENC, SPLAT_W_DESC; 3059def SPLAT_D : SPLAT_D_ENC, SPLAT_D_DESC; 3060 3061def SPLATI_B : SPLATI_B_ENC, SPLATI_B_DESC; 3062def SPLATI_H : SPLATI_H_ENC, SPLATI_H_DESC; 3063def SPLATI_W : SPLATI_W_ENC, SPLATI_W_DESC; 3064def SPLATI_D : SPLATI_D_ENC, SPLATI_D_DESC; 3065 3066def SRA_B : SRA_B_ENC, SRA_B_DESC; 3067def SRA_H : SRA_H_ENC, SRA_H_DESC; 3068def SRA_W : SRA_W_ENC, SRA_W_DESC; 3069def SRA_D : SRA_D_ENC, SRA_D_DESC; 3070 3071def SRAI_B : SRAI_B_ENC, SRAI_B_DESC; 3072def SRAI_H : SRAI_H_ENC, SRAI_H_DESC; 3073def SRAI_W : SRAI_W_ENC, SRAI_W_DESC; 3074def SRAI_D : SRAI_D_ENC, SRAI_D_DESC; 3075 3076def SRAR_B : SRAR_B_ENC, SRAR_B_DESC; 3077def SRAR_H : SRAR_H_ENC, SRAR_H_DESC; 3078def SRAR_W : SRAR_W_ENC, SRAR_W_DESC; 3079def SRAR_D : SRAR_D_ENC, SRAR_D_DESC; 3080 3081def SRARI_B : SRARI_B_ENC, SRARI_B_DESC; 3082def SRARI_H : SRARI_H_ENC, SRARI_H_DESC; 3083def SRARI_W : SRARI_W_ENC, SRARI_W_DESC; 3084def SRARI_D : SRARI_D_ENC, SRARI_D_DESC; 3085 3086def SRL_B : SRL_B_ENC, SRL_B_DESC; 3087def SRL_H : SRL_H_ENC, SRL_H_DESC; 3088def SRL_W : SRL_W_ENC, SRL_W_DESC; 3089def SRL_D : SRL_D_ENC, SRL_D_DESC; 3090 3091def SRLI_B : SRLI_B_ENC, SRLI_B_DESC; 3092def SRLI_H : SRLI_H_ENC, SRLI_H_DESC; 3093def SRLI_W : SRLI_W_ENC, SRLI_W_DESC; 3094def SRLI_D : SRLI_D_ENC, SRLI_D_DESC; 3095 3096def SRLR_B : SRLR_B_ENC, SRLR_B_DESC; 3097def SRLR_H : SRLR_H_ENC, SRLR_H_DESC; 3098def SRLR_W : SRLR_W_ENC, SRLR_W_DESC; 3099def SRLR_D : SRLR_D_ENC, SRLR_D_DESC; 3100 3101def SRLRI_B : SRLRI_B_ENC, SRLRI_B_DESC; 3102def SRLRI_H : SRLRI_H_ENC, SRLRI_H_DESC; 3103def SRLRI_W : SRLRI_W_ENC, SRLRI_W_DESC; 3104def SRLRI_D : SRLRI_D_ENC, SRLRI_D_DESC; 3105 3106def ST_B: ST_B_ENC, ST_B_DESC; 3107def ST_H: ST_H_ENC, ST_H_DESC; 3108def ST_W: ST_W_ENC, ST_W_DESC; 3109def ST_D: ST_D_ENC, ST_D_DESC; 3110 3111def STX_B: STX_B_ENC, STX_B_DESC; 3112def STX_H: STX_H_ENC, STX_H_DESC; 3113def STX_W: STX_W_ENC, STX_W_DESC; 3114def STX_D: STX_D_ENC, STX_D_DESC; 3115 3116def SUBS_S_B : SUBS_S_B_ENC, SUBS_S_B_DESC; 3117def SUBS_S_H : SUBS_S_H_ENC, SUBS_S_H_DESC; 3118def SUBS_S_W : SUBS_S_W_ENC, SUBS_S_W_DESC; 3119def SUBS_S_D : SUBS_S_D_ENC, SUBS_S_D_DESC; 3120 3121def SUBS_U_B : SUBS_U_B_ENC, SUBS_U_B_DESC; 3122def SUBS_U_H : SUBS_U_H_ENC, SUBS_U_H_DESC; 3123def SUBS_U_W : SUBS_U_W_ENC, SUBS_U_W_DESC; 3124def SUBS_U_D : SUBS_U_D_ENC, SUBS_U_D_DESC; 3125 3126def SUBSUS_U_B : SUBSUS_U_B_ENC, SUBSUS_U_B_DESC; 3127def SUBSUS_U_H : SUBSUS_U_H_ENC, SUBSUS_U_H_DESC; 3128def SUBSUS_U_W : SUBSUS_U_W_ENC, SUBSUS_U_W_DESC; 3129def SUBSUS_U_D : SUBSUS_U_D_ENC, SUBSUS_U_D_DESC; 3130 3131def SUBSUU_S_B : SUBSUU_S_B_ENC, SUBSUU_S_B_DESC; 3132def SUBSUU_S_H : SUBSUU_S_H_ENC, SUBSUU_S_H_DESC; 3133def SUBSUU_S_W : SUBSUU_S_W_ENC, SUBSUU_S_W_DESC; 3134def SUBSUU_S_D : SUBSUU_S_D_ENC, SUBSUU_S_D_DESC; 3135 3136def SUBV_B : SUBV_B_ENC, SUBV_B_DESC; 3137def SUBV_H : SUBV_H_ENC, SUBV_H_DESC; 3138def SUBV_W : SUBV_W_ENC, SUBV_W_DESC; 3139def SUBV_D : SUBV_D_ENC, SUBV_D_DESC; 3140 3141def SUBVI_B : SUBVI_B_ENC, SUBVI_B_DESC; 3142def SUBVI_H : SUBVI_H_ENC, SUBVI_H_DESC; 3143def SUBVI_W : SUBVI_W_ENC, SUBVI_W_DESC; 3144def SUBVI_D : SUBVI_D_ENC, SUBVI_D_DESC; 3145 3146def VSHF_B : VSHF_B_ENC, VSHF_B_DESC; 3147def VSHF_H : VSHF_H_ENC, VSHF_H_DESC; 3148def VSHF_W : VSHF_W_ENC, VSHF_W_DESC; 3149def VSHF_D : VSHF_D_ENC, VSHF_D_DESC; 3150 3151def XOR_V : XOR_V_ENC, XOR_V_DESC; 3152def XOR_V_H_PSEUDO : XOR_V_H_PSEUDO_DESC, 3153 PseudoInstExpansion<(XOR_V MSA128B:$wd, 3154 MSA128B:$ws, MSA128B:$wt)>; 3155def XOR_V_W_PSEUDO : XOR_V_W_PSEUDO_DESC, 3156 PseudoInstExpansion<(XOR_V MSA128B:$wd, 3157 MSA128B:$ws, MSA128B:$wt)>; 3158def XOR_V_D_PSEUDO : XOR_V_D_PSEUDO_DESC, 3159 PseudoInstExpansion<(XOR_V MSA128B:$wd, 3160 MSA128B:$ws, MSA128B:$wt)>; 3161 3162def XORI_B : XORI_B_ENC, XORI_B_DESC; 3163 3164// Patterns. 3165class MSAPat<dag pattern, dag result, list<Predicate> pred = [HasMSA]> : 3166 Pat<pattern, result>, Requires<pred>; 3167 3168def : MSAPat<(extractelt (v4i32 MSA128W:$ws), immZExt4:$idx), 3169 (COPY_S_W MSA128W:$ws, immZExt4:$idx)>; 3170 3171def : MSAPat<(v16i8 (load addr:$addr)), (LD_B addr:$addr)>; 3172def : MSAPat<(v8i16 (load addr:$addr)), (LD_H addr:$addr)>; 3173def : MSAPat<(v4i32 (load addr:$addr)), (LD_W addr:$addr)>; 3174def : MSAPat<(v2i64 (load addr:$addr)), (LD_D addr:$addr)>; 3175def : MSAPat<(v8f16 (load addr:$addr)), (LD_H addr:$addr)>; 3176def : MSAPat<(v4f32 (load addr:$addr)), (LD_W addr:$addr)>; 3177def : MSAPat<(v2f64 (load addr:$addr)), (LD_D addr:$addr)>; 3178 3179def : MSAPat<(v8f16 (load addrRegImm:$addr)), (LD_H addrRegImm:$addr)>; 3180def : MSAPat<(v4f32 (load addrRegImm:$addr)), (LD_W addrRegImm:$addr)>; 3181def : MSAPat<(v2f64 (load addrRegImm:$addr)), (LD_D addrRegImm:$addr)>; 3182 3183def : MSAPat<(store (v16i8 MSA128B:$ws), addr:$addr), 3184 (ST_B MSA128B:$ws, addr:$addr)>; 3185def : MSAPat<(store (v8i16 MSA128H:$ws), addr:$addr), 3186 (ST_H MSA128H:$ws, addr:$addr)>; 3187def : MSAPat<(store (v4i32 MSA128W:$ws), addr:$addr), 3188 (ST_W MSA128W:$ws, addr:$addr)>; 3189def : MSAPat<(store (v2i64 MSA128D:$ws), addr:$addr), 3190 (ST_D MSA128D:$ws, addr:$addr)>; 3191def : MSAPat<(store (v8f16 MSA128H:$ws), addr:$addr), 3192 (ST_H MSA128H:$ws, addr:$addr)>; 3193def : MSAPat<(store (v4f32 MSA128W:$ws), addr:$addr), 3194 (ST_W MSA128W:$ws, addr:$addr)>; 3195def : MSAPat<(store (v2f64 MSA128D:$ws), addr:$addr), 3196 (ST_D MSA128D:$ws, addr:$addr)>; 3197 3198def ST_FH : MSAPat<(store (v8f16 MSA128H:$ws), addrRegImm:$addr), 3199 (ST_H MSA128H:$ws, addrRegImm:$addr)>; 3200def ST_FW : MSAPat<(store (v4f32 MSA128W:$ws), addrRegImm:$addr), 3201 (ST_W MSA128W:$ws, addrRegImm:$addr)>; 3202def ST_FD : MSAPat<(store (v2f64 MSA128D:$ws), addrRegImm:$addr), 3203 (ST_D MSA128D:$ws, addrRegImm:$addr)>; 3204 3205class MSA_FABS_PSEUDO_DESC_BASE<RegisterOperand ROWD, 3206 RegisterOperand ROWS = ROWD, 3207 InstrItinClass itin = NoItinerary> : 3208 MipsPseudo<(outs ROWD:$wd), 3209 (ins ROWS:$ws), 3210 [(set ROWD:$wd, (fabs ROWS:$ws))]> { 3211 InstrItinClass Itinerary = itin; 3212} 3213def FABS_W : MSA_FABS_PSEUDO_DESC_BASE<MSA128WOpnd>, 3214 PseudoInstExpansion<(FMAX_A_W MSA128WOpnd:$wd, MSA128WOpnd:$ws, 3215 MSA128WOpnd:$ws)>; 3216def FABS_D : MSA_FABS_PSEUDO_DESC_BASE<MSA128DOpnd>, 3217 PseudoInstExpansion<(FMAX_A_D MSA128DOpnd:$wd, MSA128DOpnd:$ws, 3218 MSA128DOpnd:$ws)>; 3219 3220class MSABitconvertPat<ValueType DstVT, ValueType SrcVT, 3221 RegisterClass DstRC, list<Predicate> preds = [HasMSA]> : 3222 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3223 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>; 3224 3225// These are endian-independant because the element size doesnt change 3226def : MSABitconvertPat<v8i16, v8f16, MSA128H>; 3227def : MSABitconvertPat<v4i32, v4f32, MSA128W>; 3228def : MSABitconvertPat<v2i64, v2f64, MSA128D>; 3229def : MSABitconvertPat<v8f16, v8i16, MSA128H>; 3230def : MSABitconvertPat<v4f32, v4i32, MSA128W>; 3231def : MSABitconvertPat<v2f64, v2i64, MSA128D>; 3232 3233// Little endian bitcasts are always no-ops 3234def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>; 3235def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>; 3236def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>; 3237def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>; 3238def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>; 3239def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>; 3240 3241def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>; 3242def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>; 3243def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>; 3244def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>; 3245def : MSABitconvertPat<v8i16, v2f64, MSA128H, [HasMSA, IsLE]>; 3246 3247def : MSABitconvertPat<v4i32, v16i8, MSA128W, [HasMSA, IsLE]>; 3248def : MSABitconvertPat<v4i32, v8i16, MSA128W, [HasMSA, IsLE]>; 3249def : MSABitconvertPat<v4i32, v2i64, MSA128W, [HasMSA, IsLE]>; 3250def : MSABitconvertPat<v4i32, v8f16, MSA128W, [HasMSA, IsLE]>; 3251def : MSABitconvertPat<v4i32, v2f64, MSA128W, [HasMSA, IsLE]>; 3252 3253def : MSABitconvertPat<v2i64, v16i8, MSA128D, [HasMSA, IsLE]>; 3254def : MSABitconvertPat<v2i64, v8i16, MSA128D, [HasMSA, IsLE]>; 3255def : MSABitconvertPat<v2i64, v4i32, MSA128D, [HasMSA, IsLE]>; 3256def : MSABitconvertPat<v2i64, v8f16, MSA128D, [HasMSA, IsLE]>; 3257def : MSABitconvertPat<v2i64, v4f32, MSA128D, [HasMSA, IsLE]>; 3258 3259def : MSABitconvertPat<v4f32, v16i8, MSA128W, [HasMSA, IsLE]>; 3260def : MSABitconvertPat<v4f32, v8i16, MSA128W, [HasMSA, IsLE]>; 3261def : MSABitconvertPat<v4f32, v2i64, MSA128W, [HasMSA, IsLE]>; 3262def : MSABitconvertPat<v4f32, v8f16, MSA128W, [HasMSA, IsLE]>; 3263def : MSABitconvertPat<v4f32, v2f64, MSA128W, [HasMSA, IsLE]>; 3264 3265def : MSABitconvertPat<v2f64, v16i8, MSA128D, [HasMSA, IsLE]>; 3266def : MSABitconvertPat<v2f64, v8i16, MSA128D, [HasMSA, IsLE]>; 3267def : MSABitconvertPat<v2f64, v4i32, MSA128D, [HasMSA, IsLE]>; 3268def : MSABitconvertPat<v2f64, v8f16, MSA128D, [HasMSA, IsLE]>; 3269def : MSABitconvertPat<v2f64, v4f32, MSA128D, [HasMSA, IsLE]>; 3270 3271// Big endian bitcasts expand to shuffle instructions. 3272// This is because bitcast is defined to be a store/load sequence and the 3273// vector store/load instructions are mixed-endian with respect to the vector 3274// as a whole (little endian with respect to element order, but big endian 3275// elements). 3276 3277class MSABitconvertReverseQuartersPat<ValueType DstVT, ValueType SrcVT, 3278 RegisterClass DstRC, MSAInst Insn, 3279 RegisterClass ViaRC> : 3280 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3281 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 27), 3282 DstRC), 3283 [HasMSA, IsBE]>; 3284 3285class MSABitconvertReverseHalvesPat<ValueType DstVT, ValueType SrcVT, 3286 RegisterClass DstRC, MSAInst Insn, 3287 RegisterClass ViaRC> : 3288 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3289 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 177), 3290 DstRC), 3291 [HasMSA, IsBE]>; 3292 3293class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT, 3294 RegisterClass DstRC> : 3295 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 3296 3297class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT, 3298 RegisterClass DstRC> : 3299 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 3300 3301class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT, 3302 RegisterClass DstRC> : 3303 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3304 (COPY_TO_REGCLASS 3305 (SHF_W 3306 (COPY_TO_REGCLASS 3307 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27), 3308 MSA128W), 177), 3309 DstRC), 3310 [HasMSA, IsBE]>; 3311 3312class MSABitconvertReverseHInWPat<ValueType DstVT, ValueType SrcVT, 3313 RegisterClass DstRC> : 3314 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 3315 3316class MSABitconvertReverseHInDPat<ValueType DstVT, ValueType SrcVT, 3317 RegisterClass DstRC> : 3318 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 3319 3320class MSABitconvertReverseWInDPat<ValueType DstVT, ValueType SrcVT, 3321 RegisterClass DstRC> : 3322 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_W, MSA128W>; 3323 3324def : MSABitconvertReverseBInHPat<v8i16, v16i8, MSA128H>; 3325def : MSABitconvertReverseBInHPat<v8f16, v16i8, MSA128H>; 3326def : MSABitconvertReverseBInWPat<v4i32, v16i8, MSA128W>; 3327def : MSABitconvertReverseBInWPat<v4f32, v16i8, MSA128W>; 3328def : MSABitconvertReverseBInDPat<v2i64, v16i8, MSA128D>; 3329def : MSABitconvertReverseBInDPat<v2f64, v16i8, MSA128D>; 3330 3331def : MSABitconvertReverseBInHPat<v16i8, v8i16, MSA128B>; 3332def : MSABitconvertReverseHInWPat<v4i32, v8i16, MSA128W>; 3333def : MSABitconvertReverseHInWPat<v4f32, v8i16, MSA128W>; 3334def : MSABitconvertReverseHInDPat<v2i64, v8i16, MSA128D>; 3335def : MSABitconvertReverseHInDPat<v2f64, v8i16, MSA128D>; 3336 3337def : MSABitconvertReverseBInHPat<v16i8, v8f16, MSA128B>; 3338def : MSABitconvertReverseHInWPat<v4i32, v8f16, MSA128W>; 3339def : MSABitconvertReverseHInWPat<v4f32, v8f16, MSA128W>; 3340def : MSABitconvertReverseHInDPat<v2i64, v8f16, MSA128D>; 3341def : MSABitconvertReverseHInDPat<v2f64, v8f16, MSA128D>; 3342 3343def : MSABitconvertReverseBInWPat<v16i8, v4i32, MSA128B>; 3344def : MSABitconvertReverseHInWPat<v8i16, v4i32, MSA128H>; 3345def : MSABitconvertReverseHInWPat<v8f16, v4i32, MSA128H>; 3346def : MSABitconvertReverseWInDPat<v2i64, v4i32, MSA128D>; 3347def : MSABitconvertReverseWInDPat<v2f64, v4i32, MSA128D>; 3348 3349def : MSABitconvertReverseBInWPat<v16i8, v4f32, MSA128B>; 3350def : MSABitconvertReverseHInWPat<v8i16, v4f32, MSA128H>; 3351def : MSABitconvertReverseHInWPat<v8f16, v4f32, MSA128H>; 3352def : MSABitconvertReverseWInDPat<v2i64, v4f32, MSA128D>; 3353def : MSABitconvertReverseWInDPat<v2f64, v4f32, MSA128D>; 3354 3355def : MSABitconvertReverseBInDPat<v16i8, v2i64, MSA128B>; 3356def : MSABitconvertReverseHInDPat<v8i16, v2i64, MSA128H>; 3357def : MSABitconvertReverseHInDPat<v8f16, v2i64, MSA128H>; 3358def : MSABitconvertReverseWInDPat<v4i32, v2i64, MSA128W>; 3359def : MSABitconvertReverseWInDPat<v4f32, v2i64, MSA128W>; 3360 3361def : MSABitconvertReverseBInDPat<v16i8, v2f64, MSA128B>; 3362def : MSABitconvertReverseHInDPat<v8i16, v2f64, MSA128H>; 3363def : MSABitconvertReverseHInDPat<v8f16, v2f64, MSA128H>; 3364def : MSABitconvertReverseWInDPat<v4i32, v2f64, MSA128W>; 3365def : MSABitconvertReverseWInDPat<v4f32, v2f64, MSA128W>; 3366 3367// Pseudos used to implement BNZ.df, and BZ.df 3368 3369class MSA_CBRANCH_PSEUDO_DESC_BASE<SDPatternOperator OpNode, ValueType TyNode, 3370 RegisterClass RCWS, 3371 InstrItinClass itin = NoItinerary> : 3372 MipsPseudo<(outs GPR32:$dst), 3373 (ins RCWS:$ws), 3374 [(set GPR32:$dst, (OpNode (TyNode RCWS:$ws)))]> { 3375 bit usesCustomInserter = 1; 3376} 3377 3378def SNZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v16i8, 3379 MSA128B, NoItinerary>; 3380def SNZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v8i16, 3381 MSA128H, NoItinerary>; 3382def SNZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v4i32, 3383 MSA128W, NoItinerary>; 3384def SNZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v2i64, 3385 MSA128D, NoItinerary>; 3386def SNZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyNonZero, v16i8, 3387 MSA128B, NoItinerary>; 3388 3389def SZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v16i8, 3390 MSA128B, NoItinerary>; 3391def SZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v8i16, 3392 MSA128H, NoItinerary>; 3393def SZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v4i32, 3394 MSA128W, NoItinerary>; 3395def SZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v2i64, 3396 MSA128D, NoItinerary>; 3397def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8, 3398 MSA128B, NoItinerary>; 3399