MipsMSAInstrInfo.td revision c8a1fa77a73e7c885035421712ceba951f9024cb
1//===- MipsMSAInstrInfo.td - MSA ASE instructions -*- tablegen ------------*-=// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file describes Mips MSA ASE instructions. 11// 12//===----------------------------------------------------------------------===// 13 14def SDT_MipsVecCond : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisVec<1>]>; 15def SDT_VSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>, 16 SDTCisInt<1>, 17 SDTCisSameAs<1, 2>, 18 SDTCisVT<3, OtherVT>]>; 19def SDT_VFSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>, 20 SDTCisFP<1>, 21 SDTCisSameAs<1, 2>, 22 SDTCisVT<3, OtherVT>]>; 23def SDT_VSHF : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisVec<0>, 24 SDTCisInt<1>, SDTCisVec<1>, 25 SDTCisSameAs<0, 2>, SDTCisSameAs<2, 3>]>; 26def SDT_SHF : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>, 27 SDTCisVT<1, i32>, SDTCisSameAs<0, 2>]>; 28def SDT_ILV : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>, 29 SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>]>; 30 31def MipsVAllNonZero : SDNode<"MipsISD::VALL_NONZERO", SDT_MipsVecCond>; 32def MipsVAnyNonZero : SDNode<"MipsISD::VANY_NONZERO", SDT_MipsVecCond>; 33def MipsVAllZero : SDNode<"MipsISD::VALL_ZERO", SDT_MipsVecCond>; 34def MipsVAnyZero : SDNode<"MipsISD::VANY_ZERO", SDT_MipsVecCond>; 35def MipsVSMax : SDNode<"MipsISD::VSMAX", SDTIntBinOp, 36 [SDNPCommutative, SDNPAssociative]>; 37def MipsVSMin : SDNode<"MipsISD::VSMIN", SDTIntBinOp, 38 [SDNPCommutative, SDNPAssociative]>; 39def MipsVUMax : SDNode<"MipsISD::VUMAX", SDTIntBinOp, 40 [SDNPCommutative, SDNPAssociative]>; 41def MipsVUMin : SDNode<"MipsISD::VUMIN", SDTIntBinOp, 42 [SDNPCommutative, SDNPAssociative]>; 43def MipsVNOR : SDNode<"MipsISD::VNOR", SDTIntBinOp, 44 [SDNPCommutative, SDNPAssociative]>; 45def MipsVSHF : SDNode<"MipsISD::VSHF", SDT_VSHF>; 46def MipsSHF : SDNode<"MipsISD::SHF", SDT_SHF>; 47def MipsILVEV : SDNode<"MipsISD::ILVEV", SDT_ILV>; 48def MipsILVOD : SDNode<"MipsISD::ILVOD", SDT_ILV>; 49def MipsILVL : SDNode<"MipsISD::ILVL", SDT_ILV>; 50def MipsILVR : SDNode<"MipsISD::ILVR", SDT_ILV>; 51def MipsPCKEV : SDNode<"MipsISD::PCKEV", SDT_ILV>; 52def MipsPCKOD : SDNode<"MipsISD::PCKOD", SDT_ILV>; 53 54def vsetcc : SDNode<"ISD::SETCC", SDT_VSetCC>; 55def vfsetcc : SDNode<"ISD::SETCC", SDT_VFSetCC>; 56 57def MipsVExtractSExt : SDNode<"MipsISD::VEXTRACT_SEXT_ELT", 58 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 59def MipsVExtractZExt : SDNode<"MipsISD::VEXTRACT_ZEXT_ELT", 60 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 61 62// Operands 63 64def uimm3 : Operand<i32> { 65 let PrintMethod = "printUnsignedImm"; 66} 67 68def uimm4 : Operand<i32> { 69 let PrintMethod = "printUnsignedImm"; 70} 71 72def uimm8 : Operand<i32> { 73 let PrintMethod = "printUnsignedImm"; 74} 75 76def simm5 : Operand<i32>; 77 78def simm10 : Operand<i32>; 79 80def vsplat_uimm1 : Operand<vAny> { 81 let PrintMethod = "printUnsignedImm8"; 82} 83 84def vsplat_uimm2 : Operand<vAny> { 85 let PrintMethod = "printUnsignedImm8"; 86} 87 88def vsplat_uimm3 : Operand<vAny> { 89 let PrintMethod = "printUnsignedImm"; 90} 91 92def vsplat_uimm4 : Operand<vAny> { 93 let PrintMethod = "printUnsignedImm"; 94} 95 96def vsplat_uimm5 : Operand<vAny> { 97 let PrintMethod = "printUnsignedImm"; 98} 99 100def vsplat_uimm6 : Operand<vAny> { 101 let PrintMethod = "printUnsignedImm"; 102} 103 104def vsplat_uimm8 : Operand<vAny> { 105 let PrintMethod = "printUnsignedImm"; 106} 107 108def vsplat_simm5 : Operand<vAny>; 109 110def vsplat_simm10 : Operand<vAny>; 111 112// Pattern fragments 113def vextract_sext_i8 : PatFrag<(ops node:$vec, node:$idx), 114 (MipsVExtractSExt node:$vec, node:$idx, i8)>; 115def vextract_sext_i16 : PatFrag<(ops node:$vec, node:$idx), 116 (MipsVExtractSExt node:$vec, node:$idx, i16)>; 117def vextract_sext_i32 : PatFrag<(ops node:$vec, node:$idx), 118 (MipsVExtractSExt node:$vec, node:$idx, i32)>; 119 120def vextract_zext_i8 : PatFrag<(ops node:$vec, node:$idx), 121 (MipsVExtractZExt node:$vec, node:$idx, i8)>; 122def vextract_zext_i16 : PatFrag<(ops node:$vec, node:$idx), 123 (MipsVExtractZExt node:$vec, node:$idx, i16)>; 124def vextract_zext_i32 : PatFrag<(ops node:$vec, node:$idx), 125 (MipsVExtractZExt node:$vec, node:$idx, i32)>; 126 127def vinsert_v16i8 : PatFrag<(ops node:$vec, node:$val, node:$idx), 128 (v16i8 (vector_insert node:$vec, node:$val, node:$idx))>; 129def vinsert_v8i16 : PatFrag<(ops node:$vec, node:$val, node:$idx), 130 (v8i16 (vector_insert node:$vec, node:$val, node:$idx))>; 131def vinsert_v4i32 : PatFrag<(ops node:$vec, node:$val, node:$idx), 132 (v4i32 (vector_insert node:$vec, node:$val, node:$idx))>; 133 134class vfsetcc_type<ValueType ResTy, ValueType OpTy, CondCode CC> : 135 PatFrag<(ops node:$lhs, node:$rhs), 136 (ResTy (vfsetcc (OpTy node:$lhs), (OpTy node:$rhs), CC))>; 137 138// ISD::SETFALSE cannot occur 139def vfsetoeq_v4f32 : vfsetcc_type<v4i32, v4f32, SETOEQ>; 140def vfsetoeq_v2f64 : vfsetcc_type<v2i64, v2f64, SETOEQ>; 141def vfsetoge_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGE>; 142def vfsetoge_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGE>; 143def vfsetogt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGT>; 144def vfsetogt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGT>; 145def vfsetole_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLE>; 146def vfsetole_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLE>; 147def vfsetolt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLT>; 148def vfsetolt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLT>; 149def vfsetone_v4f32 : vfsetcc_type<v4i32, v4f32, SETONE>; 150def vfsetone_v2f64 : vfsetcc_type<v2i64, v2f64, SETONE>; 151def vfsetord_v4f32 : vfsetcc_type<v4i32, v4f32, SETO>; 152def vfsetord_v2f64 : vfsetcc_type<v2i64, v2f64, SETO>; 153def vfsetun_v4f32 : vfsetcc_type<v4i32, v4f32, SETUO>; 154def vfsetun_v2f64 : vfsetcc_type<v2i64, v2f64, SETUO>; 155def vfsetueq_v4f32 : vfsetcc_type<v4i32, v4f32, SETUEQ>; 156def vfsetueq_v2f64 : vfsetcc_type<v2i64, v2f64, SETUEQ>; 157def vfsetuge_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGE>; 158def vfsetuge_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGE>; 159def vfsetugt_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGT>; 160def vfsetugt_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGT>; 161def vfsetule_v4f32 : vfsetcc_type<v4i32, v4f32, SETULE>; 162def vfsetule_v2f64 : vfsetcc_type<v2i64, v2f64, SETULE>; 163def vfsetult_v4f32 : vfsetcc_type<v4i32, v4f32, SETULT>; 164def vfsetult_v2f64 : vfsetcc_type<v2i64, v2f64, SETULT>; 165def vfsetune_v4f32 : vfsetcc_type<v4i32, v4f32, SETUNE>; 166def vfsetune_v2f64 : vfsetcc_type<v2i64, v2f64, SETUNE>; 167// ISD::SETTRUE cannot occur 168// ISD::SETFALSE2 cannot occur 169// ISD::SETTRUE2 cannot occur 170 171class vsetcc_type<ValueType ResTy, CondCode CC> : 172 PatFrag<(ops node:$lhs, node:$rhs), 173 (ResTy (vsetcc node:$lhs, node:$rhs, CC))>; 174 175def vseteq_v16i8 : vsetcc_type<v16i8, SETEQ>; 176def vseteq_v8i16 : vsetcc_type<v8i16, SETEQ>; 177def vseteq_v4i32 : vsetcc_type<v4i32, SETEQ>; 178def vseteq_v2i64 : vsetcc_type<v2i64, SETEQ>; 179def vsetle_v16i8 : vsetcc_type<v16i8, SETLE>; 180def vsetle_v8i16 : vsetcc_type<v8i16, SETLE>; 181def vsetle_v4i32 : vsetcc_type<v4i32, SETLE>; 182def vsetle_v2i64 : vsetcc_type<v2i64, SETLE>; 183def vsetlt_v16i8 : vsetcc_type<v16i8, SETLT>; 184def vsetlt_v8i16 : vsetcc_type<v8i16, SETLT>; 185def vsetlt_v4i32 : vsetcc_type<v4i32, SETLT>; 186def vsetlt_v2i64 : vsetcc_type<v2i64, SETLT>; 187def vsetule_v16i8 : vsetcc_type<v16i8, SETULE>; 188def vsetule_v8i16 : vsetcc_type<v8i16, SETULE>; 189def vsetule_v4i32 : vsetcc_type<v4i32, SETULE>; 190def vsetule_v2i64 : vsetcc_type<v2i64, SETULE>; 191def vsetult_v16i8 : vsetcc_type<v16i8, SETULT>; 192def vsetult_v8i16 : vsetcc_type<v8i16, SETULT>; 193def vsetult_v4i32 : vsetcc_type<v4i32, SETULT>; 194def vsetult_v2i64 : vsetcc_type<v2i64, SETULT>; 195 196def vsplati8 : PatFrag<(ops node:$e0), 197 (v16i8 (build_vector node:$e0, node:$e0, 198 node:$e0, node:$e0, 199 node:$e0, node:$e0, 200 node:$e0, node:$e0, 201 node:$e0, node:$e0, 202 node:$e0, node:$e0, 203 node:$e0, node:$e0, 204 node:$e0, node:$e0))>; 205def vsplati16 : PatFrag<(ops node:$e0), 206 (v8i16 (build_vector node:$e0, node:$e0, 207 node:$e0, node:$e0, 208 node:$e0, node:$e0, 209 node:$e0, node:$e0))>; 210def vsplati32 : PatFrag<(ops node:$e0), 211 (v4i32 (build_vector node:$e0, node:$e0, 212 node:$e0, node:$e0))>; 213def vsplati64 : PatFrag<(ops node:$e0), 214 (v2i64 (build_vector:$v0 node:$e0, node:$e0))>; 215 216class SplatPatLeaf<Operand opclass, dag frag, code pred = [{}], 217 SDNodeXForm xform = NOOP_SDNodeXForm> 218 : PatLeaf<frag, pred, xform> { 219 Operand OpClass = opclass; 220} 221 222class SplatComplexPattern<Operand opclass, ValueType ty, int numops, string fn, 223 list<SDNode> roots = [], 224 list<SDNodeProperty> props = []> : 225 ComplexPattern<ty, numops, fn, roots, props> { 226 Operand OpClass = opclass; 227} 228 229def vsplati8_uimm3 : SplatComplexPattern<vsplat_uimm3, v16i8, 1, 230 "selectVSplatUimm3", 231 [build_vector, bitconvert]>; 232 233def vsplati8_uimm4 : SplatComplexPattern<vsplat_uimm4, v16i8, 1, 234 "selectVSplatUimm4", 235 [build_vector, bitconvert]>; 236 237def vsplati8_uimm5 : SplatComplexPattern<vsplat_uimm5, v16i8, 1, 238 "selectVSplatUimm5", 239 [build_vector, bitconvert]>; 240 241def vsplati8_uimm8 : SplatComplexPattern<vsplat_uimm8, v16i8, 1, 242 "selectVSplatUimm8", 243 [build_vector, bitconvert]>; 244 245def vsplati8_simm5 : SplatComplexPattern<vsplat_simm5, v16i8, 1, 246 "selectVSplatSimm5", 247 [build_vector, bitconvert]>; 248 249def vsplati16_uimm3 : SplatComplexPattern<vsplat_uimm3, v8i16, 1, 250 "selectVSplatUimm3", 251 [build_vector, bitconvert]>; 252 253def vsplati16_uimm4 : SplatComplexPattern<vsplat_uimm4, v8i16, 1, 254 "selectVSplatUimm4", 255 [build_vector, bitconvert]>; 256 257def vsplati16_uimm5 : SplatComplexPattern<vsplat_uimm5, v8i16, 1, 258 "selectVSplatUimm5", 259 [build_vector, bitconvert]>; 260 261def vsplati16_simm5 : SplatComplexPattern<vsplat_simm5, v8i16, 1, 262 "selectVSplatSimm5", 263 [build_vector, bitconvert]>; 264 265def vsplati32_uimm2 : SplatComplexPattern<vsplat_uimm2, v4i32, 1, 266 "selectVSplatUimm2", 267 [build_vector, bitconvert]>; 268 269def vsplati32_uimm5 : SplatComplexPattern<vsplat_uimm5, v4i32, 1, 270 "selectVSplatUimm5", 271 [build_vector, bitconvert]>; 272 273def vsplati32_simm5 : SplatComplexPattern<vsplat_simm5, v4i32, 1, 274 "selectVSplatSimm5", 275 [build_vector, bitconvert]>; 276 277def vsplati64_uimm1 : SplatComplexPattern<vsplat_uimm1, v2i64, 1, 278 "selectVSplatUimm1", 279 [build_vector, bitconvert]>; 280 281def vsplati64_uimm5 : SplatComplexPattern<vsplat_uimm5, v2i64, 1, 282 "selectVSplatUimm5", 283 [build_vector, bitconvert]>; 284 285def vsplati64_uimm6 : SplatComplexPattern<vsplat_uimm6, v2i64, 1, 286 "selectVSplatUimm6", 287 [build_vector, bitconvert]>; 288 289def vsplati64_simm5 : SplatComplexPattern<vsplat_simm5, v2i64, 1, 290 "selectVSplatSimm5", 291 [build_vector, bitconvert]>; 292 293// Any build_vector that is a constant splat with a value that is an exact 294// power of 2 295def vsplat_uimm_pow2 : ComplexPattern<vAny, 1, "selectVSplatUimmPow2", 296 [build_vector, bitconvert]>; 297 298// Immediates 299def immSExt5 : ImmLeaf<i32, [{return isInt<5>(Imm);}]>; 300def immSExt10: ImmLeaf<i32, [{return isInt<10>(Imm);}]>; 301 302// Instruction encoding. 303class ADD_A_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010000>; 304class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>; 305class ADD_A_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010000>; 306class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>; 307 308class ADDS_A_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010000>; 309class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>; 310class ADDS_A_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010000>; 311class ADDS_A_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010000>; 312 313class ADDS_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010000>; 314class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>; 315class ADDS_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010000>; 316class ADDS_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010000>; 317 318class ADDS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010000>; 319class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>; 320class ADDS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010000>; 321class ADDS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010000>; 322 323class ADDV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001110>; 324class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>; 325class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>; 326class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>; 327 328class ADDVI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000110>; 329class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>; 330class ADDVI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000110>; 331class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>; 332 333class AND_V_ENC : MSA_VEC_FMT<0b00000, 0b011110>; 334 335class ANDI_B_ENC : MSA_I8_FMT<0b00, 0b000000>; 336 337class ASUB_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010001>; 338class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>; 339class ASUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010001>; 340class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>; 341 342class ASUB_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010001>; 343class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>; 344class ASUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010001>; 345class ASUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010001>; 346 347class AVE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010000>; 348class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>; 349class AVE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010000>; 350class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>; 351 352class AVE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010000>; 353class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>; 354class AVE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010000>; 355class AVE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010000>; 356 357class AVER_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010000>; 358class AVER_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010000>; 359class AVER_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010000>; 360class AVER_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010000>; 361 362class AVER_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010000>; 363class AVER_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010000>; 364class AVER_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010000>; 365class AVER_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010000>; 366 367class BCLR_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001101>; 368class BCLR_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001101>; 369class BCLR_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001101>; 370class BCLR_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001101>; 371 372class BCLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001001>; 373class BCLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001001>; 374class BCLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001001>; 375class BCLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001001>; 376 377class BINSL_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001101>; 378class BINSL_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001101>; 379class BINSL_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001101>; 380class BINSL_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001101>; 381 382class BINSLI_B_ENC : MSA_BIT_B_FMT<0b110, 0b001001>; 383class BINSLI_H_ENC : MSA_BIT_H_FMT<0b110, 0b001001>; 384class BINSLI_W_ENC : MSA_BIT_W_FMT<0b110, 0b001001>; 385class BINSLI_D_ENC : MSA_BIT_D_FMT<0b110, 0b001001>; 386 387class BINSR_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001101>; 388class BINSR_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001101>; 389class BINSR_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001101>; 390class BINSR_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001101>; 391 392class BINSRI_B_ENC : MSA_BIT_B_FMT<0b111, 0b001001>; 393class BINSRI_H_ENC : MSA_BIT_H_FMT<0b111, 0b001001>; 394class BINSRI_W_ENC : MSA_BIT_W_FMT<0b111, 0b001001>; 395class BINSRI_D_ENC : MSA_BIT_D_FMT<0b111, 0b001001>; 396 397class BMNZ_V_ENC : MSA_VEC_FMT<0b00100, 0b011110>; 398 399class BMNZI_B_ENC : MSA_I8_FMT<0b00, 0b000001>; 400 401class BMZ_V_ENC : MSA_VEC_FMT<0b00101, 0b011110>; 402 403class BMZI_B_ENC : MSA_I8_FMT<0b01, 0b000001>; 404 405class BNEG_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001101>; 406class BNEG_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001101>; 407class BNEG_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001101>; 408class BNEG_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001101>; 409 410class BNEGI_B_ENC : MSA_BIT_B_FMT<0b101, 0b001001>; 411class BNEGI_H_ENC : MSA_BIT_H_FMT<0b101, 0b001001>; 412class BNEGI_W_ENC : MSA_BIT_W_FMT<0b101, 0b001001>; 413class BNEGI_D_ENC : MSA_BIT_D_FMT<0b101, 0b001001>; 414 415class BNZ_B_ENC : MSA_I10_FMT<0b000, 0b00, 0b001100>; 416class BNZ_H_ENC : MSA_I10_FMT<0b000, 0b01, 0b001100>; 417class BNZ_W_ENC : MSA_I10_FMT<0b000, 0b10, 0b001100>; 418class BNZ_D_ENC : MSA_I10_FMT<0b000, 0b11, 0b001100>; 419 420class BNZ_V_ENC : MSA_VEC_FMT<0b01000, 0b011110>; 421 422class BSEL_V_ENC : MSA_VECS10_FMT<0b00110, 0b011110>; 423 424class BSELI_B_ENC : MSA_I8_FMT<0b10, 0b000001>; 425 426class BSET_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001101>; 427class BSET_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001101>; 428class BSET_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001101>; 429class BSET_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001101>; 430 431class BSETI_B_ENC : MSA_BIT_B_FMT<0b100, 0b001001>; 432class BSETI_H_ENC : MSA_BIT_H_FMT<0b100, 0b001001>; 433class BSETI_W_ENC : MSA_BIT_W_FMT<0b100, 0b001001>; 434class BSETI_D_ENC : MSA_BIT_D_FMT<0b100, 0b001001>; 435 436class BZ_B_ENC : MSA_I10_FMT<0b001, 0b00, 0b001100>; 437class BZ_H_ENC : MSA_I10_FMT<0b001, 0b01, 0b001100>; 438class BZ_W_ENC : MSA_I10_FMT<0b001, 0b10, 0b001100>; 439class BZ_D_ENC : MSA_I10_FMT<0b001, 0b11, 0b001100>; 440 441class BZ_V_ENC : MSA_VECS10_FMT<0b01001, 0b011110>; 442 443class CEQ_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001111>; 444class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>; 445class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>; 446class CEQ_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001111>; 447 448class CEQI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000111>; 449class CEQI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000111>; 450class CEQI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000111>; 451class CEQI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000111>; 452 453class CFCMSA_ENC : MSA_ELM_FMT<0b0001111110, 0b011001>; 454 455class CLE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001111>; 456class CLE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001111>; 457class CLE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001111>; 458class CLE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001111>; 459 460class CLE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001111>; 461class CLE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001111>; 462class CLE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001111>; 463class CLE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001111>; 464 465class CLEI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000111>; 466class CLEI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000111>; 467class CLEI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000111>; 468class CLEI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000111>; 469 470class CLEI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000111>; 471class CLEI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000111>; 472class CLEI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000111>; 473class CLEI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000111>; 474 475class CLT_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001111>; 476class CLT_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001111>; 477class CLT_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001111>; 478class CLT_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001111>; 479 480class CLT_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001111>; 481class CLT_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001111>; 482class CLT_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001111>; 483class CLT_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001111>; 484 485class CLTI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000111>; 486class CLTI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000111>; 487class CLTI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000111>; 488class CLTI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000111>; 489 490class CLTI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000111>; 491class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>; 492class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>; 493class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>; 494 495class COPY_S_B_ENC : MSA_ELM_B_FMT<0b0010, 0b011001>; 496class COPY_S_H_ENC : MSA_ELM_H_FMT<0b0010, 0b011001>; 497class COPY_S_W_ENC : MSA_ELM_W_FMT<0b0010, 0b011001>; 498 499class COPY_U_B_ENC : MSA_ELM_B_FMT<0b0011, 0b011001>; 500class COPY_U_H_ENC : MSA_ELM_H_FMT<0b0011, 0b011001>; 501class COPY_U_W_ENC : MSA_ELM_W_FMT<0b0011, 0b011001>; 502 503class CTCMSA_ENC : MSA_ELM_FMT<0b0000111110, 0b011001>; 504 505class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>; 506class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>; 507class DIV_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010010>; 508class DIV_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010010>; 509 510class DIV_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010010>; 511class DIV_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010010>; 512class DIV_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010010>; 513class DIV_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010010>; 514 515class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>; 516class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>; 517class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>; 518 519class DOTP_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010011>; 520class DOTP_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010011>; 521class DOTP_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010011>; 522 523class DPADD_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010011>; 524class DPADD_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010011>; 525class DPADD_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010011>; 526 527class DPADD_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010011>; 528class DPADD_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010011>; 529class DPADD_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010011>; 530 531class DPSUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010011>; 532class DPSUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010011>; 533class DPSUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010011>; 534 535class DPSUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010011>; 536class DPSUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010011>; 537class DPSUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010011>; 538 539class FADD_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011011>; 540class FADD_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011011>; 541 542class FCAF_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011010>; 543class FCAF_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011010>; 544 545class FCEQ_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011010>; 546class FCEQ_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011010>; 547 548class FCLASS_W_ENC : MSA_2RF_FMT<0b110010000, 0b0, 0b011110>; 549class FCLASS_D_ENC : MSA_2RF_FMT<0b110010000, 0b1, 0b011110>; 550 551class FCLE_W_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011010>; 552class FCLE_D_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011010>; 553 554class FCLT_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011010>; 555class FCLT_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011010>; 556 557class FCNE_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011100>; 558class FCNE_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011100>; 559 560class FCOR_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011100>; 561class FCOR_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011100>; 562 563class FCUEQ_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011010>; 564class FCUEQ_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011010>; 565 566class FCULE_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011010>; 567class FCULE_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011010>; 568 569class FCULT_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011010>; 570class FCULT_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011010>; 571 572class FCUN_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011010>; 573class FCUN_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011010>; 574 575class FCUNE_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011100>; 576class FCUNE_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011100>; 577 578class FDIV_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011011>; 579class FDIV_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011011>; 580 581class FEXDO_H_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011011>; 582class FEXDO_W_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011011>; 583 584class FEXP2_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011011>; 585class FEXP2_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011011>; 586 587class FEXUPL_W_ENC : MSA_2RF_FMT<0b110011000, 0b0, 0b011110>; 588class FEXUPL_D_ENC : MSA_2RF_FMT<0b110011000, 0b1, 0b011110>; 589 590class FEXUPR_W_ENC : MSA_2RF_FMT<0b110011001, 0b0, 0b011110>; 591class FEXUPR_D_ENC : MSA_2RF_FMT<0b110011001, 0b1, 0b011110>; 592 593class FFINT_S_W_ENC : MSA_2RF_FMT<0b110011110, 0b0, 0b011110>; 594class FFINT_S_D_ENC : MSA_2RF_FMT<0b110011110, 0b1, 0b011110>; 595 596class FFINT_U_W_ENC : MSA_2RF_FMT<0b110011111, 0b0, 0b011110>; 597class FFINT_U_D_ENC : MSA_2RF_FMT<0b110011111, 0b1, 0b011110>; 598 599class FFQL_W_ENC : MSA_2RF_FMT<0b110011010, 0b0, 0b011110>; 600class FFQL_D_ENC : MSA_2RF_FMT<0b110011010, 0b1, 0b011110>; 601 602class FFQR_W_ENC : MSA_2RF_FMT<0b110011011, 0b0, 0b011110>; 603class FFQR_D_ENC : MSA_2RF_FMT<0b110011011, 0b1, 0b011110>; 604 605class FILL_B_ENC : MSA_2R_FMT<0b11000000, 0b00, 0b011110>; 606class FILL_H_ENC : MSA_2R_FMT<0b11000000, 0b01, 0b011110>; 607class FILL_W_ENC : MSA_2R_FMT<0b11000000, 0b10, 0b011110>; 608 609class FLOG2_W_ENC : MSA_2RF_FMT<0b110010111, 0b0, 0b011110>; 610class FLOG2_D_ENC : MSA_2RF_FMT<0b110010111, 0b1, 0b011110>; 611 612class FMADD_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011011>; 613class FMADD_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011011>; 614 615class FMAX_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011011>; 616class FMAX_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011011>; 617 618class FMAX_A_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011011>; 619class FMAX_A_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011011>; 620 621class FMIN_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011011>; 622class FMIN_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011011>; 623 624class FMIN_A_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011011>; 625class FMIN_A_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011011>; 626 627class FMSUB_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011011>; 628class FMSUB_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011011>; 629 630class FMUL_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011011>; 631class FMUL_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011011>; 632 633class FRINT_W_ENC : MSA_2RF_FMT<0b110010110, 0b0, 0b011110>; 634class FRINT_D_ENC : MSA_2RF_FMT<0b110010110, 0b1, 0b011110>; 635 636class FRCP_W_ENC : MSA_2RF_FMT<0b110010101, 0b0, 0b011110>; 637class FRCP_D_ENC : MSA_2RF_FMT<0b110010101, 0b1, 0b011110>; 638 639class FRSQRT_W_ENC : MSA_2RF_FMT<0b110010100, 0b0, 0b011110>; 640class FRSQRT_D_ENC : MSA_2RF_FMT<0b110010100, 0b1, 0b011110>; 641 642class FSAF_W_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011010>; 643class FSAF_D_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011010>; 644 645class FSEQ_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011010>; 646class FSEQ_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011010>; 647 648class FSLE_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011010>; 649class FSLE_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011010>; 650 651class FSLT_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011010>; 652class FSLT_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011010>; 653 654class FSNE_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011100>; 655class FSNE_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011100>; 656 657class FSOR_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011100>; 658class FSOR_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011100>; 659 660class FSQRT_W_ENC : MSA_2RF_FMT<0b110010011, 0b0, 0b011110>; 661class FSQRT_D_ENC : MSA_2RF_FMT<0b110010011, 0b1, 0b011110>; 662 663class FSUB_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011011>; 664class FSUB_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011011>; 665 666class FSUEQ_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011010>; 667class FSUEQ_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011010>; 668 669class FSULE_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011010>; 670class FSULE_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011010>; 671 672class FSULT_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011010>; 673class FSULT_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011010>; 674 675class FSUN_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011010>; 676class FSUN_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011010>; 677 678class FSUNE_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011100>; 679class FSUNE_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011100>; 680 681class FTRUNC_S_W_ENC : MSA_2RF_FMT<0b110010001, 0b0, 0b011110>; 682class FTRUNC_S_D_ENC : MSA_2RF_FMT<0b110010001, 0b1, 0b011110>; 683 684class FTRUNC_U_W_ENC : MSA_2RF_FMT<0b110010010, 0b0, 0b011110>; 685class FTRUNC_U_D_ENC : MSA_2RF_FMT<0b110010010, 0b1, 0b011110>; 686 687class FTINT_S_W_ENC : MSA_2RF_FMT<0b110011100, 0b0, 0b011110>; 688class FTINT_S_D_ENC : MSA_2RF_FMT<0b110011100, 0b1, 0b011110>; 689 690class FTINT_U_W_ENC : MSA_2RF_FMT<0b110011101, 0b0, 0b011110>; 691class FTINT_U_D_ENC : MSA_2RF_FMT<0b110011101, 0b1, 0b011110>; 692 693class FTQ_H_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011011>; 694class FTQ_W_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011011>; 695 696class HADD_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010101>; 697class HADD_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010101>; 698class HADD_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010101>; 699 700class HADD_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010101>; 701class HADD_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010101>; 702class HADD_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010101>; 703 704class HSUB_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010101>; 705class HSUB_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010101>; 706class HSUB_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010101>; 707 708class HSUB_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010101>; 709class HSUB_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010101>; 710class HSUB_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010101>; 711 712class ILVEV_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010100>; 713class ILVEV_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010100>; 714class ILVEV_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010100>; 715class ILVEV_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010100>; 716 717class ILVL_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010100>; 718class ILVL_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010100>; 719class ILVL_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010100>; 720class ILVL_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010100>; 721 722class ILVOD_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010100>; 723class ILVOD_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010100>; 724class ILVOD_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010100>; 725class ILVOD_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010100>; 726 727class ILVR_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010100>; 728class ILVR_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010100>; 729class ILVR_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010100>; 730class ILVR_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010100>; 731 732class INSERT_B_ENC : MSA_ELM_B_FMT<0b0100, 0b011001>; 733class INSERT_H_ENC : MSA_ELM_H_FMT<0b0100, 0b011001>; 734class INSERT_W_ENC : MSA_ELM_W_FMT<0b0100, 0b011001>; 735 736class INSVE_B_ENC : MSA_ELM_B_FMT<0b0101, 0b011001>; 737class INSVE_H_ENC : MSA_ELM_H_FMT<0b0101, 0b011001>; 738class INSVE_W_ENC : MSA_ELM_W_FMT<0b0101, 0b011001>; 739class INSVE_D_ENC : MSA_ELM_D_FMT<0b0101, 0b011001>; 740 741class LD_B_ENC : MSA_I5_FMT<0b110, 0b00, 0b000111>; 742class LD_H_ENC : MSA_I5_FMT<0b110, 0b01, 0b000111>; 743class LD_W_ENC : MSA_I5_FMT<0b110, 0b10, 0b000111>; 744class LD_D_ENC : MSA_I5_FMT<0b110, 0b11, 0b000111>; 745 746class LDI_B_ENC : MSA_I10_FMT<0b010, 0b00, 0b001100>; 747class LDI_H_ENC : MSA_I10_FMT<0b010, 0b01, 0b001100>; 748class LDI_W_ENC : MSA_I10_FMT<0b010, 0b10, 0b001100>; 749class LDI_D_ENC : MSA_I10_FMT<0b010, 0b11, 0b001100>; 750 751class LDX_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001111>; 752class LDX_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001111>; 753class LDX_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001111>; 754class LDX_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001111>; 755 756class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>; 757class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>; 758 759class MADDR_Q_H_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011100>; 760class MADDR_Q_W_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011100>; 761 762class MADDV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010010>; 763class MADDV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010010>; 764class MADDV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010010>; 765class MADDV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010010>; 766 767class MAX_A_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001110>; 768class MAX_A_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001110>; 769class MAX_A_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001110>; 770class MAX_A_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001110>; 771 772class MAX_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001110>; 773class MAX_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001110>; 774class MAX_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001110>; 775class MAX_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001110>; 776 777class MAX_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001110>; 778class MAX_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001110>; 779class MAX_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001110>; 780class MAX_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001110>; 781 782class MAXI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000110>; 783class MAXI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000110>; 784class MAXI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000110>; 785class MAXI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000110>; 786 787class MAXI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000110>; 788class MAXI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000110>; 789class MAXI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000110>; 790class MAXI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000110>; 791 792class MIN_A_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001110>; 793class MIN_A_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001110>; 794class MIN_A_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001110>; 795class MIN_A_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001110>; 796 797class MIN_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001110>; 798class MIN_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001110>; 799class MIN_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001110>; 800class MIN_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001110>; 801 802class MIN_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001110>; 803class MIN_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001110>; 804class MIN_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001110>; 805class MIN_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001110>; 806 807class MINI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000110>; 808class MINI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000110>; 809class MINI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000110>; 810class MINI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000110>; 811 812class MINI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000110>; 813class MINI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000110>; 814class MINI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000110>; 815class MINI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000110>; 816 817class MOD_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010010>; 818class MOD_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010010>; 819class MOD_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010010>; 820class MOD_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010010>; 821 822class MOD_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010010>; 823class MOD_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010010>; 824class MOD_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010010>; 825class MOD_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010010>; 826 827class MOVE_V_ENC : MSA_ELM_FMT<0b0010111110, 0b011001>; 828 829class MSUB_Q_H_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011100>; 830class MSUB_Q_W_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011100>; 831 832class MSUBR_Q_H_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011100>; 833class MSUBR_Q_W_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011100>; 834 835class MSUBV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010010>; 836class MSUBV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010010>; 837class MSUBV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010010>; 838class MSUBV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010010>; 839 840class MUL_Q_H_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011100>; 841class MUL_Q_W_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011100>; 842 843class MULR_Q_H_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011100>; 844class MULR_Q_W_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011100>; 845 846class MULV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010010>; 847class MULV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010010>; 848class MULV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010010>; 849class MULV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010010>; 850 851class NLOC_B_ENC : MSA_2R_FMT<0b11000010, 0b00, 0b011110>; 852class NLOC_H_ENC : MSA_2R_FMT<0b11000010, 0b01, 0b011110>; 853class NLOC_W_ENC : MSA_2R_FMT<0b11000010, 0b10, 0b011110>; 854class NLOC_D_ENC : MSA_2R_FMT<0b11000010, 0b11, 0b011110>; 855 856class NLZC_B_ENC : MSA_2R_FMT<0b11000011, 0b00, 0b011110>; 857class NLZC_H_ENC : MSA_2R_FMT<0b11000011, 0b01, 0b011110>; 858class NLZC_W_ENC : MSA_2R_FMT<0b11000011, 0b10, 0b011110>; 859class NLZC_D_ENC : MSA_2R_FMT<0b11000011, 0b11, 0b011110>; 860 861class NOR_V_ENC : MSA_VEC_FMT<0b00010, 0b011110>; 862 863class NORI_B_ENC : MSA_I8_FMT<0b10, 0b000000>; 864 865class OR_V_ENC : MSA_VEC_FMT<0b00001, 0b011110>; 866 867class ORI_B_ENC : MSA_I8_FMT<0b01, 0b000000>; 868 869class PCKEV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010100>; 870class PCKEV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010100>; 871class PCKEV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010100>; 872class PCKEV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010100>; 873 874class PCKOD_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010100>; 875class PCKOD_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010100>; 876class PCKOD_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010100>; 877class PCKOD_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010100>; 878 879class PCNT_B_ENC : MSA_2R_FMT<0b11000001, 0b00, 0b011110>; 880class PCNT_H_ENC : MSA_2R_FMT<0b11000001, 0b01, 0b011110>; 881class PCNT_W_ENC : MSA_2R_FMT<0b11000001, 0b10, 0b011110>; 882class PCNT_D_ENC : MSA_2R_FMT<0b11000001, 0b11, 0b011110>; 883 884class SAT_S_B_ENC : MSA_BIT_B_FMT<0b000, 0b001010>; 885class SAT_S_H_ENC : MSA_BIT_H_FMT<0b000, 0b001010>; 886class SAT_S_W_ENC : MSA_BIT_W_FMT<0b000, 0b001010>; 887class SAT_S_D_ENC : MSA_BIT_D_FMT<0b000, 0b001010>; 888 889class SAT_U_B_ENC : MSA_BIT_B_FMT<0b001, 0b001010>; 890class SAT_U_H_ENC : MSA_BIT_H_FMT<0b001, 0b001010>; 891class SAT_U_W_ENC : MSA_BIT_W_FMT<0b001, 0b001010>; 892class SAT_U_D_ENC : MSA_BIT_D_FMT<0b001, 0b001010>; 893 894class SHF_B_ENC : MSA_I8_FMT<0b00, 0b000010>; 895class SHF_H_ENC : MSA_I8_FMT<0b01, 0b000010>; 896class SHF_W_ENC : MSA_I8_FMT<0b10, 0b000010>; 897 898class SLD_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010100>; 899class SLD_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010100>; 900class SLD_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010100>; 901class SLD_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010100>; 902 903class SLDI_B_ENC : MSA_ELM_B_FMT<0b0000, 0b011001>; 904class SLDI_H_ENC : MSA_ELM_H_FMT<0b0000, 0b011001>; 905class SLDI_W_ENC : MSA_ELM_W_FMT<0b0000, 0b011001>; 906class SLDI_D_ENC : MSA_ELM_D_FMT<0b0000, 0b011001>; 907 908class SLL_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001101>; 909class SLL_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001101>; 910class SLL_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001101>; 911class SLL_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001101>; 912 913class SLLI_B_ENC : MSA_BIT_B_FMT<0b000, 0b001001>; 914class SLLI_H_ENC : MSA_BIT_H_FMT<0b000, 0b001001>; 915class SLLI_W_ENC : MSA_BIT_W_FMT<0b000, 0b001001>; 916class SLLI_D_ENC : MSA_BIT_D_FMT<0b000, 0b001001>; 917 918class SPLAT_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010100>; 919class SPLAT_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010100>; 920class SPLAT_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010100>; 921class SPLAT_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010100>; 922 923class SPLATI_B_ENC : MSA_ELM_B_FMT<0b0001, 0b011001>; 924class SPLATI_H_ENC : MSA_ELM_H_FMT<0b0001, 0b011001>; 925class SPLATI_W_ENC : MSA_ELM_W_FMT<0b0001, 0b011001>; 926class SPLATI_D_ENC : MSA_ELM_D_FMT<0b0001, 0b011001>; 927 928class SRA_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001101>; 929class SRA_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001101>; 930class SRA_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001101>; 931class SRA_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001101>; 932 933class SRAI_B_ENC : MSA_BIT_B_FMT<0b001, 0b001001>; 934class SRAI_H_ENC : MSA_BIT_H_FMT<0b001, 0b001001>; 935class SRAI_W_ENC : MSA_BIT_W_FMT<0b001, 0b001001>; 936class SRAI_D_ENC : MSA_BIT_D_FMT<0b001, 0b001001>; 937 938class SRAR_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010101>; 939class SRAR_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010101>; 940class SRAR_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010101>; 941class SRAR_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010101>; 942 943class SRARI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001010>; 944class SRARI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001010>; 945class SRARI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001010>; 946class SRARI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001010>; 947 948class SRL_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001101>; 949class SRL_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001101>; 950class SRL_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001101>; 951class SRL_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001101>; 952 953class SRLI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001001>; 954class SRLI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001001>; 955class SRLI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001001>; 956class SRLI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001001>; 957 958class SRLR_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010101>; 959class SRLR_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010101>; 960class SRLR_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010101>; 961class SRLR_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010101>; 962 963class SRLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001010>; 964class SRLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001010>; 965class SRLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001010>; 966class SRLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001010>; 967 968class ST_B_ENC : MSA_I5_FMT<0b111, 0b00, 0b000111>; 969class ST_H_ENC : MSA_I5_FMT<0b111, 0b01, 0b000111>; 970class ST_W_ENC : MSA_I5_FMT<0b111, 0b10, 0b000111>; 971class ST_D_ENC : MSA_I5_FMT<0b111, 0b11, 0b000111>; 972 973class STX_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001111>; 974class STX_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001111>; 975class STX_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001111>; 976class STX_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001111>; 977 978class SUBS_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010001>; 979class SUBS_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010001>; 980class SUBS_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010001>; 981class SUBS_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010001>; 982 983class SUBS_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010001>; 984class SUBS_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010001>; 985class SUBS_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010001>; 986class SUBS_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010001>; 987 988class SUBSUS_U_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010001>; 989class SUBSUS_U_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010001>; 990class SUBSUS_U_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010001>; 991class SUBSUS_U_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010001>; 992 993class SUBSUU_S_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010001>; 994class SUBSUU_S_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010001>; 995class SUBSUU_S_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010001>; 996class SUBSUU_S_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010001>; 997 998class SUBV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001110>; 999class SUBV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001110>; 1000class SUBV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001110>; 1001class SUBV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001110>; 1002 1003class SUBVI_B_ENC : MSA_I5_FMT<0b001, 0b00, 0b000110>; 1004class SUBVI_H_ENC : MSA_I5_FMT<0b001, 0b01, 0b000110>; 1005class SUBVI_W_ENC : MSA_I5_FMT<0b001, 0b10, 0b000110>; 1006class SUBVI_D_ENC : MSA_I5_FMT<0b001, 0b11, 0b000110>; 1007 1008class VSHF_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010101>; 1009class VSHF_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010101>; 1010class VSHF_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010101>; 1011class VSHF_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010101>; 1012 1013class XOR_V_ENC : MSA_VEC_FMT<0b00011, 0b011110>; 1014 1015class XORI_B_ENC : MSA_I8_FMT<0b11, 0b000000>; 1016 1017// Instruction desc. 1018class MSA_BIT_B_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1019 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1020 InstrItinClass itin = NoItinerary> { 1021 dag OutOperandList = (outs RCWD:$wd); 1022 dag InOperandList = (ins RCWS:$ws, uimm3:$u3); 1023 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u3"); 1024 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt3:$u3))]; 1025 InstrItinClass Itinerary = itin; 1026} 1027 1028class MSA_BIT_H_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1029 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1030 InstrItinClass itin = NoItinerary> { 1031 dag OutOperandList = (outs RCWD:$wd); 1032 dag InOperandList = (ins RCWS:$ws, uimm4:$u4); 1033 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u4"); 1034 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt4:$u4))]; 1035 InstrItinClass Itinerary = itin; 1036} 1037 1038class MSA_BIT_W_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1039 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1040 InstrItinClass itin = NoItinerary> { 1041 dag OutOperandList = (outs RCWD:$wd); 1042 dag InOperandList = (ins RCWS:$ws, uimm5:$u5); 1043 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5"); 1044 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt5:$u5))]; 1045 InstrItinClass Itinerary = itin; 1046} 1047 1048class MSA_BIT_D_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1049 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1050 InstrItinClass itin = NoItinerary> { 1051 dag OutOperandList = (outs RCWD:$wd); 1052 dag InOperandList = (ins RCWS:$ws, uimm6:$u6); 1053 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u6"); 1054 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt6:$u6))]; 1055 InstrItinClass Itinerary = itin; 1056} 1057 1058class MSA_BIT_SPLAT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1059 SplatComplexPattern SplatImm, RegisterClass RCWD, 1060 RegisterClass RCWS = RCWD, 1061 InstrItinClass itin = NoItinerary> { 1062 dag OutOperandList = (outs RCWD:$wd); 1063 dag InOperandList = (ins RCWS:$ws, SplatImm.OpClass:$u); 1064 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u"); 1065 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, SplatImm:$u))]; 1066 InstrItinClass Itinerary = itin; 1067} 1068 1069class MSA_COPY_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1070 ValueType VecTy, RegisterClass RCD, RegisterClass RCWS, 1071 InstrItinClass itin = NoItinerary> { 1072 dag OutOperandList = (outs RCD:$rd); 1073 dag InOperandList = (ins RCWS:$ws, uimm4:$n); 1074 string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]"); 1075 list<dag> Pattern = [(set RCD:$rd, (OpNode (VecTy RCWS:$ws), immZExt4:$n))]; 1076 InstrItinClass Itinerary = itin; 1077} 1078 1079class MSA_I5_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1080 SplatComplexPattern SplatImm, RegisterClass RCWD, 1081 RegisterClass RCWS = RCWD, 1082 InstrItinClass itin = NoItinerary> { 1083 dag OutOperandList = (outs RCWD:$wd); 1084 dag InOperandList = (ins RCWS:$ws, SplatImm.OpClass:$imm); 1085 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $imm"); 1086 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, SplatImm:$imm))]; 1087 InstrItinClass Itinerary = itin; 1088} 1089 1090class MSA_I8_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1091 SplatComplexPattern SplatImm, RegisterClass RCWD, 1092 RegisterClass RCWS = RCWD, 1093 InstrItinClass itin = NoItinerary> { 1094 dag OutOperandList = (outs RCWD:$wd); 1095 dag InOperandList = (ins RCWS:$ws, SplatImm.OpClass:$u8); 1096 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1097 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, SplatImm:$u8))]; 1098 InstrItinClass Itinerary = itin; 1099} 1100 1101// This class is deprecated and will be removed in the next few patches 1102class MSA_I8_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1103 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1104 InstrItinClass itin = NoItinerary> { 1105 dag OutOperandList = (outs RCWD:$wd); 1106 dag InOperandList = (ins RCWS:$ws, uimm8:$u8); 1107 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1108 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt8:$u8))]; 1109 InstrItinClass Itinerary = itin; 1110} 1111 1112class MSA_I8_SHF_DESC_BASE<string instr_asm, RegisterClass RCWD, 1113 RegisterClass RCWS = RCWD, 1114 InstrItinClass itin = NoItinerary> { 1115 dag OutOperandList = (outs RCWD:$wd); 1116 dag InOperandList = (ins RCWS:$ws, uimm8:$u8); 1117 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1118 list<dag> Pattern = [(set RCWD:$wd, (MipsSHF immZExt8:$u8, RCWS:$ws))]; 1119 InstrItinClass Itinerary = itin; 1120} 1121 1122class MSA_I10_LDI_DESC_BASE<string instr_asm, RegisterClass RCWD, 1123 InstrItinClass itin = NoItinerary> { 1124 dag OutOperandList = (outs RCWD:$wd); 1125 dag InOperandList = (ins vsplat_simm10:$i10); 1126 string AsmString = !strconcat(instr_asm, "\t$wd, $i10"); 1127 // LDI is matched using custom matching code in MipsSEISelDAGToDAG.cpp 1128 list<dag> Pattern = []; 1129 bit hasSideEffects = 0; 1130 InstrItinClass Itinerary = itin; 1131} 1132 1133class MSA_2R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1134 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1135 InstrItinClass itin = NoItinerary> { 1136 dag OutOperandList = (outs RCWD:$wd); 1137 dag InOperandList = (ins RCWS:$ws); 1138 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 1139 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws))]; 1140 InstrItinClass Itinerary = itin; 1141} 1142 1143class MSA_2R_FILL_DESC_BASE<string instr_asm, ValueType VT, 1144 SDPatternOperator OpNode, RegisterClass RCWD, 1145 RegisterClass RCWS = RCWD, 1146 InstrItinClass itin = NoItinerary> { 1147 dag OutOperandList = (outs RCWD:$wd); 1148 dag InOperandList = (ins RCWS:$ws); 1149 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 1150 list<dag> Pattern = [(set RCWD:$wd, (VT (OpNode RCWS:$ws)))]; 1151 InstrItinClass Itinerary = itin; 1152} 1153 1154class MSA_2RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1155 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1156 InstrItinClass itin = NoItinerary> { 1157 dag OutOperandList = (outs ROWD:$wd); 1158 dag InOperandList = (ins ROWS:$ws); 1159 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 1160 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))]; 1161 InstrItinClass Itinerary = itin; 1162} 1163 1164class MSA_3R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1165 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1166 RegisterOperand ROWT = ROWD, 1167 InstrItinClass itin = NoItinerary> { 1168 dag OutOperandList = (outs ROWD:$wd); 1169 dag InOperandList = (ins ROWS:$ws, ROWT:$wt); 1170 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1171 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))]; 1172 InstrItinClass Itinerary = itin; 1173} 1174 1175class MSA_3R_VSHF_DESC_BASE<string instr_asm, RegisterOperand ROWD, 1176 RegisterOperand ROWS = ROWD, 1177 RegisterOperand ROWT = ROWD, 1178 InstrItinClass itin = NoItinerary> { 1179 dag OutOperandList = (outs ROWD:$wd); 1180 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt); 1181 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1182 list<dag> Pattern = [(set ROWD:$wd, (MipsVSHF ROWD:$wd_in, ROWS:$ws, 1183 ROWT:$wt))]; 1184 string Constraints = "$wd = $wd_in"; 1185 InstrItinClass Itinerary = itin; 1186} 1187 1188class MSA_3R_4R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1189 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1190 RegisterOperand ROWT = ROWD, 1191 InstrItinClass itin = NoItinerary> { 1192 dag OutOperandList = (outs ROWD:$wd); 1193 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt); 1194 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1195 list<dag> Pattern = [(set ROWD:$wd, 1196 (OpNode ROWD:$wd_in, ROWS:$ws, ROWT:$wt))]; 1197 InstrItinClass Itinerary = itin; 1198 string Constraints = "$wd = $wd_in"; 1199} 1200 1201class MSA_3RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1202 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1203 RegisterOperand ROWT = ROWD, 1204 InstrItinClass itin = NoItinerary> : 1205 MSA_3R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>; 1206 1207class MSA_3RF_4RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1208 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1209 RegisterOperand ROWT = ROWD, 1210 InstrItinClass itin = NoItinerary> : 1211 MSA_3R_4R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>; 1212 1213class MSA_CBRANCH_DESC_BASE<string instr_asm, RegisterClass RCWD> { 1214 dag OutOperandList = (outs); 1215 dag InOperandList = (ins RCWD:$wd, brtarget:$offset); 1216 string AsmString = !strconcat(instr_asm, "\t$wd, $offset"); 1217 list<dag> Pattern = []; 1218 InstrItinClass Itinerary = IIBranch; 1219 bit isBranch = 1; 1220 bit isTerminator = 1; 1221 bit hasDelaySlot = 1; 1222 list<Register> Defs = [AT]; 1223} 1224 1225class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1226 RegisterClass RCD, RegisterClass RCWS, 1227 InstrItinClass itin = NoItinerary> { 1228 dag OutOperandList = (outs RCD:$wd); 1229 dag InOperandList = (ins RCD:$wd_in, RCWS:$rs, uimm6:$n); 1230 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $rs"); 1231 list<dag> Pattern = [(set RCD:$wd, (OpNode RCD:$wd_in, 1232 RCWS:$rs, 1233 immZExt6:$n))]; 1234 InstrItinClass Itinerary = itin; 1235 string Constraints = "$wd = $wd_in"; 1236} 1237 1238class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1239 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1240 InstrItinClass itin = NoItinerary> { 1241 dag OutOperandList = (outs RCWD:$wd); 1242 dag InOperandList = (ins RCWD:$wd_in, uimm6:$n, RCWS:$ws); 1243 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[0]"); 1244 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWD:$wd_in, 1245 immZExt6:$n, 1246 RCWS:$ws))]; 1247 InstrItinClass Itinerary = itin; 1248 string Constraints = "$wd = $wd_in"; 1249} 1250 1251class MSA_VEC_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1252 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1253 RegisterClass RCWT = RCWD, 1254 InstrItinClass itin = NoItinerary> { 1255 dag OutOperandList = (outs RCWD:$wd); 1256 dag InOperandList = (ins RCWS:$ws, RCWT:$wt); 1257 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1258 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]; 1259 InstrItinClass Itinerary = itin; 1260} 1261 1262class MSA_ELM_SPLAT_DESC_BASE<string instr_asm, SplatComplexPattern SplatImm, 1263 RegisterClass RCWD, 1264 RegisterClass RCWS = RCWD, 1265 InstrItinClass itin = NoItinerary> { 1266 dag OutOperandList = (outs RCWD:$wd); 1267 dag InOperandList = (ins RCWS:$ws, SplatImm.OpClass:$u3); 1268 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$u3]"); 1269 list<dag> Pattern = [(set RCWD:$wd, (MipsVSHF SplatImm:$u3, RCWS:$ws, 1270 RCWS:$ws))]; 1271 InstrItinClass Itinerary = itin; 1272} 1273 1274class MSA_VEC_PSEUDO_BASE<SDPatternOperator OpNode, RegisterClass RCWD, 1275 RegisterClass RCWS = RCWD, 1276 RegisterClass RCWT = RCWD> : 1277 MipsPseudo<(outs RCWD:$wd), (ins RCWS:$ws, RCWT:$wt), 1278 [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]>; 1279 1280class ADD_A_B_DESC : MSA_3R_DESC_BASE<"add_a.b", int_mips_add_a_b, MSA128BOpnd>, 1281 IsCommutable; 1282class ADD_A_H_DESC : MSA_3R_DESC_BASE<"add_a.h", int_mips_add_a_h, MSA128HOpnd>, 1283 IsCommutable; 1284class ADD_A_W_DESC : MSA_3R_DESC_BASE<"add_a.w", int_mips_add_a_w, MSA128WOpnd>, 1285 IsCommutable; 1286class ADD_A_D_DESC : MSA_3R_DESC_BASE<"add_a.d", int_mips_add_a_d, MSA128DOpnd>, 1287 IsCommutable; 1288 1289class ADDS_A_B_DESC : MSA_3R_DESC_BASE<"adds_a.b", int_mips_adds_a_b, 1290 MSA128BOpnd>, IsCommutable; 1291class ADDS_A_H_DESC : MSA_3R_DESC_BASE<"adds_a.h", int_mips_adds_a_h, 1292 MSA128HOpnd>, IsCommutable; 1293class ADDS_A_W_DESC : MSA_3R_DESC_BASE<"adds_a.w", int_mips_adds_a_w, 1294 MSA128WOpnd>, IsCommutable; 1295class ADDS_A_D_DESC : MSA_3R_DESC_BASE<"adds_a.d", int_mips_adds_a_d, 1296 MSA128DOpnd>, IsCommutable; 1297 1298class ADDS_S_B_DESC : MSA_3R_DESC_BASE<"adds_s.b", int_mips_adds_s_b, 1299 MSA128BOpnd>, IsCommutable; 1300class ADDS_S_H_DESC : MSA_3R_DESC_BASE<"adds_s.h", int_mips_adds_s_h, 1301 MSA128HOpnd>, IsCommutable; 1302class ADDS_S_W_DESC : MSA_3R_DESC_BASE<"adds_s.w", int_mips_adds_s_w, 1303 MSA128WOpnd>, IsCommutable; 1304class ADDS_S_D_DESC : MSA_3R_DESC_BASE<"adds_s.d", int_mips_adds_s_d, 1305 MSA128DOpnd>, IsCommutable; 1306 1307class ADDS_U_B_DESC : MSA_3R_DESC_BASE<"adds_u.b", int_mips_adds_u_b, 1308 MSA128BOpnd>, IsCommutable; 1309class ADDS_U_H_DESC : MSA_3R_DESC_BASE<"adds_u.h", int_mips_adds_u_h, 1310 MSA128HOpnd>, IsCommutable; 1311class ADDS_U_W_DESC : MSA_3R_DESC_BASE<"adds_u.w", int_mips_adds_u_w, 1312 MSA128WOpnd>, IsCommutable; 1313class ADDS_U_D_DESC : MSA_3R_DESC_BASE<"adds_u.d", int_mips_adds_u_d, 1314 MSA128DOpnd>, IsCommutable; 1315 1316class ADDV_B_DESC : MSA_3R_DESC_BASE<"addv.b", add, MSA128BOpnd>, IsCommutable; 1317class ADDV_H_DESC : MSA_3R_DESC_BASE<"addv.h", add, MSA128HOpnd>, IsCommutable; 1318class ADDV_W_DESC : MSA_3R_DESC_BASE<"addv.w", add, MSA128WOpnd>, IsCommutable; 1319class ADDV_D_DESC : MSA_3R_DESC_BASE<"addv.d", add, MSA128DOpnd>, IsCommutable; 1320 1321class ADDVI_B_DESC : MSA_I5_DESC_BASE<"addvi.b", add, vsplati8_uimm5, MSA128B>; 1322class ADDVI_H_DESC : MSA_I5_DESC_BASE<"addvi.h", add, vsplati16_uimm5, MSA128H>; 1323class ADDVI_W_DESC : MSA_I5_DESC_BASE<"addvi.w", add, vsplati32_uimm5, MSA128W>; 1324class ADDVI_D_DESC : MSA_I5_DESC_BASE<"addvi.d", add, vsplati64_uimm5, MSA128D>; 1325 1326class AND_V_DESC : MSA_VEC_DESC_BASE<"and.v", and, MSA128B>; 1327class AND_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128H>; 1328class AND_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128W>; 1329class AND_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128D>; 1330 1331class ANDI_B_DESC : MSA_I8_DESC_BASE<"andi.b", and, vsplati8_uimm8, MSA128B>; 1332 1333class ASUB_S_B_DESC : MSA_3R_DESC_BASE<"asub_s.b", int_mips_asub_s_b, 1334 MSA128BOpnd>; 1335class ASUB_S_H_DESC : MSA_3R_DESC_BASE<"asub_s.h", int_mips_asub_s_h, 1336 MSA128HOpnd>; 1337class ASUB_S_W_DESC : MSA_3R_DESC_BASE<"asub_s.w", int_mips_asub_s_w, 1338 MSA128WOpnd>; 1339class ASUB_S_D_DESC : MSA_3R_DESC_BASE<"asub_s.d", int_mips_asub_s_d, 1340 MSA128DOpnd>; 1341 1342class ASUB_U_B_DESC : MSA_3R_DESC_BASE<"asub_u.b", int_mips_asub_u_b, 1343 MSA128BOpnd>; 1344class ASUB_U_H_DESC : MSA_3R_DESC_BASE<"asub_u.h", int_mips_asub_u_h, 1345 MSA128HOpnd>; 1346class ASUB_U_W_DESC : MSA_3R_DESC_BASE<"asub_u.w", int_mips_asub_u_w, 1347 MSA128WOpnd>; 1348class ASUB_U_D_DESC : MSA_3R_DESC_BASE<"asub_u.d", int_mips_asub_u_d, 1349 MSA128DOpnd>; 1350 1351class AVE_S_B_DESC : MSA_3R_DESC_BASE<"ave_s.b", int_mips_ave_s_b, MSA128BOpnd>, 1352 IsCommutable; 1353class AVE_S_H_DESC : MSA_3R_DESC_BASE<"ave_s.h", int_mips_ave_s_h, MSA128HOpnd>, 1354 IsCommutable; 1355class AVE_S_W_DESC : MSA_3R_DESC_BASE<"ave_s.w", int_mips_ave_s_w, MSA128WOpnd>, 1356 IsCommutable; 1357class AVE_S_D_DESC : MSA_3R_DESC_BASE<"ave_s.d", int_mips_ave_s_d, MSA128DOpnd>, 1358 IsCommutable; 1359 1360class AVE_U_B_DESC : MSA_3R_DESC_BASE<"ave_u.b", int_mips_ave_u_b, MSA128BOpnd>, 1361 IsCommutable; 1362class AVE_U_H_DESC : MSA_3R_DESC_BASE<"ave_u.h", int_mips_ave_u_h, MSA128HOpnd>, 1363 IsCommutable; 1364class AVE_U_W_DESC : MSA_3R_DESC_BASE<"ave_u.w", int_mips_ave_u_w, MSA128WOpnd>, 1365 IsCommutable; 1366class AVE_U_D_DESC : MSA_3R_DESC_BASE<"ave_u.d", int_mips_ave_u_d, MSA128DOpnd>, 1367 IsCommutable; 1368 1369class AVER_S_B_DESC : MSA_3R_DESC_BASE<"aver_s.b", int_mips_aver_s_b, 1370 MSA128BOpnd>, IsCommutable; 1371class AVER_S_H_DESC : MSA_3R_DESC_BASE<"aver_s.h", int_mips_aver_s_h, 1372 MSA128HOpnd>, IsCommutable; 1373class AVER_S_W_DESC : MSA_3R_DESC_BASE<"aver_s.w", int_mips_aver_s_w, 1374 MSA128WOpnd>, IsCommutable; 1375class AVER_S_D_DESC : MSA_3R_DESC_BASE<"aver_s.d", int_mips_aver_s_d, 1376 MSA128DOpnd>, IsCommutable; 1377 1378class AVER_U_B_DESC : MSA_3R_DESC_BASE<"aver_u.b", int_mips_aver_u_b, 1379 MSA128BOpnd>, IsCommutable; 1380class AVER_U_H_DESC : MSA_3R_DESC_BASE<"aver_u.h", int_mips_aver_u_h, 1381 MSA128HOpnd>, IsCommutable; 1382class AVER_U_W_DESC : MSA_3R_DESC_BASE<"aver_u.w", int_mips_aver_u_w, 1383 MSA128WOpnd>, IsCommutable; 1384class AVER_U_D_DESC : MSA_3R_DESC_BASE<"aver_u.d", int_mips_aver_u_d, 1385 MSA128DOpnd>, IsCommutable; 1386 1387class BCLR_B_DESC : MSA_3R_DESC_BASE<"bclr.b", int_mips_bclr_b, MSA128BOpnd>; 1388class BCLR_H_DESC : MSA_3R_DESC_BASE<"bclr.h", int_mips_bclr_h, MSA128HOpnd>; 1389class BCLR_W_DESC : MSA_3R_DESC_BASE<"bclr.w", int_mips_bclr_w, MSA128WOpnd>; 1390class BCLR_D_DESC : MSA_3R_DESC_BASE<"bclr.d", int_mips_bclr_d, MSA128DOpnd>; 1391 1392class BCLRI_B_DESC : MSA_BIT_B_DESC_BASE<"bclri.b", int_mips_bclri_b, MSA128B>; 1393class BCLRI_H_DESC : MSA_BIT_H_DESC_BASE<"bclri.h", int_mips_bclri_h, MSA128H>; 1394class BCLRI_W_DESC : MSA_BIT_W_DESC_BASE<"bclri.w", int_mips_bclri_w, MSA128W>; 1395class BCLRI_D_DESC : MSA_BIT_D_DESC_BASE<"bclri.d", int_mips_bclri_d, MSA128D>; 1396 1397class BINSL_B_DESC : MSA_3R_DESC_BASE<"binsl.b", int_mips_binsl_b, MSA128BOpnd>; 1398class BINSL_H_DESC : MSA_3R_DESC_BASE<"binsl.h", int_mips_binsl_h, MSA128HOpnd>; 1399class BINSL_W_DESC : MSA_3R_DESC_BASE<"binsl.w", int_mips_binsl_w, MSA128WOpnd>; 1400class BINSL_D_DESC : MSA_3R_DESC_BASE<"binsl.d", int_mips_binsl_d, MSA128DOpnd>; 1401 1402class BINSLI_B_DESC : MSA_BIT_B_DESC_BASE<"binsli.b", int_mips_binsli_b, 1403 MSA128B>; 1404class BINSLI_H_DESC : MSA_BIT_H_DESC_BASE<"binsli.h", int_mips_binsli_h, 1405 MSA128H>; 1406class BINSLI_W_DESC : MSA_BIT_W_DESC_BASE<"binsli.w", int_mips_binsli_w, 1407 MSA128W>; 1408class BINSLI_D_DESC : MSA_BIT_D_DESC_BASE<"binsli.d", int_mips_binsli_d, 1409 MSA128D>; 1410 1411class BINSR_B_DESC : MSA_3R_DESC_BASE<"binsr.b", int_mips_binsr_b, MSA128BOpnd>; 1412class BINSR_H_DESC : MSA_3R_DESC_BASE<"binsr.h", int_mips_binsr_h, MSA128HOpnd>; 1413class BINSR_W_DESC : MSA_3R_DESC_BASE<"binsr.w", int_mips_binsr_w, MSA128WOpnd>; 1414class BINSR_D_DESC : MSA_3R_DESC_BASE<"binsr.d", int_mips_binsr_d, MSA128DOpnd>; 1415 1416class BINSRI_B_DESC : MSA_BIT_B_DESC_BASE<"binsri.b", int_mips_binsri_b, 1417 MSA128B>; 1418class BINSRI_H_DESC : MSA_BIT_H_DESC_BASE<"binsri.h", int_mips_binsri_h, 1419 MSA128H>; 1420class BINSRI_W_DESC : MSA_BIT_W_DESC_BASE<"binsri.w", int_mips_binsri_w, 1421 MSA128W>; 1422class BINSRI_D_DESC : MSA_BIT_D_DESC_BASE<"binsri.d", int_mips_binsri_d, 1423 MSA128D>; 1424 1425class BMNZ_V_DESC : MSA_VEC_DESC_BASE<"bmnz.v", int_mips_bmnz_v, MSA128B>; 1426 1427class BMNZI_B_DESC : MSA_I8_X_DESC_BASE<"bmnzi.b", int_mips_bmnzi_b, MSA128B>; 1428 1429class BMZ_V_DESC : MSA_VEC_DESC_BASE<"bmz.v", int_mips_bmz_v, MSA128B>; 1430 1431class BMZI_B_DESC : MSA_I8_X_DESC_BASE<"bmzi.b", int_mips_bmzi_b, MSA128B>; 1432 1433class BNEG_B_DESC : MSA_3R_DESC_BASE<"bneg.b", int_mips_bneg_b, MSA128BOpnd>; 1434class BNEG_H_DESC : MSA_3R_DESC_BASE<"bneg.h", int_mips_bneg_h, MSA128HOpnd>; 1435class BNEG_W_DESC : MSA_3R_DESC_BASE<"bneg.w", int_mips_bneg_w, MSA128WOpnd>; 1436class BNEG_D_DESC : MSA_3R_DESC_BASE<"bneg.d", int_mips_bneg_d, MSA128DOpnd>; 1437 1438class BNEGI_B_DESC : MSA_BIT_B_DESC_BASE<"bnegi.b", int_mips_bnegi_b, MSA128B>; 1439class BNEGI_H_DESC : MSA_BIT_H_DESC_BASE<"bnegi.h", int_mips_bnegi_h, MSA128H>; 1440class BNEGI_W_DESC : MSA_BIT_W_DESC_BASE<"bnegi.w", int_mips_bnegi_w, MSA128W>; 1441class BNEGI_D_DESC : MSA_BIT_D_DESC_BASE<"bnegi.d", int_mips_bnegi_d, MSA128D>; 1442 1443class BNZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bnz.b", MSA128B>; 1444class BNZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bnz.h", MSA128H>; 1445class BNZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bnz.w", MSA128W>; 1446class BNZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bnz.d", MSA128D>; 1447 1448class BNZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bnz.v", MSA128B>; 1449 1450class BSEL_V_DESC { 1451 dag OutOperandList = (outs MSA128B:$wd); 1452 dag InOperandList = (ins MSA128B:$wd_in, MSA128B:$ws, MSA128B:$wt); 1453 string AsmString = "bsel.v\t$wd, $ws, $wt"; 1454 list<dag> Pattern = [(set MSA128B:$wd, (vselect MSA128B:$wd_in, MSA128B:$ws, 1455 MSA128B:$wt))]; 1456 InstrItinClass Itinerary = NoItinerary; 1457 string Constraints = "$wd = $wd_in"; 1458} 1459 1460class BSELI_B_DESC { 1461 dag OutOperandList = (outs MSA128B:$wd); 1462 dag InOperandList = (ins MSA128B:$wd_in, MSA128B:$ws, vsplat_uimm8:$u8); 1463 string AsmString = "bseli.b\t$wd, $ws, $u8"; 1464 list<dag> Pattern = [(set MSA128B:$wd, (vselect MSA128B:$wd_in, 1465 MSA128B:$ws, 1466 vsplati8_uimm8:$u8))]; 1467 InstrItinClass Itinerary = NoItinerary; 1468 string Constraints = "$wd = $wd_in"; 1469} 1470 1471class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", int_mips_bset_b, MSA128BOpnd>; 1472class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", int_mips_bset_h, MSA128HOpnd>; 1473class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", int_mips_bset_w, MSA128WOpnd>; 1474class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", int_mips_bset_d, MSA128DOpnd>; 1475 1476class BSETI_B_DESC : MSA_BIT_B_DESC_BASE<"bseti.b", int_mips_bseti_b, MSA128B>; 1477class BSETI_H_DESC : MSA_BIT_H_DESC_BASE<"bseti.h", int_mips_bseti_h, MSA128H>; 1478class BSETI_W_DESC : MSA_BIT_W_DESC_BASE<"bseti.w", int_mips_bseti_w, MSA128W>; 1479class BSETI_D_DESC : MSA_BIT_D_DESC_BASE<"bseti.d", int_mips_bseti_d, MSA128D>; 1480 1481class BZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bz.b", MSA128B>; 1482class BZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bz.h", MSA128H>; 1483class BZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bz.w", MSA128W>; 1484class BZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bz.d", MSA128D>; 1485 1486class BZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bz.v", MSA128B>; 1487 1488class CEQ_B_DESC : MSA_3R_DESC_BASE<"ceq.b", vseteq_v16i8, MSA128BOpnd>, 1489 IsCommutable; 1490class CEQ_H_DESC : MSA_3R_DESC_BASE<"ceq.h", vseteq_v8i16, MSA128HOpnd>, 1491 IsCommutable; 1492class CEQ_W_DESC : MSA_3R_DESC_BASE<"ceq.w", vseteq_v4i32, MSA128WOpnd>, 1493 IsCommutable; 1494class CEQ_D_DESC : MSA_3R_DESC_BASE<"ceq.d", vseteq_v2i64, MSA128DOpnd>, 1495 IsCommutable; 1496 1497class CEQI_B_DESC : MSA_I5_DESC_BASE<"ceqi.b", vseteq_v16i8, vsplati8_simm5, 1498 MSA128B>; 1499class CEQI_H_DESC : MSA_I5_DESC_BASE<"ceqi.h", vseteq_v8i16, vsplati16_simm5, 1500 MSA128H>; 1501class CEQI_W_DESC : MSA_I5_DESC_BASE<"ceqi.w", vseteq_v4i32, vsplati32_simm5, 1502 MSA128W>; 1503class CEQI_D_DESC : MSA_I5_DESC_BASE<"ceqi.d", vseteq_v2i64, vsplati64_simm5, 1504 MSA128D>; 1505 1506class CFCMSA_DESC { 1507 dag OutOperandList = (outs GPR32:$rd); 1508 dag InOperandList = (ins MSACtrl:$cs); 1509 string AsmString = "cfcmsa\t$rd, $cs"; 1510 InstrItinClass Itinerary = NoItinerary; 1511 bit hasSideEffects = 1; 1512} 1513 1514class CLE_S_B_DESC : MSA_3R_DESC_BASE<"cle_s.b", vsetle_v16i8, MSA128BOpnd>; 1515class CLE_S_H_DESC : MSA_3R_DESC_BASE<"cle_s.h", vsetle_v8i16, MSA128HOpnd>; 1516class CLE_S_W_DESC : MSA_3R_DESC_BASE<"cle_s.w", vsetle_v4i32, MSA128WOpnd>; 1517class CLE_S_D_DESC : MSA_3R_DESC_BASE<"cle_s.d", vsetle_v2i64, MSA128DOpnd>; 1518 1519class CLE_U_B_DESC : MSA_3R_DESC_BASE<"cle_u.b", vsetule_v16i8, MSA128BOpnd>; 1520class CLE_U_H_DESC : MSA_3R_DESC_BASE<"cle_u.h", vsetule_v8i16, MSA128HOpnd>; 1521class CLE_U_W_DESC : MSA_3R_DESC_BASE<"cle_u.w", vsetule_v4i32, MSA128WOpnd>; 1522class CLE_U_D_DESC : MSA_3R_DESC_BASE<"cle_u.d", vsetule_v2i64, MSA128DOpnd>; 1523 1524class CLEI_S_B_DESC : MSA_I5_DESC_BASE<"clei_s.b", vsetle_v16i8, 1525 vsplati8_simm5, MSA128B>; 1526class CLEI_S_H_DESC : MSA_I5_DESC_BASE<"clei_s.h", vsetle_v8i16, 1527 vsplati16_simm5, MSA128H>; 1528class CLEI_S_W_DESC : MSA_I5_DESC_BASE<"clei_s.w", vsetle_v4i32, 1529 vsplati32_simm5, MSA128W>; 1530class CLEI_S_D_DESC : MSA_I5_DESC_BASE<"clei_s.d", vsetle_v2i64, 1531 vsplati64_simm5, MSA128D>; 1532 1533class CLEI_U_B_DESC : MSA_I5_DESC_BASE<"clei_u.b", vsetule_v16i8, 1534 vsplati8_uimm5, MSA128B>; 1535class CLEI_U_H_DESC : MSA_I5_DESC_BASE<"clei_u.h", vsetule_v8i16, 1536 vsplati16_uimm5, MSA128H>; 1537class CLEI_U_W_DESC : MSA_I5_DESC_BASE<"clei_u.w", vsetule_v4i32, 1538 vsplati32_uimm5, MSA128W>; 1539class CLEI_U_D_DESC : MSA_I5_DESC_BASE<"clei_u.d", vsetule_v2i64, 1540 vsplati64_uimm5, MSA128D>; 1541 1542class CLT_S_B_DESC : MSA_3R_DESC_BASE<"clt_s.b", vsetlt_v16i8, MSA128BOpnd>; 1543class CLT_S_H_DESC : MSA_3R_DESC_BASE<"clt_s.h", vsetlt_v8i16, MSA128HOpnd>; 1544class CLT_S_W_DESC : MSA_3R_DESC_BASE<"clt_s.w", vsetlt_v4i32, MSA128WOpnd>; 1545class CLT_S_D_DESC : MSA_3R_DESC_BASE<"clt_s.d", vsetlt_v2i64, MSA128DOpnd>; 1546 1547class CLT_U_B_DESC : MSA_3R_DESC_BASE<"clt_u.b", vsetult_v16i8, MSA128BOpnd>; 1548class CLT_U_H_DESC : MSA_3R_DESC_BASE<"clt_u.h", vsetult_v8i16, MSA128HOpnd>; 1549class CLT_U_W_DESC : MSA_3R_DESC_BASE<"clt_u.w", vsetult_v4i32, MSA128WOpnd>; 1550class CLT_U_D_DESC : MSA_3R_DESC_BASE<"clt_u.d", vsetult_v2i64, MSA128DOpnd>; 1551 1552class CLTI_S_B_DESC : MSA_I5_DESC_BASE<"clti_s.b", vsetlt_v16i8, 1553 vsplati8_simm5, MSA128B>; 1554class CLTI_S_H_DESC : MSA_I5_DESC_BASE<"clti_s.h", vsetlt_v8i16, 1555 vsplati16_simm5, MSA128H>; 1556class CLTI_S_W_DESC : MSA_I5_DESC_BASE<"clti_s.w", vsetlt_v4i32, 1557 vsplati32_simm5, MSA128W>; 1558class CLTI_S_D_DESC : MSA_I5_DESC_BASE<"clti_s.d", vsetlt_v2i64, 1559 vsplati64_simm5, MSA128D>; 1560 1561class CLTI_U_B_DESC : MSA_I5_DESC_BASE<"clti_u.b", vsetult_v16i8, 1562 vsplati8_uimm5, MSA128B>; 1563class CLTI_U_H_DESC : MSA_I5_DESC_BASE<"clti_u.h", vsetult_v8i16, 1564 vsplati16_uimm5, MSA128H>; 1565class CLTI_U_W_DESC : MSA_I5_DESC_BASE<"clti_u.w", vsetult_v4i32, 1566 vsplati32_uimm5, MSA128W>; 1567class CLTI_U_D_DESC : MSA_I5_DESC_BASE<"clti_u.d", vsetult_v2i64, 1568 vsplati64_uimm5, MSA128D>; 1569 1570class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", vextract_sext_i8, v16i8, 1571 GPR32, MSA128B>; 1572class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", vextract_sext_i16, v8i16, 1573 GPR32, MSA128H>; 1574class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", vextract_sext_i32, v4i32, 1575 GPR32, MSA128W>; 1576 1577class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", vextract_zext_i8, v16i8, 1578 GPR32, MSA128B>; 1579class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", vextract_zext_i16, v8i16, 1580 GPR32, MSA128H>; 1581class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", vextract_zext_i32, v4i32, 1582 GPR32, MSA128W>; 1583 1584class CTCMSA_DESC { 1585 dag OutOperandList = (outs); 1586 dag InOperandList = (ins MSACtrl:$cd, GPR32:$rs); 1587 string AsmString = "ctcmsa\t$cd, $rs"; 1588 InstrItinClass Itinerary = NoItinerary; 1589 bit hasSideEffects = 1; 1590} 1591 1592class DIV_S_B_DESC : MSA_3R_DESC_BASE<"div_s.b", sdiv, MSA128BOpnd>; 1593class DIV_S_H_DESC : MSA_3R_DESC_BASE<"div_s.h", sdiv, MSA128HOpnd>; 1594class DIV_S_W_DESC : MSA_3R_DESC_BASE<"div_s.w", sdiv, MSA128WOpnd>; 1595class DIV_S_D_DESC : MSA_3R_DESC_BASE<"div_s.d", sdiv, MSA128DOpnd>; 1596 1597class DIV_U_B_DESC : MSA_3R_DESC_BASE<"div_u.b", udiv, MSA128BOpnd>; 1598class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", udiv, MSA128HOpnd>; 1599class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", udiv, MSA128WOpnd>; 1600class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", udiv, MSA128DOpnd>; 1601 1602class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h, 1603 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>, 1604 IsCommutable; 1605class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w, 1606 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>, 1607 IsCommutable; 1608class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d, 1609 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>, 1610 IsCommutable; 1611 1612class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h, 1613 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>, 1614 IsCommutable; 1615class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w, 1616 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>, 1617 IsCommutable; 1618class DOTP_U_D_DESC : MSA_3R_DESC_BASE<"dotp_u.d", int_mips_dotp_u_d, 1619 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>, 1620 IsCommutable; 1621 1622class DPADD_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.h", int_mips_dpadd_s_h, 1623 MSA128HOpnd, MSA128BOpnd, 1624 MSA128BOpnd>, IsCommutable; 1625class DPADD_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.w", int_mips_dpadd_s_w, 1626 MSA128WOpnd, MSA128HOpnd, 1627 MSA128HOpnd>, IsCommutable; 1628class DPADD_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.d", int_mips_dpadd_s_d, 1629 MSA128DOpnd, MSA128WOpnd, 1630 MSA128WOpnd>, IsCommutable; 1631 1632class DPADD_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.h", int_mips_dpadd_u_h, 1633 MSA128HOpnd, MSA128BOpnd, 1634 MSA128BOpnd>, IsCommutable; 1635class DPADD_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.w", int_mips_dpadd_u_w, 1636 MSA128WOpnd, MSA128HOpnd, 1637 MSA128HOpnd>, IsCommutable; 1638class DPADD_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.d", int_mips_dpadd_u_d, 1639 MSA128DOpnd, MSA128WOpnd, 1640 MSA128WOpnd>, IsCommutable; 1641 1642class DPSUB_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.h", int_mips_dpsub_s_h, 1643 MSA128HOpnd, MSA128BOpnd, 1644 MSA128BOpnd>; 1645class DPSUB_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.w", int_mips_dpsub_s_w, 1646 MSA128WOpnd, MSA128HOpnd, 1647 MSA128HOpnd>; 1648class DPSUB_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.d", int_mips_dpsub_s_d, 1649 MSA128DOpnd, MSA128WOpnd, 1650 MSA128WOpnd>; 1651 1652class DPSUB_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.h", int_mips_dpsub_u_h, 1653 MSA128HOpnd, MSA128BOpnd, 1654 MSA128BOpnd>; 1655class DPSUB_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.w", int_mips_dpsub_u_w, 1656 MSA128WOpnd, MSA128HOpnd, 1657 MSA128HOpnd>; 1658class DPSUB_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.d", int_mips_dpsub_u_d, 1659 MSA128DOpnd, MSA128WOpnd, 1660 MSA128WOpnd>; 1661 1662class FADD_W_DESC : MSA_3RF_DESC_BASE<"fadd.w", fadd, MSA128WOpnd>, 1663 IsCommutable; 1664class FADD_D_DESC : MSA_3RF_DESC_BASE<"fadd.d", fadd, MSA128DOpnd>, 1665 IsCommutable; 1666 1667class FCAF_W_DESC : MSA_3RF_DESC_BASE<"fcaf.w", int_mips_fcaf_w, MSA128WOpnd>, 1668 IsCommutable; 1669class FCAF_D_DESC : MSA_3RF_DESC_BASE<"fcaf.d", int_mips_fcaf_d, MSA128DOpnd>, 1670 IsCommutable; 1671 1672class FCEQ_W_DESC : MSA_3RF_DESC_BASE<"fceq.w", vfsetoeq_v4f32, MSA128WOpnd>, 1673 IsCommutable; 1674class FCEQ_D_DESC : MSA_3RF_DESC_BASE<"fceq.d", vfsetoeq_v2f64, MSA128DOpnd>, 1675 IsCommutable; 1676 1677class FCLASS_W_DESC : MSA_2RF_DESC_BASE<"fclass.w", int_mips_fclass_w, 1678 MSA128WOpnd>; 1679class FCLASS_D_DESC : MSA_2RF_DESC_BASE<"fclass.d", int_mips_fclass_d, 1680 MSA128DOpnd>; 1681 1682class FCLE_W_DESC : MSA_3RF_DESC_BASE<"fcle.w", vfsetole_v4f32, MSA128WOpnd>; 1683class FCLE_D_DESC : MSA_3RF_DESC_BASE<"fcle.d", vfsetole_v2f64, MSA128DOpnd>; 1684 1685class FCLT_W_DESC : MSA_3RF_DESC_BASE<"fclt.w", vfsetolt_v4f32, MSA128WOpnd>; 1686class FCLT_D_DESC : MSA_3RF_DESC_BASE<"fclt.d", vfsetolt_v2f64, MSA128DOpnd>; 1687 1688class FCNE_W_DESC : MSA_3RF_DESC_BASE<"fcne.w", vfsetone_v4f32, MSA128WOpnd>, 1689 IsCommutable; 1690class FCNE_D_DESC : MSA_3RF_DESC_BASE<"fcne.d", vfsetone_v2f64, MSA128DOpnd>, 1691 IsCommutable; 1692 1693class FCOR_W_DESC : MSA_3RF_DESC_BASE<"fcor.w", vfsetord_v4f32, MSA128WOpnd>, 1694 IsCommutable; 1695class FCOR_D_DESC : MSA_3RF_DESC_BASE<"fcor.d", vfsetord_v2f64, MSA128DOpnd>, 1696 IsCommutable; 1697 1698class FCUEQ_W_DESC : MSA_3RF_DESC_BASE<"fcueq.w", vfsetueq_v4f32, MSA128WOpnd>, 1699 IsCommutable; 1700class FCUEQ_D_DESC : MSA_3RF_DESC_BASE<"fcueq.d", vfsetueq_v2f64, MSA128DOpnd>, 1701 IsCommutable; 1702 1703class FCULE_W_DESC : MSA_3RF_DESC_BASE<"fcule.w", vfsetule_v4f32, MSA128WOpnd>, 1704 IsCommutable; 1705class FCULE_D_DESC : MSA_3RF_DESC_BASE<"fcule.d", vfsetule_v2f64, MSA128DOpnd>, 1706 IsCommutable; 1707 1708class FCULT_W_DESC : MSA_3RF_DESC_BASE<"fcult.w", vfsetult_v4f32, MSA128WOpnd>, 1709 IsCommutable; 1710class FCULT_D_DESC : MSA_3RF_DESC_BASE<"fcult.d", vfsetult_v2f64, MSA128DOpnd>, 1711 IsCommutable; 1712 1713class FCUN_W_DESC : MSA_3RF_DESC_BASE<"fcun.w", vfsetun_v4f32, MSA128WOpnd>, 1714 IsCommutable; 1715class FCUN_D_DESC : MSA_3RF_DESC_BASE<"fcun.d", vfsetun_v2f64, MSA128DOpnd>, 1716 IsCommutable; 1717 1718class FCUNE_W_DESC : MSA_3RF_DESC_BASE<"fcune.w", vfsetune_v4f32, MSA128WOpnd>, 1719 IsCommutable; 1720class FCUNE_D_DESC : MSA_3RF_DESC_BASE<"fcune.d", vfsetune_v2f64, MSA128DOpnd>, 1721 IsCommutable; 1722 1723class FDIV_W_DESC : MSA_3RF_DESC_BASE<"fdiv.w", fdiv, MSA128WOpnd>; 1724class FDIV_D_DESC : MSA_3RF_DESC_BASE<"fdiv.d", fdiv, MSA128DOpnd>; 1725 1726class FEXDO_H_DESC : MSA_3RF_DESC_BASE<"fexdo.h", int_mips_fexdo_h, 1727 MSA128HOpnd, MSA128WOpnd, MSA128WOpnd>; 1728class FEXDO_W_DESC : MSA_3RF_DESC_BASE<"fexdo.w", int_mips_fexdo_w, 1729 MSA128WOpnd, MSA128DOpnd, MSA128DOpnd>; 1730 1731class FEXP2_W_DESC : MSA_3RF_DESC_BASE<"fexp2.w", int_mips_fexp2_w, 1732 MSA128WOpnd>; 1733class FEXP2_D_DESC : MSA_3RF_DESC_BASE<"fexp2.d", int_mips_fexp2_d, 1734 MSA128DOpnd>; 1735 1736class FEXUPL_W_DESC : MSA_2RF_DESC_BASE<"fexupl.w", int_mips_fexupl_w, 1737 MSA128WOpnd, MSA128HOpnd>; 1738class FEXUPL_D_DESC : MSA_2RF_DESC_BASE<"fexupl.d", int_mips_fexupl_d, 1739 MSA128DOpnd, MSA128WOpnd>; 1740 1741class FEXUPR_W_DESC : MSA_2RF_DESC_BASE<"fexupr.w", int_mips_fexupr_w, 1742 MSA128WOpnd, MSA128HOpnd>; 1743class FEXUPR_D_DESC : MSA_2RF_DESC_BASE<"fexupr.d", int_mips_fexupr_d, 1744 MSA128DOpnd, MSA128WOpnd>; 1745 1746class FFINT_S_W_DESC : MSA_2RF_DESC_BASE<"ffint_s.w", int_mips_ffint_s_w, 1747 MSA128WOpnd>; 1748class FFINT_S_D_DESC : MSA_2RF_DESC_BASE<"ffint_s.d", int_mips_ffint_s_d, 1749 MSA128DOpnd>; 1750 1751class FFINT_U_W_DESC : MSA_2RF_DESC_BASE<"ffint_u.w", int_mips_ffint_u_w, 1752 MSA128WOpnd>; 1753class FFINT_U_D_DESC : MSA_2RF_DESC_BASE<"ffint_u.d", int_mips_ffint_u_d, 1754 MSA128DOpnd>; 1755 1756class FFQL_W_DESC : MSA_2RF_DESC_BASE<"ffql.w", int_mips_ffql_w, 1757 MSA128WOpnd, MSA128HOpnd>; 1758class FFQL_D_DESC : MSA_2RF_DESC_BASE<"ffql.d", int_mips_ffql_d, 1759 MSA128DOpnd, MSA128WOpnd>; 1760 1761class FFQR_W_DESC : MSA_2RF_DESC_BASE<"ffqr.w", int_mips_ffqr_w, 1762 MSA128WOpnd, MSA128HOpnd>; 1763class FFQR_D_DESC : MSA_2RF_DESC_BASE<"ffqr.d", int_mips_ffqr_d, 1764 MSA128DOpnd, MSA128WOpnd>; 1765 1766class FILL_B_DESC : MSA_2R_FILL_DESC_BASE<"fill.b", v16i8, vsplati8, MSA128B, 1767 GPR32>; 1768class FILL_H_DESC : MSA_2R_FILL_DESC_BASE<"fill.h", v8i16, vsplati16, MSA128H, 1769 GPR32>; 1770class FILL_W_DESC : MSA_2R_FILL_DESC_BASE<"fill.w", v4i32, vsplati32, MSA128W, 1771 GPR32>; 1772 1773class FLOG2_W_DESC : MSA_2RF_DESC_BASE<"flog2.w", flog2, MSA128WOpnd>; 1774class FLOG2_D_DESC : MSA_2RF_DESC_BASE<"flog2.d", flog2, MSA128DOpnd>; 1775 1776class FMADD_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.w", int_mips_fmadd_w, 1777 MSA128WOpnd>; 1778class FMADD_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.d", int_mips_fmadd_d, 1779 MSA128DOpnd>; 1780 1781class FMAX_W_DESC : MSA_3RF_DESC_BASE<"fmax.w", int_mips_fmax_w, MSA128WOpnd>; 1782class FMAX_D_DESC : MSA_3RF_DESC_BASE<"fmax.d", int_mips_fmax_d, MSA128DOpnd>; 1783 1784class FMAX_A_W_DESC : MSA_3RF_DESC_BASE<"fmax_a.w", int_mips_fmax_a_w, 1785 MSA128WOpnd>; 1786class FMAX_A_D_DESC : MSA_3RF_DESC_BASE<"fmax_a.d", int_mips_fmax_a_d, 1787 MSA128DOpnd>; 1788 1789class FMIN_W_DESC : MSA_3RF_DESC_BASE<"fmin.w", int_mips_fmin_w, MSA128WOpnd>; 1790class FMIN_D_DESC : MSA_3RF_DESC_BASE<"fmin.d", int_mips_fmin_d, MSA128DOpnd>; 1791 1792class FMIN_A_W_DESC : MSA_3RF_DESC_BASE<"fmin_a.w", int_mips_fmin_a_w, 1793 MSA128WOpnd>; 1794class FMIN_A_D_DESC : MSA_3RF_DESC_BASE<"fmin_a.d", int_mips_fmin_a_d, 1795 MSA128DOpnd>; 1796 1797class FMSUB_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.w", int_mips_fmsub_w, 1798 MSA128WOpnd>; 1799class FMSUB_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.d", int_mips_fmsub_d, 1800 MSA128DOpnd>; 1801 1802class FMUL_W_DESC : MSA_3RF_DESC_BASE<"fmul.w", fmul, MSA128WOpnd>; 1803class FMUL_D_DESC : MSA_3RF_DESC_BASE<"fmul.d", fmul, MSA128DOpnd>; 1804 1805class FRINT_W_DESC : MSA_2RF_DESC_BASE<"frint.w", frint, MSA128WOpnd>; 1806class FRINT_D_DESC : MSA_2RF_DESC_BASE<"frint.d", frint, MSA128DOpnd>; 1807 1808class FRCP_W_DESC : MSA_2RF_DESC_BASE<"frcp.w", int_mips_frcp_w, MSA128WOpnd>; 1809class FRCP_D_DESC : MSA_2RF_DESC_BASE<"frcp.d", int_mips_frcp_d, MSA128DOpnd>; 1810 1811class FRSQRT_W_DESC : MSA_2RF_DESC_BASE<"frsqrt.w", int_mips_frsqrt_w, 1812 MSA128WOpnd>; 1813class FRSQRT_D_DESC : MSA_2RF_DESC_BASE<"frsqrt.d", int_mips_frsqrt_d, 1814 MSA128DOpnd>; 1815 1816class FSAF_W_DESC : MSA_3RF_DESC_BASE<"fsaf.w", int_mips_fsaf_w, MSA128WOpnd>; 1817class FSAF_D_DESC : MSA_3RF_DESC_BASE<"fsaf.d", int_mips_fsaf_d, MSA128DOpnd>; 1818 1819class FSEQ_W_DESC : MSA_3RF_DESC_BASE<"fseq.w", int_mips_fseq_w, MSA128WOpnd>; 1820class FSEQ_D_DESC : MSA_3RF_DESC_BASE<"fseq.d", int_mips_fseq_d, MSA128DOpnd>; 1821 1822class FSLE_W_DESC : MSA_3RF_DESC_BASE<"fsle.w", int_mips_fsle_w, MSA128WOpnd>; 1823class FSLE_D_DESC : MSA_3RF_DESC_BASE<"fsle.d", int_mips_fsle_d, MSA128DOpnd>; 1824 1825class FSLT_W_DESC : MSA_3RF_DESC_BASE<"fslt.w", int_mips_fslt_w, MSA128WOpnd>; 1826class FSLT_D_DESC : MSA_3RF_DESC_BASE<"fslt.d", int_mips_fslt_d, MSA128DOpnd>; 1827 1828class FSNE_W_DESC : MSA_3RF_DESC_BASE<"fsne.w", int_mips_fsne_w, MSA128WOpnd>; 1829class FSNE_D_DESC : MSA_3RF_DESC_BASE<"fsne.d", int_mips_fsne_d, MSA128DOpnd>; 1830 1831class FSOR_W_DESC : MSA_3RF_DESC_BASE<"fsor.w", int_mips_fsor_w, MSA128WOpnd>; 1832class FSOR_D_DESC : MSA_3RF_DESC_BASE<"fsor.d", int_mips_fsor_d, MSA128DOpnd>; 1833 1834class FSQRT_W_DESC : MSA_2RF_DESC_BASE<"fsqrt.w", fsqrt, MSA128WOpnd>; 1835class FSQRT_D_DESC : MSA_2RF_DESC_BASE<"fsqrt.d", fsqrt, MSA128DOpnd>; 1836 1837class FSUB_W_DESC : MSA_3RF_DESC_BASE<"fsub.w", fsub, MSA128WOpnd>; 1838class FSUB_D_DESC : MSA_3RF_DESC_BASE<"fsub.d", fsub, MSA128DOpnd>; 1839 1840class FSUEQ_W_DESC : MSA_3RF_DESC_BASE<"fsueq.w", int_mips_fsueq_w, 1841 MSA128WOpnd>; 1842class FSUEQ_D_DESC : MSA_3RF_DESC_BASE<"fsueq.d", int_mips_fsueq_d, 1843 MSA128DOpnd>; 1844 1845class FSULE_W_DESC : MSA_3RF_DESC_BASE<"fsule.w", int_mips_fsule_w, 1846 MSA128WOpnd>; 1847class FSULE_D_DESC : MSA_3RF_DESC_BASE<"fsule.d", int_mips_fsule_d, 1848 MSA128DOpnd>; 1849 1850class FSULT_W_DESC : MSA_3RF_DESC_BASE<"fsult.w", int_mips_fsult_w, 1851 MSA128WOpnd>; 1852class FSULT_D_DESC : MSA_3RF_DESC_BASE<"fsult.d", int_mips_fsult_d, 1853 MSA128DOpnd>; 1854 1855class FSUN_W_DESC : MSA_3RF_DESC_BASE<"fsun.w", int_mips_fsun_w, 1856 MSA128WOpnd>; 1857class FSUN_D_DESC : MSA_3RF_DESC_BASE<"fsun.d", int_mips_fsun_d, 1858 MSA128DOpnd>; 1859 1860class FSUNE_W_DESC : MSA_3RF_DESC_BASE<"fsune.w", int_mips_fsune_w, 1861 MSA128WOpnd>; 1862class FSUNE_D_DESC : MSA_3RF_DESC_BASE<"fsune.d", int_mips_fsune_d, 1863 MSA128DOpnd>; 1864 1865class FTRUNC_S_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.w", int_mips_ftrunc_s_w, 1866 MSA128WOpnd>; 1867class FTRUNC_S_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.d", int_mips_ftrunc_s_d, 1868 MSA128DOpnd>; 1869 1870class FTRUNC_U_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.w", int_mips_ftrunc_u_w, 1871 MSA128WOpnd>; 1872class FTRUNC_U_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.d", int_mips_ftrunc_u_d, 1873 MSA128DOpnd>; 1874 1875class FTINT_S_W_DESC : MSA_2RF_DESC_BASE<"ftint_s.w", int_mips_ftint_s_w, 1876 MSA128WOpnd>; 1877class FTINT_S_D_DESC : MSA_2RF_DESC_BASE<"ftint_s.d", int_mips_ftint_s_d, 1878 MSA128DOpnd>; 1879 1880class FTINT_U_W_DESC : MSA_2RF_DESC_BASE<"ftint_u.w", int_mips_ftint_u_w, 1881 MSA128WOpnd>; 1882class FTINT_U_D_DESC : MSA_2RF_DESC_BASE<"ftint_u.d", int_mips_ftint_u_d, 1883 MSA128DOpnd>; 1884 1885class FTQ_H_DESC : MSA_3RF_DESC_BASE<"ftq.h", int_mips_ftq_h, 1886 MSA128HOpnd, MSA128WOpnd, MSA128WOpnd>; 1887class FTQ_W_DESC : MSA_3RF_DESC_BASE<"ftq.w", int_mips_ftq_w, 1888 MSA128WOpnd, MSA128DOpnd, MSA128DOpnd>; 1889 1890class HADD_S_H_DESC : MSA_3R_DESC_BASE<"hadd_s.h", int_mips_hadd_s_h, 1891 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1892class HADD_S_W_DESC : MSA_3R_DESC_BASE<"hadd_s.w", int_mips_hadd_s_w, 1893 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 1894class HADD_S_D_DESC : MSA_3R_DESC_BASE<"hadd_s.d", int_mips_hadd_s_d, 1895 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 1896 1897class HADD_U_H_DESC : MSA_3R_DESC_BASE<"hadd_u.h", int_mips_hadd_u_h, 1898 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1899class HADD_U_W_DESC : MSA_3R_DESC_BASE<"hadd_u.w", int_mips_hadd_u_w, 1900 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 1901class HADD_U_D_DESC : MSA_3R_DESC_BASE<"hadd_u.d", int_mips_hadd_u_d, 1902 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 1903 1904class HSUB_S_H_DESC : MSA_3R_DESC_BASE<"hsub_s.h", int_mips_hsub_s_h, 1905 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1906class HSUB_S_W_DESC : MSA_3R_DESC_BASE<"hsub_s.w", int_mips_hsub_s_w, 1907 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 1908class HSUB_S_D_DESC : MSA_3R_DESC_BASE<"hsub_s.d", int_mips_hsub_s_d, 1909 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 1910 1911class HSUB_U_H_DESC : MSA_3R_DESC_BASE<"hsub_u.h", int_mips_hsub_u_h, 1912 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1913class HSUB_U_W_DESC : MSA_3R_DESC_BASE<"hsub_u.w", int_mips_hsub_u_w, 1914 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 1915class HSUB_U_D_DESC : MSA_3R_DESC_BASE<"hsub_u.d", int_mips_hsub_u_d, 1916 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 1917 1918class ILVEV_B_DESC : MSA_3R_DESC_BASE<"ilvev.b", MipsILVEV, MSA128BOpnd>; 1919class ILVEV_H_DESC : MSA_3R_DESC_BASE<"ilvev.h", MipsILVEV, MSA128HOpnd>; 1920class ILVEV_W_DESC : MSA_3R_DESC_BASE<"ilvev.w", MipsILVEV, MSA128WOpnd>; 1921class ILVEV_D_DESC : MSA_3R_DESC_BASE<"ilvev.d", MipsILVEV, MSA128DOpnd>; 1922 1923class ILVL_B_DESC : MSA_3R_DESC_BASE<"ilvl.b", MipsILVL, MSA128BOpnd>; 1924class ILVL_H_DESC : MSA_3R_DESC_BASE<"ilvl.h", MipsILVL, MSA128HOpnd>; 1925class ILVL_W_DESC : MSA_3R_DESC_BASE<"ilvl.w", MipsILVL, MSA128WOpnd>; 1926class ILVL_D_DESC : MSA_3R_DESC_BASE<"ilvl.d", MipsILVL, MSA128DOpnd>; 1927 1928class ILVOD_B_DESC : MSA_3R_DESC_BASE<"ilvod.b", MipsILVOD, MSA128BOpnd>; 1929class ILVOD_H_DESC : MSA_3R_DESC_BASE<"ilvod.h", MipsILVOD, MSA128HOpnd>; 1930class ILVOD_W_DESC : MSA_3R_DESC_BASE<"ilvod.w", MipsILVOD, MSA128WOpnd>; 1931class ILVOD_D_DESC : MSA_3R_DESC_BASE<"ilvod.d", MipsILVOD, MSA128DOpnd>; 1932 1933class ILVR_B_DESC : MSA_3R_DESC_BASE<"ilvr.b", MipsILVR, MSA128BOpnd>; 1934class ILVR_H_DESC : MSA_3R_DESC_BASE<"ilvr.h", MipsILVR, MSA128HOpnd>; 1935class ILVR_W_DESC : MSA_3R_DESC_BASE<"ilvr.w", MipsILVR, MSA128WOpnd>; 1936class ILVR_D_DESC : MSA_3R_DESC_BASE<"ilvr.d", MipsILVR, MSA128DOpnd>; 1937 1938class INSERT_B_DESC : MSA_INSERT_DESC_BASE<"insert.b", vinsert_v16i8, MSA128B, 1939 GPR32>; 1940class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", vinsert_v8i16, MSA128H, 1941 GPR32>; 1942class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", vinsert_v4i32, MSA128W, 1943 GPR32>; 1944 1945class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b, MSA128B>; 1946class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h, MSA128H>; 1947class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w, MSA128W>; 1948class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d, MSA128D>; 1949 1950class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1951 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem, 1952 ComplexPattern Addr = addrRegImm, 1953 InstrItinClass itin = NoItinerary> { 1954 dag OutOperandList = (outs RCWD:$wd); 1955 dag InOperandList = (ins MemOpnd:$addr); 1956 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 1957 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))]; 1958 InstrItinClass Itinerary = itin; 1959} 1960 1961class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, MSA128B>; 1962class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, MSA128H>; 1963class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, MSA128W>; 1964class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, MSA128D>; 1965 1966class LDI_B_DESC : MSA_I10_LDI_DESC_BASE<"ldi.b", MSA128B>; 1967class LDI_H_DESC : MSA_I10_LDI_DESC_BASE<"ldi.h", MSA128H>; 1968class LDI_W_DESC : MSA_I10_LDI_DESC_BASE<"ldi.w", MSA128W>; 1969class LDI_D_DESC : MSA_I10_LDI_DESC_BASE<"ldi.d", MSA128D>; 1970 1971class LDX_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1972 ValueType TyNode, RegisterClass RCWD, 1973 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg, 1974 InstrItinClass itin = NoItinerary> { 1975 dag OutOperandList = (outs RCWD:$wd); 1976 dag InOperandList = (ins MemOpnd:$addr); 1977 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 1978 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))]; 1979 InstrItinClass Itinerary = itin; 1980} 1981 1982class LDX_B_DESC : LDX_DESC_BASE<"ldx.b", load, v16i8, MSA128B>; 1983class LDX_H_DESC : LDX_DESC_BASE<"ldx.h", load, v8i16, MSA128H>; 1984class LDX_W_DESC : LDX_DESC_BASE<"ldx.w", load, v4i32, MSA128W>; 1985class LDX_D_DESC : LDX_DESC_BASE<"ldx.d", load, v2i64, MSA128D>; 1986 1987class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h, 1988 MSA128HOpnd>; 1989class MADD_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.w", int_mips_madd_q_w, 1990 MSA128WOpnd>; 1991 1992class MADDR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.h", int_mips_maddr_q_h, 1993 MSA128HOpnd>; 1994class MADDR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.w", int_mips_maddr_q_w, 1995 MSA128WOpnd>; 1996 1997class MADDV_B_DESC : MSA_3R_4R_DESC_BASE<"maddv.b", int_mips_maddv_b, 1998 MSA128BOpnd>; 1999class MADDV_H_DESC : MSA_3R_4R_DESC_BASE<"maddv.h", int_mips_maddv_h, 2000 MSA128HOpnd>; 2001class MADDV_W_DESC : MSA_3R_4R_DESC_BASE<"maddv.w", int_mips_maddv_w, 2002 MSA128WOpnd>; 2003class MADDV_D_DESC : MSA_3R_4R_DESC_BASE<"maddv.d", int_mips_maddv_d, 2004 MSA128DOpnd>; 2005 2006class MAX_A_B_DESC : MSA_3R_DESC_BASE<"max_a.b", int_mips_max_a_b, MSA128BOpnd>; 2007class MAX_A_H_DESC : MSA_3R_DESC_BASE<"max_a.h", int_mips_max_a_h, MSA128HOpnd>; 2008class MAX_A_W_DESC : MSA_3R_DESC_BASE<"max_a.w", int_mips_max_a_w, MSA128WOpnd>; 2009class MAX_A_D_DESC : MSA_3R_DESC_BASE<"max_a.d", int_mips_max_a_d, MSA128DOpnd>; 2010 2011class MAX_S_B_DESC : MSA_3R_DESC_BASE<"max_s.b", MipsVSMax, MSA128BOpnd>; 2012class MAX_S_H_DESC : MSA_3R_DESC_BASE<"max_s.h", MipsVSMax, MSA128HOpnd>; 2013class MAX_S_W_DESC : MSA_3R_DESC_BASE<"max_s.w", MipsVSMax, MSA128WOpnd>; 2014class MAX_S_D_DESC : MSA_3R_DESC_BASE<"max_s.d", MipsVSMax, MSA128DOpnd>; 2015 2016class MAX_U_B_DESC : MSA_3R_DESC_BASE<"max_u.b", MipsVUMax, MSA128BOpnd>; 2017class MAX_U_H_DESC : MSA_3R_DESC_BASE<"max_u.h", MipsVUMax, MSA128HOpnd>; 2018class MAX_U_W_DESC : MSA_3R_DESC_BASE<"max_u.w", MipsVUMax, MSA128WOpnd>; 2019class MAX_U_D_DESC : MSA_3R_DESC_BASE<"max_u.d", MipsVUMax, MSA128DOpnd>; 2020 2021class MAXI_S_B_DESC : MSA_I5_DESC_BASE<"maxi_s.b", MipsVSMax, vsplati8_simm5, 2022 MSA128B>; 2023class MAXI_S_H_DESC : MSA_I5_DESC_BASE<"maxi_s.h", MipsVSMax, vsplati16_simm5, 2024 MSA128H>; 2025class MAXI_S_W_DESC : MSA_I5_DESC_BASE<"maxi_s.w", MipsVSMax, vsplati32_simm5, 2026 MSA128W>; 2027class MAXI_S_D_DESC : MSA_I5_DESC_BASE<"maxi_s.d", MipsVSMax, vsplati64_simm5, 2028 MSA128D>; 2029 2030class MAXI_U_B_DESC : MSA_I5_DESC_BASE<"maxi_u.b", MipsVUMax, vsplati8_uimm5, 2031 MSA128B>; 2032class MAXI_U_H_DESC : MSA_I5_DESC_BASE<"maxi_u.h", MipsVUMax, vsplati16_uimm5, 2033 MSA128H>; 2034class MAXI_U_W_DESC : MSA_I5_DESC_BASE<"maxi_u.w", MipsVUMax, vsplati32_uimm5, 2035 MSA128W>; 2036class MAXI_U_D_DESC : MSA_I5_DESC_BASE<"maxi_u.d", MipsVUMax, vsplati64_uimm5, 2037 MSA128D>; 2038 2039class MIN_A_B_DESC : MSA_3R_DESC_BASE<"min_a.b", int_mips_min_a_b, MSA128BOpnd>; 2040class MIN_A_H_DESC : MSA_3R_DESC_BASE<"min_a.h", int_mips_min_a_h, MSA128HOpnd>; 2041class MIN_A_W_DESC : MSA_3R_DESC_BASE<"min_a.w", int_mips_min_a_w, MSA128WOpnd>; 2042class MIN_A_D_DESC : MSA_3R_DESC_BASE<"min_a.d", int_mips_min_a_d, MSA128DOpnd>; 2043 2044class MIN_S_B_DESC : MSA_3R_DESC_BASE<"min_s.b", MipsVSMin, MSA128BOpnd>; 2045class MIN_S_H_DESC : MSA_3R_DESC_BASE<"min_s.h", MipsVSMin, MSA128HOpnd>; 2046class MIN_S_W_DESC : MSA_3R_DESC_BASE<"min_s.w", MipsVSMin, MSA128WOpnd>; 2047class MIN_S_D_DESC : MSA_3R_DESC_BASE<"min_s.d", MipsVSMin, MSA128DOpnd>; 2048 2049class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", MipsVUMin, MSA128BOpnd>; 2050class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", MipsVUMin, MSA128HOpnd>; 2051class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", MipsVUMin, MSA128WOpnd>; 2052class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", MipsVUMin, MSA128DOpnd>; 2053 2054class MINI_S_B_DESC : MSA_I5_DESC_BASE<"mini_s.b", MipsVSMin, vsplati8_simm5, 2055 MSA128B>; 2056class MINI_S_H_DESC : MSA_I5_DESC_BASE<"mini_s.h", MipsVSMin, vsplati16_simm5, 2057 MSA128H>; 2058class MINI_S_W_DESC : MSA_I5_DESC_BASE<"mini_s.w", MipsVSMin, vsplati32_simm5, 2059 MSA128W>; 2060class MINI_S_D_DESC : MSA_I5_DESC_BASE<"mini_s.d", MipsVSMin, vsplati64_simm5, 2061 MSA128D>; 2062 2063class MINI_U_B_DESC : MSA_I5_DESC_BASE<"mini_u.b", MipsVUMin, vsplati8_uimm5, 2064 MSA128B>; 2065class MINI_U_H_DESC : MSA_I5_DESC_BASE<"mini_u.h", MipsVUMin, vsplati16_uimm5, 2066 MSA128H>; 2067class MINI_U_W_DESC : MSA_I5_DESC_BASE<"mini_u.w", MipsVUMin, vsplati32_uimm5, 2068 MSA128W>; 2069class MINI_U_D_DESC : MSA_I5_DESC_BASE<"mini_u.d", MipsVUMin, vsplati64_uimm5, 2070 MSA128D>; 2071 2072class MOD_S_B_DESC : MSA_3R_DESC_BASE<"mod_s.b", int_mips_mod_s_b, MSA128BOpnd>; 2073class MOD_S_H_DESC : MSA_3R_DESC_BASE<"mod_s.h", int_mips_mod_s_h, MSA128HOpnd>; 2074class MOD_S_W_DESC : MSA_3R_DESC_BASE<"mod_s.w", int_mips_mod_s_w, MSA128WOpnd>; 2075class MOD_S_D_DESC : MSA_3R_DESC_BASE<"mod_s.d", int_mips_mod_s_d, MSA128DOpnd>; 2076 2077class MOD_U_B_DESC : MSA_3R_DESC_BASE<"mod_u.b", int_mips_mod_u_b, MSA128BOpnd>; 2078class MOD_U_H_DESC : MSA_3R_DESC_BASE<"mod_u.h", int_mips_mod_u_h, MSA128HOpnd>; 2079class MOD_U_W_DESC : MSA_3R_DESC_BASE<"mod_u.w", int_mips_mod_u_w, MSA128WOpnd>; 2080class MOD_U_D_DESC : MSA_3R_DESC_BASE<"mod_u.d", int_mips_mod_u_d, MSA128DOpnd>; 2081 2082class MOVE_V_DESC { 2083 dag OutOperandList = (outs MSA128B:$wd); 2084 dag InOperandList = (ins MSA128B:$ws); 2085 string AsmString = "move.v\t$wd, $ws"; 2086 list<dag> Pattern = []; 2087 InstrItinClass Itinerary = NoItinerary; 2088} 2089 2090class MSUB_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.h", int_mips_msub_q_h, 2091 MSA128HOpnd>; 2092class MSUB_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.w", int_mips_msub_q_w, 2093 MSA128WOpnd>; 2094 2095class MSUBR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.h", int_mips_msubr_q_h, 2096 MSA128HOpnd>; 2097class MSUBR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.w", int_mips_msubr_q_w, 2098 MSA128WOpnd>; 2099 2100class MSUBV_B_DESC : MSA_3R_4R_DESC_BASE<"msubv.b", int_mips_msubv_b, 2101 MSA128BOpnd>; 2102class MSUBV_H_DESC : MSA_3R_4R_DESC_BASE<"msubv.h", int_mips_msubv_h, 2103 MSA128HOpnd>; 2104class MSUBV_W_DESC : MSA_3R_4R_DESC_BASE<"msubv.w", int_mips_msubv_w, 2105 MSA128WOpnd>; 2106class MSUBV_D_DESC : MSA_3R_4R_DESC_BASE<"msubv.d", int_mips_msubv_d, 2107 MSA128DOpnd>; 2108 2109class MUL_Q_H_DESC : MSA_3RF_DESC_BASE<"mul_q.h", int_mips_mul_q_h, 2110 MSA128HOpnd>; 2111class MUL_Q_W_DESC : MSA_3RF_DESC_BASE<"mul_q.w", int_mips_mul_q_w, 2112 MSA128WOpnd>; 2113 2114class MULR_Q_H_DESC : MSA_3RF_DESC_BASE<"mulr_q.h", int_mips_mulr_q_h, 2115 MSA128HOpnd>; 2116class MULR_Q_W_DESC : MSA_3RF_DESC_BASE<"mulr_q.w", int_mips_mulr_q_w, 2117 MSA128WOpnd>; 2118 2119class MULV_B_DESC : MSA_3R_DESC_BASE<"mulv.b", mul, MSA128BOpnd>; 2120class MULV_H_DESC : MSA_3R_DESC_BASE<"mulv.h", mul, MSA128HOpnd>; 2121class MULV_W_DESC : MSA_3R_DESC_BASE<"mulv.w", mul, MSA128WOpnd>; 2122class MULV_D_DESC : MSA_3R_DESC_BASE<"mulv.d", mul, MSA128DOpnd>; 2123 2124class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b, MSA128B>; 2125class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h, MSA128H>; 2126class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w, MSA128W>; 2127class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d, MSA128D>; 2128 2129class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", ctlz, MSA128B>; 2130class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", ctlz, MSA128H>; 2131class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", ctlz, MSA128W>; 2132class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", ctlz, MSA128D>; 2133 2134class NOR_V_DESC : MSA_VEC_DESC_BASE<"nor.v", MipsVNOR, MSA128B>; 2135class NOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128H>; 2136class NOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128W>; 2137class NOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128D>; 2138 2139class NORI_B_DESC : MSA_I8_DESC_BASE<"nori.b", MipsVNOR, vsplati8_uimm8, 2140 MSA128B>; 2141 2142class OR_V_DESC : MSA_VEC_DESC_BASE<"or.v", or, MSA128B>; 2143class OR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128H>; 2144class OR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128W>; 2145class OR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128D>; 2146 2147class ORI_B_DESC : MSA_I8_DESC_BASE<"ori.b", or, vsplati8_uimm8, MSA128B>; 2148 2149class PCKEV_B_DESC : MSA_3R_DESC_BASE<"pckev.b", MipsPCKEV, MSA128BOpnd>; 2150class PCKEV_H_DESC : MSA_3R_DESC_BASE<"pckev.h", MipsPCKEV, MSA128HOpnd>; 2151class PCKEV_W_DESC : MSA_3R_DESC_BASE<"pckev.w", MipsPCKEV, MSA128WOpnd>; 2152class PCKEV_D_DESC : MSA_3R_DESC_BASE<"pckev.d", MipsPCKEV, MSA128DOpnd>; 2153 2154class PCKOD_B_DESC : MSA_3R_DESC_BASE<"pckod.b", MipsPCKOD, MSA128BOpnd>; 2155class PCKOD_H_DESC : MSA_3R_DESC_BASE<"pckod.h", MipsPCKOD, MSA128HOpnd>; 2156class PCKOD_W_DESC : MSA_3R_DESC_BASE<"pckod.w", MipsPCKOD, MSA128WOpnd>; 2157class PCKOD_D_DESC : MSA_3R_DESC_BASE<"pckod.d", MipsPCKOD, MSA128DOpnd>; 2158 2159class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", ctpop, MSA128B>; 2160class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", ctpop, MSA128H>; 2161class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", ctpop, MSA128W>; 2162class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", ctpop, MSA128D>; 2163 2164class SAT_S_B_DESC : MSA_BIT_B_DESC_BASE<"sat_s.b", int_mips_sat_s_b, MSA128B>; 2165class SAT_S_H_DESC : MSA_BIT_H_DESC_BASE<"sat_s.h", int_mips_sat_s_h, MSA128H>; 2166class SAT_S_W_DESC : MSA_BIT_W_DESC_BASE<"sat_s.w", int_mips_sat_s_w, MSA128W>; 2167class SAT_S_D_DESC : MSA_BIT_D_DESC_BASE<"sat_s.d", int_mips_sat_s_d, MSA128D>; 2168 2169class SAT_U_B_DESC : MSA_BIT_B_DESC_BASE<"sat_u.b", int_mips_sat_u_b, MSA128B>; 2170class SAT_U_H_DESC : MSA_BIT_H_DESC_BASE<"sat_u.h", int_mips_sat_u_h, MSA128H>; 2171class SAT_U_W_DESC : MSA_BIT_W_DESC_BASE<"sat_u.w", int_mips_sat_u_w, MSA128W>; 2172class SAT_U_D_DESC : MSA_BIT_D_DESC_BASE<"sat_u.d", int_mips_sat_u_d, MSA128D>; 2173 2174class SHF_B_DESC : MSA_I8_SHF_DESC_BASE<"shf.b", MSA128B>; 2175class SHF_H_DESC : MSA_I8_SHF_DESC_BASE<"shf.h", MSA128H>; 2176class SHF_W_DESC : MSA_I8_SHF_DESC_BASE<"shf.w", MSA128W>; 2177 2178class SLD_B_DESC : MSA_3R_DESC_BASE<"sld.b", int_mips_sld_b, MSA128BOpnd>; 2179class SLD_H_DESC : MSA_3R_DESC_BASE<"sld.h", int_mips_sld_h, MSA128HOpnd>; 2180class SLD_W_DESC : MSA_3R_DESC_BASE<"sld.w", int_mips_sld_w, MSA128WOpnd>; 2181class SLD_D_DESC : MSA_3R_DESC_BASE<"sld.d", int_mips_sld_d, MSA128DOpnd>; 2182 2183class SLDI_B_DESC : MSA_BIT_B_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128B>; 2184class SLDI_H_DESC : MSA_BIT_H_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128H>; 2185class SLDI_W_DESC : MSA_BIT_W_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128W>; 2186class SLDI_D_DESC : MSA_BIT_D_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128D>; 2187 2188class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", shl, MSA128BOpnd>; 2189class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", shl, MSA128HOpnd>; 2190class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", shl, MSA128WOpnd>; 2191class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", shl, MSA128DOpnd>; 2192 2193class SLLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.b", shl, vsplati8_uimm3, 2194 MSA128B>; 2195class SLLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.h", shl, vsplati16_uimm4, 2196 MSA128H>; 2197class SLLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.w", shl, vsplati32_uimm5, 2198 MSA128W>; 2199class SLLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.d", shl, vsplati64_uimm6, 2200 MSA128D>; 2201 2202class SPLAT_B_DESC : MSA_3R_DESC_BASE<"splat.b", int_mips_splat_b, MSA128BOpnd, 2203 MSA128BOpnd, GPR32Opnd>; 2204class SPLAT_H_DESC : MSA_3R_DESC_BASE<"splat.h", int_mips_splat_h, MSA128HOpnd, 2205 MSA128HOpnd, GPR32Opnd>; 2206class SPLAT_W_DESC : MSA_3R_DESC_BASE<"splat.w", int_mips_splat_w, MSA128WOpnd, 2207 MSA128WOpnd, GPR32Opnd>; 2208class SPLAT_D_DESC : MSA_3R_DESC_BASE<"splat.d", int_mips_splat_d, MSA128DOpnd, 2209 MSA128DOpnd, GPR32Opnd>; 2210 2211class SPLATI_B_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.b", vsplati8_uimm4, 2212 MSA128B>; 2213class SPLATI_H_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.h", vsplati16_uimm3, 2214 MSA128H>; 2215class SPLATI_W_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.w", vsplati32_uimm2, 2216 MSA128W>; 2217class SPLATI_D_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.d", vsplati64_uimm1, 2218 MSA128D>; 2219 2220class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", sra, MSA128BOpnd>; 2221class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", sra, MSA128HOpnd>; 2222class SRA_W_DESC : MSA_3R_DESC_BASE<"sra.w", sra, MSA128WOpnd>; 2223class SRA_D_DESC : MSA_3R_DESC_BASE<"sra.d", sra, MSA128DOpnd>; 2224 2225class SRAI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.b", sra, vsplati8_uimm3, 2226 MSA128B>; 2227class SRAI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.h", sra, vsplati16_uimm4, 2228 MSA128H>; 2229class SRAI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.w", sra, vsplati32_uimm5, 2230 MSA128W>; 2231class SRAI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.d", sra, vsplati64_uimm6, 2232 MSA128D>; 2233 2234class SRAR_B_DESC : MSA_3R_DESC_BASE<"srar.b", int_mips_srar_b, MSA128BOpnd>; 2235class SRAR_H_DESC : MSA_3R_DESC_BASE<"srar.h", int_mips_srar_h, MSA128HOpnd>; 2236class SRAR_W_DESC : MSA_3R_DESC_BASE<"srar.w", int_mips_srar_w, MSA128WOpnd>; 2237class SRAR_D_DESC : MSA_3R_DESC_BASE<"srar.d", int_mips_srar_d, MSA128DOpnd>; 2238 2239class SRARI_B_DESC : MSA_BIT_B_DESC_BASE<"srari.b", int_mips_srari_b, MSA128B>; 2240class SRARI_H_DESC : MSA_BIT_H_DESC_BASE<"srari.h", int_mips_srari_h, MSA128H>; 2241class SRARI_W_DESC : MSA_BIT_W_DESC_BASE<"srari.w", int_mips_srari_w, MSA128W>; 2242class SRARI_D_DESC : MSA_BIT_D_DESC_BASE<"srari.d", int_mips_srari_d, MSA128D>; 2243 2244class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", srl, MSA128BOpnd>; 2245class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", srl, MSA128HOpnd>; 2246class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", srl, MSA128WOpnd>; 2247class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", srl, MSA128DOpnd>; 2248 2249class SRLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.b", srl, vsplati8_uimm3, 2250 MSA128B>; 2251class SRLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.h", srl, vsplati16_uimm4, 2252 MSA128H>; 2253class SRLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.w", srl, vsplati32_uimm5, 2254 MSA128W>; 2255class SRLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.d", srl, vsplati64_uimm6, 2256 MSA128D>; 2257 2258class SRLR_B_DESC : MSA_3R_DESC_BASE<"srlr.b", int_mips_srlr_b, MSA128BOpnd>; 2259class SRLR_H_DESC : MSA_3R_DESC_BASE<"srlr.h", int_mips_srlr_h, MSA128HOpnd>; 2260class SRLR_W_DESC : MSA_3R_DESC_BASE<"srlr.w", int_mips_srlr_w, MSA128WOpnd>; 2261class SRLR_D_DESC : MSA_3R_DESC_BASE<"srlr.d", int_mips_srlr_d, MSA128DOpnd>; 2262 2263class SRLRI_B_DESC : MSA_BIT_B_DESC_BASE<"srlri.b", int_mips_srlri_b, MSA128B>; 2264class SRLRI_H_DESC : MSA_BIT_H_DESC_BASE<"srlri.h", int_mips_srlri_h, MSA128H>; 2265class SRLRI_W_DESC : MSA_BIT_W_DESC_BASE<"srlri.w", int_mips_srlri_w, MSA128W>; 2266class SRLRI_D_DESC : MSA_BIT_D_DESC_BASE<"srlri.d", int_mips_srlri_d, MSA128D>; 2267 2268class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2269 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem, 2270 ComplexPattern Addr = addrRegImm, 2271 InstrItinClass itin = NoItinerary> { 2272 dag OutOperandList = (outs); 2273 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr); 2274 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2275 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)]; 2276 InstrItinClass Itinerary = itin; 2277} 2278 2279class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, MSA128B>; 2280class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, MSA128H>; 2281class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, MSA128W>; 2282class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, MSA128D>; 2283 2284class STX_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2285 ValueType TyNode, RegisterClass RCWD, 2286 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg, 2287 InstrItinClass itin = NoItinerary> { 2288 dag OutOperandList = (outs); 2289 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr); 2290 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2291 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)]; 2292 InstrItinClass Itinerary = itin; 2293} 2294 2295class STX_B_DESC : STX_DESC_BASE<"stx.b", store, v16i8, MSA128B>; 2296class STX_H_DESC : STX_DESC_BASE<"stx.h", store, v8i16, MSA128H>; 2297class STX_W_DESC : STX_DESC_BASE<"stx.w", store, v4i32, MSA128W>; 2298class STX_D_DESC : STX_DESC_BASE<"stx.d", store, v2i64, MSA128D>; 2299 2300class SUBS_S_B_DESC : MSA_3R_DESC_BASE<"subs_s.b", int_mips_subs_s_b, 2301 MSA128BOpnd>; 2302class SUBS_S_H_DESC : MSA_3R_DESC_BASE<"subs_s.h", int_mips_subs_s_h, 2303 MSA128HOpnd>; 2304class SUBS_S_W_DESC : MSA_3R_DESC_BASE<"subs_s.w", int_mips_subs_s_w, 2305 MSA128WOpnd>; 2306class SUBS_S_D_DESC : MSA_3R_DESC_BASE<"subs_s.d", int_mips_subs_s_d, 2307 MSA128DOpnd>; 2308 2309class SUBS_U_B_DESC : MSA_3R_DESC_BASE<"subs_u.b", int_mips_subs_u_b, 2310 MSA128BOpnd>; 2311class SUBS_U_H_DESC : MSA_3R_DESC_BASE<"subs_u.h", int_mips_subs_u_h, 2312 MSA128HOpnd>; 2313class SUBS_U_W_DESC : MSA_3R_DESC_BASE<"subs_u.w", int_mips_subs_u_w, 2314 MSA128WOpnd>; 2315class SUBS_U_D_DESC : MSA_3R_DESC_BASE<"subs_u.d", int_mips_subs_u_d, 2316 MSA128DOpnd>; 2317 2318class SUBSUS_U_B_DESC : MSA_3R_DESC_BASE<"subsus_u.b", int_mips_subsus_u_b, 2319 MSA128BOpnd>; 2320class SUBSUS_U_H_DESC : MSA_3R_DESC_BASE<"subsus_u.h", int_mips_subsus_u_h, 2321 MSA128HOpnd>; 2322class SUBSUS_U_W_DESC : MSA_3R_DESC_BASE<"subsus_u.w", int_mips_subsus_u_w, 2323 MSA128WOpnd>; 2324class SUBSUS_U_D_DESC : MSA_3R_DESC_BASE<"subsus_u.d", int_mips_subsus_u_d, 2325 MSA128DOpnd>; 2326 2327class SUBSUU_S_B_DESC : MSA_3R_DESC_BASE<"subsuu_s.b", int_mips_subsuu_s_b, 2328 MSA128BOpnd>; 2329class SUBSUU_S_H_DESC : MSA_3R_DESC_BASE<"subsuu_s.h", int_mips_subsuu_s_h, 2330 MSA128HOpnd>; 2331class SUBSUU_S_W_DESC : MSA_3R_DESC_BASE<"subsuu_s.w", int_mips_subsuu_s_w, 2332 MSA128WOpnd>; 2333class SUBSUU_S_D_DESC : MSA_3R_DESC_BASE<"subsuu_s.d", int_mips_subsuu_s_d, 2334 MSA128DOpnd>; 2335 2336class SUBV_B_DESC : MSA_3R_DESC_BASE<"subv.b", sub, MSA128BOpnd>; 2337class SUBV_H_DESC : MSA_3R_DESC_BASE<"subv.h", sub, MSA128HOpnd>; 2338class SUBV_W_DESC : MSA_3R_DESC_BASE<"subv.w", sub, MSA128WOpnd>; 2339class SUBV_D_DESC : MSA_3R_DESC_BASE<"subv.d", sub, MSA128DOpnd>; 2340 2341class SUBVI_B_DESC : MSA_I5_DESC_BASE<"subvi.b", sub, vsplati8_uimm5, MSA128B>; 2342class SUBVI_H_DESC : MSA_I5_DESC_BASE<"subvi.h", sub, vsplati16_uimm5, MSA128H>; 2343class SUBVI_W_DESC : MSA_I5_DESC_BASE<"subvi.w", sub, vsplati32_uimm5, MSA128W>; 2344class SUBVI_D_DESC : MSA_I5_DESC_BASE<"subvi.d", sub, vsplati64_uimm5, MSA128D>; 2345 2346class VSHF_B_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.b", MSA128BOpnd>; 2347class VSHF_H_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.h", MSA128HOpnd>; 2348class VSHF_W_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.w", MSA128WOpnd>; 2349class VSHF_D_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.d", MSA128DOpnd>; 2350 2351class XOR_V_DESC : MSA_VEC_DESC_BASE<"xor.v", xor, MSA128B>; 2352class XOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128H>; 2353class XOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128W>; 2354class XOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128D>; 2355 2356class XORI_B_DESC : MSA_I8_DESC_BASE<"xori.b", xor, vsplati8_uimm8, MSA128B>; 2357 2358// Instruction defs. 2359def ADD_A_B : ADD_A_B_ENC, ADD_A_B_DESC; 2360def ADD_A_H : ADD_A_H_ENC, ADD_A_H_DESC; 2361def ADD_A_W : ADD_A_W_ENC, ADD_A_W_DESC; 2362def ADD_A_D : ADD_A_D_ENC, ADD_A_D_DESC; 2363 2364def ADDS_A_B : ADDS_A_B_ENC, ADDS_A_B_DESC; 2365def ADDS_A_H : ADDS_A_H_ENC, ADDS_A_H_DESC; 2366def ADDS_A_W : ADDS_A_W_ENC, ADDS_A_W_DESC; 2367def ADDS_A_D : ADDS_A_D_ENC, ADDS_A_D_DESC; 2368 2369def ADDS_S_B : ADDS_S_B_ENC, ADDS_S_B_DESC; 2370def ADDS_S_H : ADDS_S_H_ENC, ADDS_S_H_DESC; 2371def ADDS_S_W : ADDS_S_W_ENC, ADDS_S_W_DESC; 2372def ADDS_S_D : ADDS_S_D_ENC, ADDS_S_D_DESC; 2373 2374def ADDS_U_B : ADDS_U_B_ENC, ADDS_U_B_DESC; 2375def ADDS_U_H : ADDS_U_H_ENC, ADDS_U_H_DESC; 2376def ADDS_U_W : ADDS_U_W_ENC, ADDS_U_W_DESC; 2377def ADDS_U_D : ADDS_U_D_ENC, ADDS_U_D_DESC; 2378 2379def ADDV_B : ADDV_B_ENC, ADDV_B_DESC; 2380def ADDV_H : ADDV_H_ENC, ADDV_H_DESC; 2381def ADDV_W : ADDV_W_ENC, ADDV_W_DESC; 2382def ADDV_D : ADDV_D_ENC, ADDV_D_DESC; 2383 2384def ADDVI_B : ADDVI_B_ENC, ADDVI_B_DESC; 2385def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC; 2386def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC; 2387def ADDVI_D : ADDVI_D_ENC, ADDVI_D_DESC; 2388 2389def AND_V : AND_V_ENC, AND_V_DESC; 2390def AND_V_H_PSEUDO : AND_V_H_PSEUDO_DESC, 2391 PseudoInstExpansion<(AND_V MSA128B:$wd, 2392 MSA128B:$ws, MSA128B:$wt)>; 2393def AND_V_W_PSEUDO : AND_V_W_PSEUDO_DESC, 2394 PseudoInstExpansion<(AND_V MSA128B:$wd, 2395 MSA128B:$ws, MSA128B:$wt)>; 2396def AND_V_D_PSEUDO : AND_V_D_PSEUDO_DESC, 2397 PseudoInstExpansion<(AND_V MSA128B:$wd, 2398 MSA128B:$ws, MSA128B:$wt)>; 2399 2400def ANDI_B : ANDI_B_ENC, ANDI_B_DESC; 2401 2402def ASUB_S_B : ASUB_S_B_ENC, ASUB_S_B_DESC; 2403def ASUB_S_H : ASUB_S_H_ENC, ASUB_S_H_DESC; 2404def ASUB_S_W : ASUB_S_W_ENC, ASUB_S_W_DESC; 2405def ASUB_S_D : ASUB_S_D_ENC, ASUB_S_D_DESC; 2406 2407def ASUB_U_B : ASUB_U_B_ENC, ASUB_U_B_DESC; 2408def ASUB_U_H : ASUB_U_H_ENC, ASUB_U_H_DESC; 2409def ASUB_U_W : ASUB_U_W_ENC, ASUB_U_W_DESC; 2410def ASUB_U_D : ASUB_U_D_ENC, ASUB_U_D_DESC; 2411 2412def AVE_S_B : AVE_S_B_ENC, AVE_S_B_DESC; 2413def AVE_S_H : AVE_S_H_ENC, AVE_S_H_DESC; 2414def AVE_S_W : AVE_S_W_ENC, AVE_S_W_DESC; 2415def AVE_S_D : AVE_S_D_ENC, AVE_S_D_DESC; 2416 2417def AVE_U_B : AVE_U_B_ENC, AVE_U_B_DESC; 2418def AVE_U_H : AVE_U_H_ENC, AVE_U_H_DESC; 2419def AVE_U_W : AVE_U_W_ENC, AVE_U_W_DESC; 2420def AVE_U_D : AVE_U_D_ENC, AVE_U_D_DESC; 2421 2422def AVER_S_B : AVER_S_B_ENC, AVER_S_B_DESC; 2423def AVER_S_H : AVER_S_H_ENC, AVER_S_H_DESC; 2424def AVER_S_W : AVER_S_W_ENC, AVER_S_W_DESC; 2425def AVER_S_D : AVER_S_D_ENC, AVER_S_D_DESC; 2426 2427def AVER_U_B : AVER_U_B_ENC, AVER_U_B_DESC; 2428def AVER_U_H : AVER_U_H_ENC, AVER_U_H_DESC; 2429def AVER_U_W : AVER_U_W_ENC, AVER_U_W_DESC; 2430def AVER_U_D : AVER_U_D_ENC, AVER_U_D_DESC; 2431 2432def BCLR_B : BCLR_B_ENC, BCLR_B_DESC; 2433def BCLR_H : BCLR_H_ENC, BCLR_H_DESC; 2434def BCLR_W : BCLR_W_ENC, BCLR_W_DESC; 2435def BCLR_D : BCLR_D_ENC, BCLR_D_DESC; 2436 2437def BCLRI_B : BCLRI_B_ENC, BCLRI_B_DESC; 2438def BCLRI_H : BCLRI_H_ENC, BCLRI_H_DESC; 2439def BCLRI_W : BCLRI_W_ENC, BCLRI_W_DESC; 2440def BCLRI_D : BCLRI_D_ENC, BCLRI_D_DESC; 2441 2442def BINSL_B : BINSL_B_ENC, BINSL_B_DESC; 2443def BINSL_H : BINSL_H_ENC, BINSL_H_DESC; 2444def BINSL_W : BINSL_W_ENC, BINSL_W_DESC; 2445def BINSL_D : BINSL_D_ENC, BINSL_D_DESC; 2446 2447def BINSLI_B : BINSLI_B_ENC, BINSLI_B_DESC; 2448def BINSLI_H : BINSLI_H_ENC, BINSLI_H_DESC; 2449def BINSLI_W : BINSLI_W_ENC, BINSLI_W_DESC; 2450def BINSLI_D : BINSLI_D_ENC, BINSLI_D_DESC; 2451 2452def BINSR_B : BINSR_B_ENC, BINSR_B_DESC; 2453def BINSR_H : BINSR_H_ENC, BINSR_H_DESC; 2454def BINSR_W : BINSR_W_ENC, BINSR_W_DESC; 2455def BINSR_D : BINSR_D_ENC, BINSR_D_DESC; 2456 2457def BINSRI_B : BINSRI_B_ENC, BINSRI_B_DESC; 2458def BINSRI_H : BINSRI_H_ENC, BINSRI_H_DESC; 2459def BINSRI_W : BINSRI_W_ENC, BINSRI_W_DESC; 2460def BINSRI_D : BINSRI_D_ENC, BINSRI_D_DESC; 2461 2462def BMNZ_V : BMNZ_V_ENC, BMNZ_V_DESC; 2463 2464def BMNZI_B : BMNZI_B_ENC, BMNZI_B_DESC; 2465 2466def BMZ_V : BMZ_V_ENC, BMZ_V_DESC; 2467 2468def BMZI_B : BMZI_B_ENC, BMZI_B_DESC; 2469 2470def BNEG_B : BNEG_B_ENC, BNEG_B_DESC; 2471def BNEG_H : BNEG_H_ENC, BNEG_H_DESC; 2472def BNEG_W : BNEG_W_ENC, BNEG_W_DESC; 2473def BNEG_D : BNEG_D_ENC, BNEG_D_DESC; 2474 2475def BNEGI_B : BNEGI_B_ENC, BNEGI_B_DESC; 2476def BNEGI_H : BNEGI_H_ENC, BNEGI_H_DESC; 2477def BNEGI_W : BNEGI_W_ENC, BNEGI_W_DESC; 2478def BNEGI_D : BNEGI_D_ENC, BNEGI_D_DESC; 2479 2480def BNZ_B : BNZ_B_ENC, BNZ_B_DESC; 2481def BNZ_H : BNZ_H_ENC, BNZ_H_DESC; 2482def BNZ_W : BNZ_W_ENC, BNZ_W_DESC; 2483def BNZ_D : BNZ_D_ENC, BNZ_D_DESC; 2484 2485def BNZ_V : BNZ_V_ENC, BNZ_V_DESC; 2486 2487def BSEL_V : BSEL_V_ENC, BSEL_V_DESC; 2488 2489class MSA_BSEL_PSEUDO_BASE<RegisterClass RC, ValueType Ty> : 2490 MipsPseudo<(outs RC:$wd), (ins RC:$wd_in, RC:$ws, RC:$wt), 2491 [(set RC:$wd, (Ty (vselect RC:$wd_in, RC:$ws, RC:$wt)))]>, 2492 PseudoInstExpansion<(BSEL_V MSA128B:$wd, MSA128B:$wd_in, MSA128B:$ws, 2493 MSA128B:$wt)> { 2494 let Constraints = "$wd_in = $wd"; 2495} 2496 2497def BSEL_H_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128H, v8i16>; 2498def BSEL_W_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128W, v4i32>; 2499def BSEL_D_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128D, v2i64>; 2500def BSEL_FW_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128W, v4f32>; 2501def BSEL_FD_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128D, v2f64>; 2502 2503def BSELI_B : BSELI_B_ENC, BSELI_B_DESC; 2504 2505def BSET_B : BSET_B_ENC, BSET_B_DESC; 2506def BSET_H : BSET_H_ENC, BSET_H_DESC; 2507def BSET_W : BSET_W_ENC, BSET_W_DESC; 2508def BSET_D : BSET_D_ENC, BSET_D_DESC; 2509 2510def BSETI_B : BSETI_B_ENC, BSETI_B_DESC; 2511def BSETI_H : BSETI_H_ENC, BSETI_H_DESC; 2512def BSETI_W : BSETI_W_ENC, BSETI_W_DESC; 2513def BSETI_D : BSETI_D_ENC, BSETI_D_DESC; 2514 2515def BZ_B : BZ_B_ENC, BZ_B_DESC; 2516def BZ_H : BZ_H_ENC, BZ_H_DESC; 2517def BZ_W : BZ_W_ENC, BZ_W_DESC; 2518def BZ_D : BZ_D_ENC, BZ_D_DESC; 2519 2520def BZ_V : BZ_V_ENC, BZ_V_DESC; 2521 2522def CEQ_B : CEQ_B_ENC, CEQ_B_DESC; 2523def CEQ_H : CEQ_H_ENC, CEQ_H_DESC; 2524def CEQ_W : CEQ_W_ENC, CEQ_W_DESC; 2525def CEQ_D : CEQ_D_ENC, CEQ_D_DESC; 2526 2527def CEQI_B : CEQI_B_ENC, CEQI_B_DESC; 2528def CEQI_H : CEQI_H_ENC, CEQI_H_DESC; 2529def CEQI_W : CEQI_W_ENC, CEQI_W_DESC; 2530def CEQI_D : CEQI_D_ENC, CEQI_D_DESC; 2531 2532def CFCMSA : CFCMSA_ENC, CFCMSA_DESC; 2533 2534def CLE_S_B : CLE_S_B_ENC, CLE_S_B_DESC; 2535def CLE_S_H : CLE_S_H_ENC, CLE_S_H_DESC; 2536def CLE_S_W : CLE_S_W_ENC, CLE_S_W_DESC; 2537def CLE_S_D : CLE_S_D_ENC, CLE_S_D_DESC; 2538 2539def CLE_U_B : CLE_U_B_ENC, CLE_U_B_DESC; 2540def CLE_U_H : CLE_U_H_ENC, CLE_U_H_DESC; 2541def CLE_U_W : CLE_U_W_ENC, CLE_U_W_DESC; 2542def CLE_U_D : CLE_U_D_ENC, CLE_U_D_DESC; 2543 2544def CLEI_S_B : CLEI_S_B_ENC, CLEI_S_B_DESC; 2545def CLEI_S_H : CLEI_S_H_ENC, CLEI_S_H_DESC; 2546def CLEI_S_W : CLEI_S_W_ENC, CLEI_S_W_DESC; 2547def CLEI_S_D : CLEI_S_D_ENC, CLEI_S_D_DESC; 2548 2549def CLEI_U_B : CLEI_U_B_ENC, CLEI_U_B_DESC; 2550def CLEI_U_H : CLEI_U_H_ENC, CLEI_U_H_DESC; 2551def CLEI_U_W : CLEI_U_W_ENC, CLEI_U_W_DESC; 2552def CLEI_U_D : CLEI_U_D_ENC, CLEI_U_D_DESC; 2553 2554def CLT_S_B : CLT_S_B_ENC, CLT_S_B_DESC; 2555def CLT_S_H : CLT_S_H_ENC, CLT_S_H_DESC; 2556def CLT_S_W : CLT_S_W_ENC, CLT_S_W_DESC; 2557def CLT_S_D : CLT_S_D_ENC, CLT_S_D_DESC; 2558 2559def CLT_U_B : CLT_U_B_ENC, CLT_U_B_DESC; 2560def CLT_U_H : CLT_U_H_ENC, CLT_U_H_DESC; 2561def CLT_U_W : CLT_U_W_ENC, CLT_U_W_DESC; 2562def CLT_U_D : CLT_U_D_ENC, CLT_U_D_DESC; 2563 2564def CLTI_S_B : CLTI_S_B_ENC, CLTI_S_B_DESC; 2565def CLTI_S_H : CLTI_S_H_ENC, CLTI_S_H_DESC; 2566def CLTI_S_W : CLTI_S_W_ENC, CLTI_S_W_DESC; 2567def CLTI_S_D : CLTI_S_D_ENC, CLTI_S_D_DESC; 2568 2569def CLTI_U_B : CLTI_U_B_ENC, CLTI_U_B_DESC; 2570def CLTI_U_H : CLTI_U_H_ENC, CLTI_U_H_DESC; 2571def CLTI_U_W : CLTI_U_W_ENC, CLTI_U_W_DESC; 2572def CLTI_U_D : CLTI_U_D_ENC, CLTI_U_D_DESC; 2573 2574def COPY_S_B : COPY_S_B_ENC, COPY_S_B_DESC; 2575def COPY_S_H : COPY_S_H_ENC, COPY_S_H_DESC; 2576def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC; 2577 2578def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC; 2579def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC; 2580def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC; 2581 2582def CTCMSA : CTCMSA_ENC, CTCMSA_DESC; 2583 2584def DIV_S_B : DIV_S_B_ENC, DIV_S_B_DESC; 2585def DIV_S_H : DIV_S_H_ENC, DIV_S_H_DESC; 2586def DIV_S_W : DIV_S_W_ENC, DIV_S_W_DESC; 2587def DIV_S_D : DIV_S_D_ENC, DIV_S_D_DESC; 2588 2589def DIV_U_B : DIV_U_B_ENC, DIV_U_B_DESC; 2590def DIV_U_H : DIV_U_H_ENC, DIV_U_H_DESC; 2591def DIV_U_W : DIV_U_W_ENC, DIV_U_W_DESC; 2592def DIV_U_D : DIV_U_D_ENC, DIV_U_D_DESC; 2593 2594def DOTP_S_H : DOTP_S_H_ENC, DOTP_S_H_DESC; 2595def DOTP_S_W : DOTP_S_W_ENC, DOTP_S_W_DESC; 2596def DOTP_S_D : DOTP_S_D_ENC, DOTP_S_D_DESC; 2597 2598def DOTP_U_H : DOTP_U_H_ENC, DOTP_U_H_DESC; 2599def DOTP_U_W : DOTP_U_W_ENC, DOTP_U_W_DESC; 2600def DOTP_U_D : DOTP_U_D_ENC, DOTP_U_D_DESC; 2601 2602def DPADD_S_H : DPADD_S_H_ENC, DPADD_S_H_DESC; 2603def DPADD_S_W : DPADD_S_W_ENC, DPADD_S_W_DESC; 2604def DPADD_S_D : DPADD_S_D_ENC, DPADD_S_D_DESC; 2605 2606def DPADD_U_H : DPADD_U_H_ENC, DPADD_U_H_DESC; 2607def DPADD_U_W : DPADD_U_W_ENC, DPADD_U_W_DESC; 2608def DPADD_U_D : DPADD_U_D_ENC, DPADD_U_D_DESC; 2609 2610def DPSUB_S_H : DPSUB_S_H_ENC, DPSUB_S_H_DESC; 2611def DPSUB_S_W : DPSUB_S_W_ENC, DPSUB_S_W_DESC; 2612def DPSUB_S_D : DPSUB_S_D_ENC, DPSUB_S_D_DESC; 2613 2614def DPSUB_U_H : DPSUB_U_H_ENC, DPSUB_U_H_DESC; 2615def DPSUB_U_W : DPSUB_U_W_ENC, DPSUB_U_W_DESC; 2616def DPSUB_U_D : DPSUB_U_D_ENC, DPSUB_U_D_DESC; 2617 2618def FADD_W : FADD_W_ENC, FADD_W_DESC; 2619def FADD_D : FADD_D_ENC, FADD_D_DESC; 2620 2621def FCAF_W : FCAF_W_ENC, FCAF_W_DESC; 2622def FCAF_D : FCAF_D_ENC, FCAF_D_DESC; 2623 2624def FCEQ_W : FCEQ_W_ENC, FCEQ_W_DESC; 2625def FCEQ_D : FCEQ_D_ENC, FCEQ_D_DESC; 2626 2627def FCLE_W : FCLE_W_ENC, FCLE_W_DESC; 2628def FCLE_D : FCLE_D_ENC, FCLE_D_DESC; 2629 2630def FCLT_W : FCLT_W_ENC, FCLT_W_DESC; 2631def FCLT_D : FCLT_D_ENC, FCLT_D_DESC; 2632 2633def FCLASS_W : FCLASS_W_ENC, FCLASS_W_DESC; 2634def FCLASS_D : FCLASS_D_ENC, FCLASS_D_DESC; 2635 2636def FCNE_W : FCNE_W_ENC, FCNE_W_DESC; 2637def FCNE_D : FCNE_D_ENC, FCNE_D_DESC; 2638 2639def FCOR_W : FCOR_W_ENC, FCOR_W_DESC; 2640def FCOR_D : FCOR_D_ENC, FCOR_D_DESC; 2641 2642def FCUEQ_W : FCUEQ_W_ENC, FCUEQ_W_DESC; 2643def FCUEQ_D : FCUEQ_D_ENC, FCUEQ_D_DESC; 2644 2645def FCULE_W : FCULE_W_ENC, FCULE_W_DESC; 2646def FCULE_D : FCULE_D_ENC, FCULE_D_DESC; 2647 2648def FCULT_W : FCULT_W_ENC, FCULT_W_DESC; 2649def FCULT_D : FCULT_D_ENC, FCULT_D_DESC; 2650 2651def FCUN_W : FCUN_W_ENC, FCUN_W_DESC; 2652def FCUN_D : FCUN_D_ENC, FCUN_D_DESC; 2653 2654def FCUNE_W : FCUNE_W_ENC, FCUNE_W_DESC; 2655def FCUNE_D : FCUNE_D_ENC, FCUNE_D_DESC; 2656 2657def FDIV_W : FDIV_W_ENC, FDIV_W_DESC; 2658def FDIV_D : FDIV_D_ENC, FDIV_D_DESC; 2659 2660def FEXDO_H : FEXDO_H_ENC, FEXDO_H_DESC; 2661def FEXDO_W : FEXDO_W_ENC, FEXDO_W_DESC; 2662 2663def FEXP2_W : FEXP2_W_ENC, FEXP2_W_DESC; 2664def FEXP2_D : FEXP2_D_ENC, FEXP2_D_DESC; 2665 2666def FEXUPL_W : FEXUPL_W_ENC, FEXUPL_W_DESC; 2667def FEXUPL_D : FEXUPL_D_ENC, FEXUPL_D_DESC; 2668 2669def FEXUPR_W : FEXUPR_W_ENC, FEXUPR_W_DESC; 2670def FEXUPR_D : FEXUPR_D_ENC, FEXUPR_D_DESC; 2671 2672def FFINT_S_W : FFINT_S_W_ENC, FFINT_S_W_DESC; 2673def FFINT_S_D : FFINT_S_D_ENC, FFINT_S_D_DESC; 2674 2675def FFINT_U_W : FFINT_U_W_ENC, FFINT_U_W_DESC; 2676def FFINT_U_D : FFINT_U_D_ENC, FFINT_U_D_DESC; 2677 2678def FFQL_W : FFQL_W_ENC, FFQL_W_DESC; 2679def FFQL_D : FFQL_D_ENC, FFQL_D_DESC; 2680 2681def FFQR_W : FFQR_W_ENC, FFQR_W_DESC; 2682def FFQR_D : FFQR_D_ENC, FFQR_D_DESC; 2683 2684def FILL_B : FILL_B_ENC, FILL_B_DESC; 2685def FILL_H : FILL_H_ENC, FILL_H_DESC; 2686def FILL_W : FILL_W_ENC, FILL_W_DESC; 2687 2688def FLOG2_W : FLOG2_W_ENC, FLOG2_W_DESC; 2689def FLOG2_D : FLOG2_D_ENC, FLOG2_D_DESC; 2690 2691def FMADD_W : FMADD_W_ENC, FMADD_W_DESC; 2692def FMADD_D : FMADD_D_ENC, FMADD_D_DESC; 2693 2694def FMAX_W : FMAX_W_ENC, FMAX_W_DESC; 2695def FMAX_D : FMAX_D_ENC, FMAX_D_DESC; 2696 2697def FMAX_A_W : FMAX_A_W_ENC, FMAX_A_W_DESC; 2698def FMAX_A_D : FMAX_A_D_ENC, FMAX_A_D_DESC; 2699 2700def FMIN_W : FMIN_W_ENC, FMIN_W_DESC; 2701def FMIN_D : FMIN_D_ENC, FMIN_D_DESC; 2702 2703def FMIN_A_W : FMIN_A_W_ENC, FMIN_A_W_DESC; 2704def FMIN_A_D : FMIN_A_D_ENC, FMIN_A_D_DESC; 2705 2706def FMSUB_W : FMSUB_W_ENC, FMSUB_W_DESC; 2707def FMSUB_D : FMSUB_D_ENC, FMSUB_D_DESC; 2708 2709def FMUL_W : FMUL_W_ENC, FMUL_W_DESC; 2710def FMUL_D : FMUL_D_ENC, FMUL_D_DESC; 2711 2712def FRINT_W : FRINT_W_ENC, FRINT_W_DESC; 2713def FRINT_D : FRINT_D_ENC, FRINT_D_DESC; 2714 2715def FRCP_W : FRCP_W_ENC, FRCP_W_DESC; 2716def FRCP_D : FRCP_D_ENC, FRCP_D_DESC; 2717 2718def FRSQRT_W : FRSQRT_W_ENC, FRSQRT_W_DESC; 2719def FRSQRT_D : FRSQRT_D_ENC, FRSQRT_D_DESC; 2720 2721def FSAF_W : FSAF_W_ENC, FSAF_W_DESC; 2722def FSAF_D : FSAF_D_ENC, FSAF_D_DESC; 2723 2724def FSEQ_W : FSEQ_W_ENC, FSEQ_W_DESC; 2725def FSEQ_D : FSEQ_D_ENC, FSEQ_D_DESC; 2726 2727def FSLE_W : FSLE_W_ENC, FSLE_W_DESC; 2728def FSLE_D : FSLE_D_ENC, FSLE_D_DESC; 2729 2730def FSLT_W : FSLT_W_ENC, FSLT_W_DESC; 2731def FSLT_D : FSLT_D_ENC, FSLT_D_DESC; 2732 2733def FSNE_W : FSNE_W_ENC, FSNE_W_DESC; 2734def FSNE_D : FSNE_D_ENC, FSNE_D_DESC; 2735 2736def FSOR_W : FSOR_W_ENC, FSOR_W_DESC; 2737def FSOR_D : FSOR_D_ENC, FSOR_D_DESC; 2738 2739def FSQRT_W : FSQRT_W_ENC, FSQRT_W_DESC; 2740def FSQRT_D : FSQRT_D_ENC, FSQRT_D_DESC; 2741 2742def FSUB_W : FSUB_W_ENC, FSUB_W_DESC; 2743def FSUB_D : FSUB_D_ENC, FSUB_D_DESC; 2744 2745def FSUEQ_W : FSUEQ_W_ENC, FSUEQ_W_DESC; 2746def FSUEQ_D : FSUEQ_D_ENC, FSUEQ_D_DESC; 2747 2748def FSULE_W : FSULE_W_ENC, FSULE_W_DESC; 2749def FSULE_D : FSULE_D_ENC, FSULE_D_DESC; 2750 2751def FSULT_W : FSULT_W_ENC, FSULT_W_DESC; 2752def FSULT_D : FSULT_D_ENC, FSULT_D_DESC; 2753 2754def FSUN_W : FSUN_W_ENC, FSUN_W_DESC; 2755def FSUN_D : FSUN_D_ENC, FSUN_D_DESC; 2756 2757def FSUNE_W : FSUNE_W_ENC, FSUNE_W_DESC; 2758def FSUNE_D : FSUNE_D_ENC, FSUNE_D_DESC; 2759 2760def FTRUNC_S_W : FTRUNC_S_W_ENC, FTRUNC_S_W_DESC; 2761def FTRUNC_S_D : FTRUNC_S_D_ENC, FTRUNC_S_D_DESC; 2762 2763def FTRUNC_U_W : FTRUNC_U_W_ENC, FTRUNC_U_W_DESC; 2764def FTRUNC_U_D : FTRUNC_U_D_ENC, FTRUNC_U_D_DESC; 2765 2766def FTINT_S_W : FTINT_S_W_ENC, FTINT_S_W_DESC; 2767def FTINT_S_D : FTINT_S_D_ENC, FTINT_S_D_DESC; 2768 2769def FTINT_U_W : FTINT_U_W_ENC, FTINT_U_W_DESC; 2770def FTINT_U_D : FTINT_U_D_ENC, FTINT_U_D_DESC; 2771 2772def FTQ_H : FTQ_H_ENC, FTQ_H_DESC; 2773def FTQ_W : FTQ_W_ENC, FTQ_W_DESC; 2774 2775def HADD_S_H : HADD_S_H_ENC, HADD_S_H_DESC; 2776def HADD_S_W : HADD_S_W_ENC, HADD_S_W_DESC; 2777def HADD_S_D : HADD_S_D_ENC, HADD_S_D_DESC; 2778 2779def HADD_U_H : HADD_U_H_ENC, HADD_U_H_DESC; 2780def HADD_U_W : HADD_U_W_ENC, HADD_U_W_DESC; 2781def HADD_U_D : HADD_U_D_ENC, HADD_U_D_DESC; 2782 2783def HSUB_S_H : HSUB_S_H_ENC, HSUB_S_H_DESC; 2784def HSUB_S_W : HSUB_S_W_ENC, HSUB_S_W_DESC; 2785def HSUB_S_D : HSUB_S_D_ENC, HSUB_S_D_DESC; 2786 2787def HSUB_U_H : HSUB_U_H_ENC, HSUB_U_H_DESC; 2788def HSUB_U_W : HSUB_U_W_ENC, HSUB_U_W_DESC; 2789def HSUB_U_D : HSUB_U_D_ENC, HSUB_U_D_DESC; 2790 2791def ILVEV_B : ILVEV_B_ENC, ILVEV_B_DESC; 2792def ILVEV_H : ILVEV_H_ENC, ILVEV_H_DESC; 2793def ILVEV_W : ILVEV_W_ENC, ILVEV_W_DESC; 2794def ILVEV_D : ILVEV_D_ENC, ILVEV_D_DESC; 2795 2796def ILVL_B : ILVL_B_ENC, ILVL_B_DESC; 2797def ILVL_H : ILVL_H_ENC, ILVL_H_DESC; 2798def ILVL_W : ILVL_W_ENC, ILVL_W_DESC; 2799def ILVL_D : ILVL_D_ENC, ILVL_D_DESC; 2800 2801def ILVOD_B : ILVOD_B_ENC, ILVOD_B_DESC; 2802def ILVOD_H : ILVOD_H_ENC, ILVOD_H_DESC; 2803def ILVOD_W : ILVOD_W_ENC, ILVOD_W_DESC; 2804def ILVOD_D : ILVOD_D_ENC, ILVOD_D_DESC; 2805 2806def ILVR_B : ILVR_B_ENC, ILVR_B_DESC; 2807def ILVR_H : ILVR_H_ENC, ILVR_H_DESC; 2808def ILVR_W : ILVR_W_ENC, ILVR_W_DESC; 2809def ILVR_D : ILVR_D_ENC, ILVR_D_DESC; 2810 2811def INSERT_B : INSERT_B_ENC, INSERT_B_DESC; 2812def INSERT_H : INSERT_H_ENC, INSERT_H_DESC; 2813def INSERT_W : INSERT_W_ENC, INSERT_W_DESC; 2814 2815def INSVE_B : INSVE_B_ENC, INSVE_B_DESC; 2816def INSVE_H : INSVE_H_ENC, INSVE_H_DESC; 2817def INSVE_W : INSVE_W_ENC, INSVE_W_DESC; 2818def INSVE_D : INSVE_D_ENC, INSVE_D_DESC; 2819 2820def LD_B: LD_B_ENC, LD_B_DESC; 2821def LD_H: LD_H_ENC, LD_H_DESC; 2822def LD_W: LD_W_ENC, LD_W_DESC; 2823def LD_D: LD_D_ENC, LD_D_DESC; 2824 2825def LDI_B : LDI_B_ENC, LDI_B_DESC; 2826def LDI_H : LDI_H_ENC, LDI_H_DESC; 2827def LDI_W : LDI_W_ENC, LDI_W_DESC; 2828def LDI_D : LDI_D_ENC, LDI_D_DESC; 2829 2830def LDX_B: LDX_B_ENC, LDX_B_DESC; 2831def LDX_H: LDX_H_ENC, LDX_H_DESC; 2832def LDX_W: LDX_W_ENC, LDX_W_DESC; 2833def LDX_D: LDX_D_ENC, LDX_D_DESC; 2834 2835def MADD_Q_H : MADD_Q_H_ENC, MADD_Q_H_DESC; 2836def MADD_Q_W : MADD_Q_W_ENC, MADD_Q_W_DESC; 2837 2838def MADDR_Q_H : MADDR_Q_H_ENC, MADDR_Q_H_DESC; 2839def MADDR_Q_W : MADDR_Q_W_ENC, MADDR_Q_W_DESC; 2840 2841def MADDV_B : MADDV_B_ENC, MADDV_B_DESC; 2842def MADDV_H : MADDV_H_ENC, MADDV_H_DESC; 2843def MADDV_W : MADDV_W_ENC, MADDV_W_DESC; 2844def MADDV_D : MADDV_D_ENC, MADDV_D_DESC; 2845 2846def MAX_A_B : MAX_A_B_ENC, MAX_A_B_DESC; 2847def MAX_A_H : MAX_A_H_ENC, MAX_A_H_DESC; 2848def MAX_A_W : MAX_A_W_ENC, MAX_A_W_DESC; 2849def MAX_A_D : MAX_A_D_ENC, MAX_A_D_DESC; 2850 2851def MAX_S_B : MAX_S_B_ENC, MAX_S_B_DESC; 2852def MAX_S_H : MAX_S_H_ENC, MAX_S_H_DESC; 2853def MAX_S_W : MAX_S_W_ENC, MAX_S_W_DESC; 2854def MAX_S_D : MAX_S_D_ENC, MAX_S_D_DESC; 2855 2856def MAX_U_B : MAX_U_B_ENC, MAX_U_B_DESC; 2857def MAX_U_H : MAX_U_H_ENC, MAX_U_H_DESC; 2858def MAX_U_W : MAX_U_W_ENC, MAX_U_W_DESC; 2859def MAX_U_D : MAX_U_D_ENC, MAX_U_D_DESC; 2860 2861def MAXI_S_B : MAXI_S_B_ENC, MAXI_S_B_DESC; 2862def MAXI_S_H : MAXI_S_H_ENC, MAXI_S_H_DESC; 2863def MAXI_S_W : MAXI_S_W_ENC, MAXI_S_W_DESC; 2864def MAXI_S_D : MAXI_S_D_ENC, MAXI_S_D_DESC; 2865 2866def MAXI_U_B : MAXI_U_B_ENC, MAXI_U_B_DESC; 2867def MAXI_U_H : MAXI_U_H_ENC, MAXI_U_H_DESC; 2868def MAXI_U_W : MAXI_U_W_ENC, MAXI_U_W_DESC; 2869def MAXI_U_D : MAXI_U_D_ENC, MAXI_U_D_DESC; 2870 2871def MIN_A_B : MIN_A_B_ENC, MIN_A_B_DESC; 2872def MIN_A_H : MIN_A_H_ENC, MIN_A_H_DESC; 2873def MIN_A_W : MIN_A_W_ENC, MIN_A_W_DESC; 2874def MIN_A_D : MIN_A_D_ENC, MIN_A_D_DESC; 2875 2876def MIN_S_B : MIN_S_B_ENC, MIN_S_B_DESC; 2877def MIN_S_H : MIN_S_H_ENC, MIN_S_H_DESC; 2878def MIN_S_W : MIN_S_W_ENC, MIN_S_W_DESC; 2879def MIN_S_D : MIN_S_D_ENC, MIN_S_D_DESC; 2880 2881def MIN_U_B : MIN_U_B_ENC, MIN_U_B_DESC; 2882def MIN_U_H : MIN_U_H_ENC, MIN_U_H_DESC; 2883def MIN_U_W : MIN_U_W_ENC, MIN_U_W_DESC; 2884def MIN_U_D : MIN_U_D_ENC, MIN_U_D_DESC; 2885 2886def MINI_S_B : MINI_S_B_ENC, MINI_S_B_DESC; 2887def MINI_S_H : MINI_S_H_ENC, MINI_S_H_DESC; 2888def MINI_S_W : MINI_S_W_ENC, MINI_S_W_DESC; 2889def MINI_S_D : MINI_S_D_ENC, MINI_S_D_DESC; 2890 2891def MINI_U_B : MINI_U_B_ENC, MINI_U_B_DESC; 2892def MINI_U_H : MINI_U_H_ENC, MINI_U_H_DESC; 2893def MINI_U_W : MINI_U_W_ENC, MINI_U_W_DESC; 2894def MINI_U_D : MINI_U_D_ENC, MINI_U_D_DESC; 2895 2896def MOD_S_B : MOD_S_B_ENC, MOD_S_B_DESC; 2897def MOD_S_H : MOD_S_H_ENC, MOD_S_H_DESC; 2898def MOD_S_W : MOD_S_W_ENC, MOD_S_W_DESC; 2899def MOD_S_D : MOD_S_D_ENC, MOD_S_D_DESC; 2900 2901def MOD_U_B : MOD_U_B_ENC, MOD_U_B_DESC; 2902def MOD_U_H : MOD_U_H_ENC, MOD_U_H_DESC; 2903def MOD_U_W : MOD_U_W_ENC, MOD_U_W_DESC; 2904def MOD_U_D : MOD_U_D_ENC, MOD_U_D_DESC; 2905 2906def MOVE_V : MOVE_V_ENC, MOVE_V_DESC; 2907 2908def MSUB_Q_H : MSUB_Q_H_ENC, MSUB_Q_H_DESC; 2909def MSUB_Q_W : MSUB_Q_W_ENC, MSUB_Q_W_DESC; 2910 2911def MSUBR_Q_H : MSUBR_Q_H_ENC, MSUBR_Q_H_DESC; 2912def MSUBR_Q_W : MSUBR_Q_W_ENC, MSUBR_Q_W_DESC; 2913 2914def MSUBV_B : MSUBV_B_ENC, MSUBV_B_DESC; 2915def MSUBV_H : MSUBV_H_ENC, MSUBV_H_DESC; 2916def MSUBV_W : MSUBV_W_ENC, MSUBV_W_DESC; 2917def MSUBV_D : MSUBV_D_ENC, MSUBV_D_DESC; 2918 2919def MUL_Q_H : MUL_Q_H_ENC, MUL_Q_H_DESC; 2920def MUL_Q_W : MUL_Q_W_ENC, MUL_Q_W_DESC; 2921 2922def MULR_Q_H : MULR_Q_H_ENC, MULR_Q_H_DESC; 2923def MULR_Q_W : MULR_Q_W_ENC, MULR_Q_W_DESC; 2924 2925def MULV_B : MULV_B_ENC, MULV_B_DESC; 2926def MULV_H : MULV_H_ENC, MULV_H_DESC; 2927def MULV_W : MULV_W_ENC, MULV_W_DESC; 2928def MULV_D : MULV_D_ENC, MULV_D_DESC; 2929 2930def NLOC_B : NLOC_B_ENC, NLOC_B_DESC; 2931def NLOC_H : NLOC_H_ENC, NLOC_H_DESC; 2932def NLOC_W : NLOC_W_ENC, NLOC_W_DESC; 2933def NLOC_D : NLOC_D_ENC, NLOC_D_DESC; 2934 2935def NLZC_B : NLZC_B_ENC, NLZC_B_DESC; 2936def NLZC_H : NLZC_H_ENC, NLZC_H_DESC; 2937def NLZC_W : NLZC_W_ENC, NLZC_W_DESC; 2938def NLZC_D : NLZC_D_ENC, NLZC_D_DESC; 2939 2940def NOR_V : NOR_V_ENC, NOR_V_DESC; 2941def NOR_V_H_PSEUDO : NOR_V_H_PSEUDO_DESC, 2942 PseudoInstExpansion<(NOR_V MSA128B:$wd, 2943 MSA128B:$ws, MSA128B:$wt)>; 2944def NOR_V_W_PSEUDO : NOR_V_W_PSEUDO_DESC, 2945 PseudoInstExpansion<(NOR_V MSA128B:$wd, 2946 MSA128B:$ws, MSA128B:$wt)>; 2947def NOR_V_D_PSEUDO : NOR_V_D_PSEUDO_DESC, 2948 PseudoInstExpansion<(NOR_V MSA128B:$wd, 2949 MSA128B:$ws, MSA128B:$wt)>; 2950 2951def NORI_B : NORI_B_ENC, NORI_B_DESC; 2952 2953def OR_V : OR_V_ENC, OR_V_DESC; 2954def OR_V_H_PSEUDO : OR_V_H_PSEUDO_DESC, 2955 PseudoInstExpansion<(OR_V MSA128B:$wd, 2956 MSA128B:$ws, MSA128B:$wt)>; 2957def OR_V_W_PSEUDO : OR_V_W_PSEUDO_DESC, 2958 PseudoInstExpansion<(OR_V MSA128B:$wd, 2959 MSA128B:$ws, MSA128B:$wt)>; 2960def OR_V_D_PSEUDO : OR_V_D_PSEUDO_DESC, 2961 PseudoInstExpansion<(OR_V MSA128B:$wd, 2962 MSA128B:$ws, MSA128B:$wt)>; 2963 2964def ORI_B : ORI_B_ENC, ORI_B_DESC; 2965 2966def PCKEV_B : PCKEV_B_ENC, PCKEV_B_DESC; 2967def PCKEV_H : PCKEV_H_ENC, PCKEV_H_DESC; 2968def PCKEV_W : PCKEV_W_ENC, PCKEV_W_DESC; 2969def PCKEV_D : PCKEV_D_ENC, PCKEV_D_DESC; 2970 2971def PCKOD_B : PCKOD_B_ENC, PCKOD_B_DESC; 2972def PCKOD_H : PCKOD_H_ENC, PCKOD_H_DESC; 2973def PCKOD_W : PCKOD_W_ENC, PCKOD_W_DESC; 2974def PCKOD_D : PCKOD_D_ENC, PCKOD_D_DESC; 2975 2976def PCNT_B : PCNT_B_ENC, PCNT_B_DESC; 2977def PCNT_H : PCNT_H_ENC, PCNT_H_DESC; 2978def PCNT_W : PCNT_W_ENC, PCNT_W_DESC; 2979def PCNT_D : PCNT_D_ENC, PCNT_D_DESC; 2980 2981def SAT_S_B : SAT_S_B_ENC, SAT_S_B_DESC; 2982def SAT_S_H : SAT_S_H_ENC, SAT_S_H_DESC; 2983def SAT_S_W : SAT_S_W_ENC, SAT_S_W_DESC; 2984def SAT_S_D : SAT_S_D_ENC, SAT_S_D_DESC; 2985 2986def SAT_U_B : SAT_U_B_ENC, SAT_U_B_DESC; 2987def SAT_U_H : SAT_U_H_ENC, SAT_U_H_DESC; 2988def SAT_U_W : SAT_U_W_ENC, SAT_U_W_DESC; 2989def SAT_U_D : SAT_U_D_ENC, SAT_U_D_DESC; 2990 2991def SHF_B : SHF_B_ENC, SHF_B_DESC; 2992def SHF_H : SHF_H_ENC, SHF_H_DESC; 2993def SHF_W : SHF_W_ENC, SHF_W_DESC; 2994 2995def SLD_B : SLD_B_ENC, SLD_B_DESC; 2996def SLD_H : SLD_H_ENC, SLD_H_DESC; 2997def SLD_W : SLD_W_ENC, SLD_W_DESC; 2998def SLD_D : SLD_D_ENC, SLD_D_DESC; 2999 3000def SLDI_B : SLDI_B_ENC, SLDI_B_DESC; 3001def SLDI_H : SLDI_H_ENC, SLDI_H_DESC; 3002def SLDI_W : SLDI_W_ENC, SLDI_W_DESC; 3003def SLDI_D : SLDI_D_ENC, SLDI_D_DESC; 3004 3005def SLL_B : SLL_B_ENC, SLL_B_DESC; 3006def SLL_H : SLL_H_ENC, SLL_H_DESC; 3007def SLL_W : SLL_W_ENC, SLL_W_DESC; 3008def SLL_D : SLL_D_ENC, SLL_D_DESC; 3009 3010def SLLI_B : SLLI_B_ENC, SLLI_B_DESC; 3011def SLLI_H : SLLI_H_ENC, SLLI_H_DESC; 3012def SLLI_W : SLLI_W_ENC, SLLI_W_DESC; 3013def SLLI_D : SLLI_D_ENC, SLLI_D_DESC; 3014 3015def SPLAT_B : SPLAT_B_ENC, SPLAT_B_DESC; 3016def SPLAT_H : SPLAT_H_ENC, SPLAT_H_DESC; 3017def SPLAT_W : SPLAT_W_ENC, SPLAT_W_DESC; 3018def SPLAT_D : SPLAT_D_ENC, SPLAT_D_DESC; 3019 3020def SPLATI_B : SPLATI_B_ENC, SPLATI_B_DESC; 3021def SPLATI_H : SPLATI_H_ENC, SPLATI_H_DESC; 3022def SPLATI_W : SPLATI_W_ENC, SPLATI_W_DESC; 3023def SPLATI_D : SPLATI_D_ENC, SPLATI_D_DESC; 3024 3025def SRA_B : SRA_B_ENC, SRA_B_DESC; 3026def SRA_H : SRA_H_ENC, SRA_H_DESC; 3027def SRA_W : SRA_W_ENC, SRA_W_DESC; 3028def SRA_D : SRA_D_ENC, SRA_D_DESC; 3029 3030def SRAI_B : SRAI_B_ENC, SRAI_B_DESC; 3031def SRAI_H : SRAI_H_ENC, SRAI_H_DESC; 3032def SRAI_W : SRAI_W_ENC, SRAI_W_DESC; 3033def SRAI_D : SRAI_D_ENC, SRAI_D_DESC; 3034 3035def SRAR_B : SRAR_B_ENC, SRAR_B_DESC; 3036def SRAR_H : SRAR_H_ENC, SRAR_H_DESC; 3037def SRAR_W : SRAR_W_ENC, SRAR_W_DESC; 3038def SRAR_D : SRAR_D_ENC, SRAR_D_DESC; 3039 3040def SRARI_B : SRARI_B_ENC, SRARI_B_DESC; 3041def SRARI_H : SRARI_H_ENC, SRARI_H_DESC; 3042def SRARI_W : SRARI_W_ENC, SRARI_W_DESC; 3043def SRARI_D : SRARI_D_ENC, SRARI_D_DESC; 3044 3045def SRL_B : SRL_B_ENC, SRL_B_DESC; 3046def SRL_H : SRL_H_ENC, SRL_H_DESC; 3047def SRL_W : SRL_W_ENC, SRL_W_DESC; 3048def SRL_D : SRL_D_ENC, SRL_D_DESC; 3049 3050def SRLI_B : SRLI_B_ENC, SRLI_B_DESC; 3051def SRLI_H : SRLI_H_ENC, SRLI_H_DESC; 3052def SRLI_W : SRLI_W_ENC, SRLI_W_DESC; 3053def SRLI_D : SRLI_D_ENC, SRLI_D_DESC; 3054 3055def SRLR_B : SRLR_B_ENC, SRLR_B_DESC; 3056def SRLR_H : SRLR_H_ENC, SRLR_H_DESC; 3057def SRLR_W : SRLR_W_ENC, SRLR_W_DESC; 3058def SRLR_D : SRLR_D_ENC, SRLR_D_DESC; 3059 3060def SRLRI_B : SRLRI_B_ENC, SRLRI_B_DESC; 3061def SRLRI_H : SRLRI_H_ENC, SRLRI_H_DESC; 3062def SRLRI_W : SRLRI_W_ENC, SRLRI_W_DESC; 3063def SRLRI_D : SRLRI_D_ENC, SRLRI_D_DESC; 3064 3065def ST_B: ST_B_ENC, ST_B_DESC; 3066def ST_H: ST_H_ENC, ST_H_DESC; 3067def ST_W: ST_W_ENC, ST_W_DESC; 3068def ST_D: ST_D_ENC, ST_D_DESC; 3069 3070def STX_B: STX_B_ENC, STX_B_DESC; 3071def STX_H: STX_H_ENC, STX_H_DESC; 3072def STX_W: STX_W_ENC, STX_W_DESC; 3073def STX_D: STX_D_ENC, STX_D_DESC; 3074 3075def SUBS_S_B : SUBS_S_B_ENC, SUBS_S_B_DESC; 3076def SUBS_S_H : SUBS_S_H_ENC, SUBS_S_H_DESC; 3077def SUBS_S_W : SUBS_S_W_ENC, SUBS_S_W_DESC; 3078def SUBS_S_D : SUBS_S_D_ENC, SUBS_S_D_DESC; 3079 3080def SUBS_U_B : SUBS_U_B_ENC, SUBS_U_B_DESC; 3081def SUBS_U_H : SUBS_U_H_ENC, SUBS_U_H_DESC; 3082def SUBS_U_W : SUBS_U_W_ENC, SUBS_U_W_DESC; 3083def SUBS_U_D : SUBS_U_D_ENC, SUBS_U_D_DESC; 3084 3085def SUBSUS_U_B : SUBSUS_U_B_ENC, SUBSUS_U_B_DESC; 3086def SUBSUS_U_H : SUBSUS_U_H_ENC, SUBSUS_U_H_DESC; 3087def SUBSUS_U_W : SUBSUS_U_W_ENC, SUBSUS_U_W_DESC; 3088def SUBSUS_U_D : SUBSUS_U_D_ENC, SUBSUS_U_D_DESC; 3089 3090def SUBSUU_S_B : SUBSUU_S_B_ENC, SUBSUU_S_B_DESC; 3091def SUBSUU_S_H : SUBSUU_S_H_ENC, SUBSUU_S_H_DESC; 3092def SUBSUU_S_W : SUBSUU_S_W_ENC, SUBSUU_S_W_DESC; 3093def SUBSUU_S_D : SUBSUU_S_D_ENC, SUBSUU_S_D_DESC; 3094 3095def SUBV_B : SUBV_B_ENC, SUBV_B_DESC; 3096def SUBV_H : SUBV_H_ENC, SUBV_H_DESC; 3097def SUBV_W : SUBV_W_ENC, SUBV_W_DESC; 3098def SUBV_D : SUBV_D_ENC, SUBV_D_DESC; 3099 3100def SUBVI_B : SUBVI_B_ENC, SUBVI_B_DESC; 3101def SUBVI_H : SUBVI_H_ENC, SUBVI_H_DESC; 3102def SUBVI_W : SUBVI_W_ENC, SUBVI_W_DESC; 3103def SUBVI_D : SUBVI_D_ENC, SUBVI_D_DESC; 3104 3105def VSHF_B : VSHF_B_ENC, VSHF_B_DESC; 3106def VSHF_H : VSHF_H_ENC, VSHF_H_DESC; 3107def VSHF_W : VSHF_W_ENC, VSHF_W_DESC; 3108def VSHF_D : VSHF_D_ENC, VSHF_D_DESC; 3109 3110def XOR_V : XOR_V_ENC, XOR_V_DESC; 3111def XOR_V_H_PSEUDO : XOR_V_H_PSEUDO_DESC, 3112 PseudoInstExpansion<(XOR_V MSA128B:$wd, 3113 MSA128B:$ws, MSA128B:$wt)>; 3114def XOR_V_W_PSEUDO : XOR_V_W_PSEUDO_DESC, 3115 PseudoInstExpansion<(XOR_V MSA128B:$wd, 3116 MSA128B:$ws, MSA128B:$wt)>; 3117def XOR_V_D_PSEUDO : XOR_V_D_PSEUDO_DESC, 3118 PseudoInstExpansion<(XOR_V MSA128B:$wd, 3119 MSA128B:$ws, MSA128B:$wt)>; 3120 3121def XORI_B : XORI_B_ENC, XORI_B_DESC; 3122 3123// Patterns. 3124class MSAPat<dag pattern, dag result, list<Predicate> pred = [HasMSA]> : 3125 Pat<pattern, result>, Requires<pred>; 3126 3127def : MSAPat<(extractelt (v4i32 MSA128W:$ws), immZExt4:$idx), 3128 (COPY_S_W MSA128W:$ws, immZExt4:$idx)>; 3129 3130def : MSAPat<(v16i8 (load addr:$addr)), (LD_B addr:$addr)>; 3131def : MSAPat<(v8i16 (load addr:$addr)), (LD_H addr:$addr)>; 3132def : MSAPat<(v4i32 (load addr:$addr)), (LD_W addr:$addr)>; 3133def : MSAPat<(v2i64 (load addr:$addr)), (LD_D addr:$addr)>; 3134def : MSAPat<(v8f16 (load addr:$addr)), (LD_H addr:$addr)>; 3135def : MSAPat<(v4f32 (load addr:$addr)), (LD_W addr:$addr)>; 3136def : MSAPat<(v2f64 (load addr:$addr)), (LD_D addr:$addr)>; 3137 3138def : MSAPat<(v8f16 (load addrRegImm:$addr)), (LD_H addrRegImm:$addr)>; 3139def : MSAPat<(v4f32 (load addrRegImm:$addr)), (LD_W addrRegImm:$addr)>; 3140def : MSAPat<(v2f64 (load addrRegImm:$addr)), (LD_D addrRegImm:$addr)>; 3141 3142def : MSAPat<(store (v16i8 MSA128B:$ws), addr:$addr), 3143 (ST_B MSA128B:$ws, addr:$addr)>; 3144def : MSAPat<(store (v8i16 MSA128H:$ws), addr:$addr), 3145 (ST_H MSA128H:$ws, addr:$addr)>; 3146def : MSAPat<(store (v4i32 MSA128W:$ws), addr:$addr), 3147 (ST_W MSA128W:$ws, addr:$addr)>; 3148def : MSAPat<(store (v2i64 MSA128D:$ws), addr:$addr), 3149 (ST_D MSA128D:$ws, addr:$addr)>; 3150def : MSAPat<(store (v8f16 MSA128H:$ws), addr:$addr), 3151 (ST_H MSA128H:$ws, addr:$addr)>; 3152def : MSAPat<(store (v4f32 MSA128W:$ws), addr:$addr), 3153 (ST_W MSA128W:$ws, addr:$addr)>; 3154def : MSAPat<(store (v2f64 MSA128D:$ws), addr:$addr), 3155 (ST_D MSA128D:$ws, addr:$addr)>; 3156 3157def ST_FH : MSAPat<(store (v8f16 MSA128H:$ws), addrRegImm:$addr), 3158 (ST_H MSA128H:$ws, addrRegImm:$addr)>; 3159def ST_FW : MSAPat<(store (v4f32 MSA128W:$ws), addrRegImm:$addr), 3160 (ST_W MSA128W:$ws, addrRegImm:$addr)>; 3161def ST_FD : MSAPat<(store (v2f64 MSA128D:$ws), addrRegImm:$addr), 3162 (ST_D MSA128D:$ws, addrRegImm:$addr)>; 3163 3164class MSA_FABS_PSEUDO_DESC_BASE<RegisterOperand ROWD, 3165 RegisterOperand ROWS = ROWD, 3166 InstrItinClass itin = NoItinerary> : 3167 MipsPseudo<(outs ROWD:$wd), 3168 (ins ROWS:$ws), 3169 [(set ROWD:$wd, (fabs ROWS:$ws))]> { 3170 InstrItinClass Itinerary = itin; 3171} 3172def FABS_W : MSA_FABS_PSEUDO_DESC_BASE<MSA128WOpnd>, 3173 PseudoInstExpansion<(FMAX_A_W MSA128WOpnd:$wd, MSA128WOpnd:$ws, 3174 MSA128WOpnd:$ws)>; 3175def FABS_D : MSA_FABS_PSEUDO_DESC_BASE<MSA128DOpnd>, 3176 PseudoInstExpansion<(FMAX_A_D MSA128DOpnd:$wd, MSA128DOpnd:$ws, 3177 MSA128DOpnd:$ws)>; 3178 3179class MSABitconvertPat<ValueType DstVT, ValueType SrcVT, 3180 RegisterClass DstRC, list<Predicate> preds = [HasMSA]> : 3181 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3182 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>; 3183 3184// These are endian-independant because the element size doesnt change 3185def : MSABitconvertPat<v8i16, v8f16, MSA128H>; 3186def : MSABitconvertPat<v4i32, v4f32, MSA128W>; 3187def : MSABitconvertPat<v2i64, v2f64, MSA128D>; 3188def : MSABitconvertPat<v8f16, v8i16, MSA128H>; 3189def : MSABitconvertPat<v4f32, v4i32, MSA128W>; 3190def : MSABitconvertPat<v2f64, v2i64, MSA128D>; 3191 3192// Little endian bitcasts are always no-ops 3193def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>; 3194def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>; 3195def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>; 3196def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>; 3197def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>; 3198def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>; 3199 3200def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>; 3201def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>; 3202def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>; 3203def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>; 3204def : MSABitconvertPat<v8i16, v2f64, MSA128H, [HasMSA, IsLE]>; 3205 3206def : MSABitconvertPat<v4i32, v16i8, MSA128W, [HasMSA, IsLE]>; 3207def : MSABitconvertPat<v4i32, v8i16, MSA128W, [HasMSA, IsLE]>; 3208def : MSABitconvertPat<v4i32, v2i64, MSA128W, [HasMSA, IsLE]>; 3209def : MSABitconvertPat<v4i32, v8f16, MSA128W, [HasMSA, IsLE]>; 3210def : MSABitconvertPat<v4i32, v2f64, MSA128W, [HasMSA, IsLE]>; 3211 3212def : MSABitconvertPat<v2i64, v16i8, MSA128D, [HasMSA, IsLE]>; 3213def : MSABitconvertPat<v2i64, v8i16, MSA128D, [HasMSA, IsLE]>; 3214def : MSABitconvertPat<v2i64, v4i32, MSA128D, [HasMSA, IsLE]>; 3215def : MSABitconvertPat<v2i64, v8f16, MSA128D, [HasMSA, IsLE]>; 3216def : MSABitconvertPat<v2i64, v4f32, MSA128D, [HasMSA, IsLE]>; 3217 3218def : MSABitconvertPat<v4f32, v16i8, MSA128W, [HasMSA, IsLE]>; 3219def : MSABitconvertPat<v4f32, v8i16, MSA128W, [HasMSA, IsLE]>; 3220def : MSABitconvertPat<v4f32, v2i64, MSA128W, [HasMSA, IsLE]>; 3221def : MSABitconvertPat<v4f32, v8f16, MSA128W, [HasMSA, IsLE]>; 3222def : MSABitconvertPat<v4f32, v2f64, MSA128W, [HasMSA, IsLE]>; 3223 3224def : MSABitconvertPat<v2f64, v16i8, MSA128D, [HasMSA, IsLE]>; 3225def : MSABitconvertPat<v2f64, v8i16, MSA128D, [HasMSA, IsLE]>; 3226def : MSABitconvertPat<v2f64, v4i32, MSA128D, [HasMSA, IsLE]>; 3227def : MSABitconvertPat<v2f64, v8f16, MSA128D, [HasMSA, IsLE]>; 3228def : MSABitconvertPat<v2f64, v4f32, MSA128D, [HasMSA, IsLE]>; 3229 3230// Big endian bitcasts expand to shuffle instructions. 3231// This is because bitcast is defined to be a store/load sequence and the 3232// vector store/load instructions are mixed-endian with respect to the vector 3233// as a whole (little endian with respect to element order, but big endian 3234// elements). 3235 3236class MSABitconvertReverseQuartersPat<ValueType DstVT, ValueType SrcVT, 3237 RegisterClass DstRC, MSAInst Insn, 3238 RegisterClass ViaRC> : 3239 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3240 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 27), 3241 DstRC), 3242 [HasMSA, IsBE]>; 3243 3244class MSABitconvertReverseHalvesPat<ValueType DstVT, ValueType SrcVT, 3245 RegisterClass DstRC, MSAInst Insn, 3246 RegisterClass ViaRC> : 3247 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3248 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 177), 3249 DstRC), 3250 [HasMSA, IsBE]>; 3251 3252class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT, 3253 RegisterClass DstRC> : 3254 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 3255 3256class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT, 3257 RegisterClass DstRC> : 3258 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 3259 3260class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT, 3261 RegisterClass DstRC> : 3262 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3263 (COPY_TO_REGCLASS 3264 (SHF_W 3265 (COPY_TO_REGCLASS 3266 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27), 3267 MSA128W), 177), 3268 DstRC), 3269 [HasMSA, IsBE]>; 3270 3271class MSABitconvertReverseHInWPat<ValueType DstVT, ValueType SrcVT, 3272 RegisterClass DstRC> : 3273 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 3274 3275class MSABitconvertReverseHInDPat<ValueType DstVT, ValueType SrcVT, 3276 RegisterClass DstRC> : 3277 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 3278 3279class MSABitconvertReverseWInDPat<ValueType DstVT, ValueType SrcVT, 3280 RegisterClass DstRC> : 3281 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_W, MSA128W>; 3282 3283def : MSABitconvertReverseBInHPat<v8i16, v16i8, MSA128H>; 3284def : MSABitconvertReverseBInHPat<v8f16, v16i8, MSA128H>; 3285def : MSABitconvertReverseBInWPat<v4i32, v16i8, MSA128W>; 3286def : MSABitconvertReverseBInWPat<v4f32, v16i8, MSA128W>; 3287def : MSABitconvertReverseBInDPat<v2i64, v16i8, MSA128D>; 3288def : MSABitconvertReverseBInDPat<v2f64, v16i8, MSA128D>; 3289 3290def : MSABitconvertReverseBInHPat<v16i8, v8i16, MSA128B>; 3291def : MSABitconvertReverseHInWPat<v4i32, v8i16, MSA128W>; 3292def : MSABitconvertReverseHInWPat<v4f32, v8i16, MSA128W>; 3293def : MSABitconvertReverseHInDPat<v2i64, v8i16, MSA128D>; 3294def : MSABitconvertReverseHInDPat<v2f64, v8i16, MSA128D>; 3295 3296def : MSABitconvertReverseBInHPat<v16i8, v8f16, MSA128B>; 3297def : MSABitconvertReverseHInWPat<v4i32, v8f16, MSA128W>; 3298def : MSABitconvertReverseHInWPat<v4f32, v8f16, MSA128W>; 3299def : MSABitconvertReverseHInDPat<v2i64, v8f16, MSA128D>; 3300def : MSABitconvertReverseHInDPat<v2f64, v8f16, MSA128D>; 3301 3302def : MSABitconvertReverseBInWPat<v16i8, v4i32, MSA128B>; 3303def : MSABitconvertReverseHInWPat<v8i16, v4i32, MSA128H>; 3304def : MSABitconvertReverseHInWPat<v8f16, v4i32, MSA128H>; 3305def : MSABitconvertReverseWInDPat<v2i64, v4i32, MSA128D>; 3306def : MSABitconvertReverseWInDPat<v2f64, v4i32, MSA128D>; 3307 3308def : MSABitconvertReverseBInWPat<v16i8, v4f32, MSA128B>; 3309def : MSABitconvertReverseHInWPat<v8i16, v4f32, MSA128H>; 3310def : MSABitconvertReverseHInWPat<v8f16, v4f32, MSA128H>; 3311def : MSABitconvertReverseWInDPat<v2i64, v4f32, MSA128D>; 3312def : MSABitconvertReverseWInDPat<v2f64, v4f32, MSA128D>; 3313 3314def : MSABitconvertReverseBInDPat<v16i8, v2i64, MSA128B>; 3315def : MSABitconvertReverseHInDPat<v8i16, v2i64, MSA128H>; 3316def : MSABitconvertReverseHInDPat<v8f16, v2i64, MSA128H>; 3317def : MSABitconvertReverseWInDPat<v4i32, v2i64, MSA128W>; 3318def : MSABitconvertReverseWInDPat<v4f32, v2i64, MSA128W>; 3319 3320def : MSABitconvertReverseBInDPat<v16i8, v2f64, MSA128B>; 3321def : MSABitconvertReverseHInDPat<v8i16, v2f64, MSA128H>; 3322def : MSABitconvertReverseHInDPat<v8f16, v2f64, MSA128H>; 3323def : MSABitconvertReverseWInDPat<v4i32, v2f64, MSA128W>; 3324def : MSABitconvertReverseWInDPat<v4f32, v2f64, MSA128W>; 3325 3326// Pseudos used to implement BNZ.df, and BZ.df 3327 3328class MSA_CBRANCH_PSEUDO_DESC_BASE<SDPatternOperator OpNode, ValueType TyNode, 3329 RegisterClass RCWS, 3330 InstrItinClass itin = NoItinerary> : 3331 MipsPseudo<(outs GPR32:$dst), 3332 (ins RCWS:$ws), 3333 [(set GPR32:$dst, (OpNode (TyNode RCWS:$ws)))]> { 3334 bit usesCustomInserter = 1; 3335} 3336 3337def SNZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v16i8, 3338 MSA128B, NoItinerary>; 3339def SNZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v8i16, 3340 MSA128H, NoItinerary>; 3341def SNZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v4i32, 3342 MSA128W, NoItinerary>; 3343def SNZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v2i64, 3344 MSA128D, NoItinerary>; 3345def SNZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyNonZero, v16i8, 3346 MSA128B, NoItinerary>; 3347 3348def SZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v16i8, 3349 MSA128B, NoItinerary>; 3350def SZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v8i16, 3351 MSA128H, NoItinerary>; 3352def SZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v4i32, 3353 MSA128W, NoItinerary>; 3354def SZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v2i64, 3355 MSA128D, NoItinerary>; 3356def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8, 3357 MSA128B, NoItinerary>; 3358