MipsMSAInstrInfo.td revision db8a16252b9d29bd7a3442d5c3bad0398dd85908
1//===- MipsMSAInstrInfo.td - MSA ASE instructions -*- tablegen ------------*-=// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file describes Mips MSA ASE instructions. 11// 12//===----------------------------------------------------------------------===// 13 14def SDT_MipsVecCond : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisVec<1>]>; 15def SDT_VSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>, 16 SDTCisInt<1>, 17 SDTCisSameAs<1, 2>, 18 SDTCisVT<3, OtherVT>]>; 19def SDT_VFSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>, 20 SDTCisFP<1>, 21 SDTCisSameAs<1, 2>, 22 SDTCisVT<3, OtherVT>]>; 23def SDT_VSHF : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisVec<0>, 24 SDTCisInt<1>, SDTCisVec<1>, 25 SDTCisSameAs<0, 2>, SDTCisSameAs<2, 3>]>; 26def SDT_SHF : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>, 27 SDTCisVT<1, i32>, SDTCisSameAs<0, 2>]>; 28def SDT_ILV : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>, 29 SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>]>; 30 31def MipsVAllNonZero : SDNode<"MipsISD::VALL_NONZERO", SDT_MipsVecCond>; 32def MipsVAnyNonZero : SDNode<"MipsISD::VANY_NONZERO", SDT_MipsVecCond>; 33def MipsVAllZero : SDNode<"MipsISD::VALL_ZERO", SDT_MipsVecCond>; 34def MipsVAnyZero : SDNode<"MipsISD::VANY_ZERO", SDT_MipsVecCond>; 35def MipsVSMax : SDNode<"MipsISD::VSMAX", SDTIntBinOp, 36 [SDNPCommutative, SDNPAssociative]>; 37def MipsVSMin : SDNode<"MipsISD::VSMIN", SDTIntBinOp, 38 [SDNPCommutative, SDNPAssociative]>; 39def MipsVUMax : SDNode<"MipsISD::VUMAX", SDTIntBinOp, 40 [SDNPCommutative, SDNPAssociative]>; 41def MipsVUMin : SDNode<"MipsISD::VUMIN", SDTIntBinOp, 42 [SDNPCommutative, SDNPAssociative]>; 43def MipsVNOR : SDNode<"MipsISD::VNOR", SDTIntBinOp, 44 [SDNPCommutative, SDNPAssociative]>; 45def MipsVSHF : SDNode<"MipsISD::VSHF", SDT_VSHF>; 46def MipsSHF : SDNode<"MipsISD::SHF", SDT_SHF>; 47def MipsILVEV : SDNode<"MipsISD::ILVEV", SDT_ILV>; 48def MipsILVOD : SDNode<"MipsISD::ILVOD", SDT_ILV>; 49def MipsILVL : SDNode<"MipsISD::ILVL", SDT_ILV>; 50def MipsILVR : SDNode<"MipsISD::ILVR", SDT_ILV>; 51def MipsPCKEV : SDNode<"MipsISD::PCKEV", SDT_ILV>; 52def MipsPCKOD : SDNode<"MipsISD::PCKOD", SDT_ILV>; 53 54def vsetcc : SDNode<"ISD::SETCC", SDT_VSetCC>; 55def vfsetcc : SDNode<"ISD::SETCC", SDT_VFSetCC>; 56 57def MipsVExtractSExt : SDNode<"MipsISD::VEXTRACT_SEXT_ELT", 58 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 59def MipsVExtractZExt : SDNode<"MipsISD::VEXTRACT_ZEXT_ELT", 60 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 61 62// Operands 63 64def uimm3 : Operand<i32> { 65 let PrintMethod = "printUnsignedImm"; 66} 67 68def uimm4 : Operand<i32> { 69 let PrintMethod = "printUnsignedImm"; 70} 71 72def uimm8 : Operand<i32> { 73 let PrintMethod = "printUnsignedImm"; 74} 75 76def simm5 : Operand<i32>; 77 78def simm10 : Operand<i32>; 79 80def vsplat_uimm1 : Operand<vAny> { 81 let PrintMethod = "printUnsignedImm8"; 82} 83 84def vsplat_uimm2 : Operand<vAny> { 85 let PrintMethod = "printUnsignedImm8"; 86} 87 88def vsplat_uimm3 : Operand<vAny> { 89 let PrintMethod = "printUnsignedImm"; 90} 91 92def vsplat_uimm4 : Operand<vAny> { 93 let PrintMethod = "printUnsignedImm"; 94} 95 96def vsplat_uimm5 : Operand<vAny> { 97 let PrintMethod = "printUnsignedImm"; 98} 99 100def vsplat_uimm6 : Operand<vAny> { 101 let PrintMethod = "printUnsignedImm"; 102} 103 104def vsplat_uimm8 : Operand<vAny> { 105 let PrintMethod = "printUnsignedImm"; 106} 107 108def vsplat_simm5 : Operand<vAny>; 109 110def vsplat_simm10 : Operand<vAny>; 111 112// Pattern fragments 113def vextract_sext_i8 : PatFrag<(ops node:$vec, node:$idx), 114 (MipsVExtractSExt node:$vec, node:$idx, i8)>; 115def vextract_sext_i16 : PatFrag<(ops node:$vec, node:$idx), 116 (MipsVExtractSExt node:$vec, node:$idx, i16)>; 117def vextract_sext_i32 : PatFrag<(ops node:$vec, node:$idx), 118 (MipsVExtractSExt node:$vec, node:$idx, i32)>; 119 120def vextract_zext_i8 : PatFrag<(ops node:$vec, node:$idx), 121 (MipsVExtractZExt node:$vec, node:$idx, i8)>; 122def vextract_zext_i16 : PatFrag<(ops node:$vec, node:$idx), 123 (MipsVExtractZExt node:$vec, node:$idx, i16)>; 124def vextract_zext_i32 : PatFrag<(ops node:$vec, node:$idx), 125 (MipsVExtractZExt node:$vec, node:$idx, i32)>; 126 127def vinsert_v16i8 : PatFrag<(ops node:$vec, node:$val, node:$idx), 128 (v16i8 (vector_insert node:$vec, node:$val, node:$idx))>; 129def vinsert_v8i16 : PatFrag<(ops node:$vec, node:$val, node:$idx), 130 (v8i16 (vector_insert node:$vec, node:$val, node:$idx))>; 131def vinsert_v4i32 : PatFrag<(ops node:$vec, node:$val, node:$idx), 132 (v4i32 (vector_insert node:$vec, node:$val, node:$idx))>; 133 134class vfsetcc_type<ValueType ResTy, ValueType OpTy, CondCode CC> : 135 PatFrag<(ops node:$lhs, node:$rhs), 136 (ResTy (vfsetcc (OpTy node:$lhs), (OpTy node:$rhs), CC))>; 137 138// ISD::SETFALSE cannot occur 139def vfsetoeq_v4f32 : vfsetcc_type<v4i32, v4f32, SETOEQ>; 140def vfsetoeq_v2f64 : vfsetcc_type<v2i64, v2f64, SETOEQ>; 141def vfsetoge_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGE>; 142def vfsetoge_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGE>; 143def vfsetogt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGT>; 144def vfsetogt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGT>; 145def vfsetole_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLE>; 146def vfsetole_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLE>; 147def vfsetolt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLT>; 148def vfsetolt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLT>; 149def vfsetone_v4f32 : vfsetcc_type<v4i32, v4f32, SETONE>; 150def vfsetone_v2f64 : vfsetcc_type<v2i64, v2f64, SETONE>; 151def vfsetord_v4f32 : vfsetcc_type<v4i32, v4f32, SETO>; 152def vfsetord_v2f64 : vfsetcc_type<v2i64, v2f64, SETO>; 153def vfsetun_v4f32 : vfsetcc_type<v4i32, v4f32, SETUO>; 154def vfsetun_v2f64 : vfsetcc_type<v2i64, v2f64, SETUO>; 155def vfsetueq_v4f32 : vfsetcc_type<v4i32, v4f32, SETUEQ>; 156def vfsetueq_v2f64 : vfsetcc_type<v2i64, v2f64, SETUEQ>; 157def vfsetuge_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGE>; 158def vfsetuge_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGE>; 159def vfsetugt_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGT>; 160def vfsetugt_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGT>; 161def vfsetule_v4f32 : vfsetcc_type<v4i32, v4f32, SETULE>; 162def vfsetule_v2f64 : vfsetcc_type<v2i64, v2f64, SETULE>; 163def vfsetult_v4f32 : vfsetcc_type<v4i32, v4f32, SETULT>; 164def vfsetult_v2f64 : vfsetcc_type<v2i64, v2f64, SETULT>; 165def vfsetune_v4f32 : vfsetcc_type<v4i32, v4f32, SETUNE>; 166def vfsetune_v2f64 : vfsetcc_type<v2i64, v2f64, SETUNE>; 167// ISD::SETTRUE cannot occur 168// ISD::SETFALSE2 cannot occur 169// ISD::SETTRUE2 cannot occur 170 171class vsetcc_type<ValueType ResTy, CondCode CC> : 172 PatFrag<(ops node:$lhs, node:$rhs), 173 (ResTy (vsetcc node:$lhs, node:$rhs, CC))>; 174 175def vseteq_v16i8 : vsetcc_type<v16i8, SETEQ>; 176def vseteq_v8i16 : vsetcc_type<v8i16, SETEQ>; 177def vseteq_v4i32 : vsetcc_type<v4i32, SETEQ>; 178def vseteq_v2i64 : vsetcc_type<v2i64, SETEQ>; 179def vsetle_v16i8 : vsetcc_type<v16i8, SETLE>; 180def vsetle_v8i16 : vsetcc_type<v8i16, SETLE>; 181def vsetle_v4i32 : vsetcc_type<v4i32, SETLE>; 182def vsetle_v2i64 : vsetcc_type<v2i64, SETLE>; 183def vsetlt_v16i8 : vsetcc_type<v16i8, SETLT>; 184def vsetlt_v8i16 : vsetcc_type<v8i16, SETLT>; 185def vsetlt_v4i32 : vsetcc_type<v4i32, SETLT>; 186def vsetlt_v2i64 : vsetcc_type<v2i64, SETLT>; 187def vsetule_v16i8 : vsetcc_type<v16i8, SETULE>; 188def vsetule_v8i16 : vsetcc_type<v8i16, SETULE>; 189def vsetule_v4i32 : vsetcc_type<v4i32, SETULE>; 190def vsetule_v2i64 : vsetcc_type<v2i64, SETULE>; 191def vsetult_v16i8 : vsetcc_type<v16i8, SETULT>; 192def vsetult_v8i16 : vsetcc_type<v8i16, SETULT>; 193def vsetult_v4i32 : vsetcc_type<v4i32, SETULT>; 194def vsetult_v2i64 : vsetcc_type<v2i64, SETULT>; 195 196def vsplati8 : PatFrag<(ops node:$e0), 197 (v16i8 (build_vector node:$e0, node:$e0, 198 node:$e0, node:$e0, 199 node:$e0, node:$e0, 200 node:$e0, node:$e0, 201 node:$e0, node:$e0, 202 node:$e0, node:$e0, 203 node:$e0, node:$e0, 204 node:$e0, node:$e0))>; 205def vsplati16 : PatFrag<(ops node:$e0), 206 (v8i16 (build_vector node:$e0, node:$e0, 207 node:$e0, node:$e0, 208 node:$e0, node:$e0, 209 node:$e0, node:$e0))>; 210def vsplati32 : PatFrag<(ops node:$e0), 211 (v4i32 (build_vector node:$e0, node:$e0, 212 node:$e0, node:$e0))>; 213def vsplati64 : PatFrag<(ops node:$e0), 214 (v2i64 (build_vector:$v0 node:$e0, node:$e0))>; 215def vsplatf32 : PatFrag<(ops node:$e0), 216 (v4f32 (build_vector node:$e0, node:$e0, 217 node:$e0, node:$e0))>; 218def vsplatf64 : PatFrag<(ops node:$e0), 219 (v2f64 (build_vector node:$e0, node:$e0))>; 220 221class SplatPatLeaf<Operand opclass, dag frag, code pred = [{}], 222 SDNodeXForm xform = NOOP_SDNodeXForm> 223 : PatLeaf<frag, pred, xform> { 224 Operand OpClass = opclass; 225} 226 227class SplatComplexPattern<Operand opclass, ValueType ty, int numops, string fn, 228 list<SDNode> roots = [], 229 list<SDNodeProperty> props = []> : 230 ComplexPattern<ty, numops, fn, roots, props> { 231 Operand OpClass = opclass; 232} 233 234def vsplati8_uimm3 : SplatComplexPattern<vsplat_uimm3, v16i8, 1, 235 "selectVSplatUimm3", 236 [build_vector, bitconvert]>; 237 238def vsplati8_uimm4 : SplatComplexPattern<vsplat_uimm4, v16i8, 1, 239 "selectVSplatUimm4", 240 [build_vector, bitconvert]>; 241 242def vsplati8_uimm5 : SplatComplexPattern<vsplat_uimm5, v16i8, 1, 243 "selectVSplatUimm5", 244 [build_vector, bitconvert]>; 245 246def vsplati8_uimm8 : SplatComplexPattern<vsplat_uimm8, v16i8, 1, 247 "selectVSplatUimm8", 248 [build_vector, bitconvert]>; 249 250def vsplati8_simm5 : SplatComplexPattern<vsplat_simm5, v16i8, 1, 251 "selectVSplatSimm5", 252 [build_vector, bitconvert]>; 253 254def vsplati16_uimm3 : SplatComplexPattern<vsplat_uimm3, v8i16, 1, 255 "selectVSplatUimm3", 256 [build_vector, bitconvert]>; 257 258def vsplati16_uimm4 : SplatComplexPattern<vsplat_uimm4, v8i16, 1, 259 "selectVSplatUimm4", 260 [build_vector, bitconvert]>; 261 262def vsplati16_uimm5 : SplatComplexPattern<vsplat_uimm5, v8i16, 1, 263 "selectVSplatUimm5", 264 [build_vector, bitconvert]>; 265 266def vsplati16_simm5 : SplatComplexPattern<vsplat_simm5, v8i16, 1, 267 "selectVSplatSimm5", 268 [build_vector, bitconvert]>; 269 270def vsplati32_uimm2 : SplatComplexPattern<vsplat_uimm2, v4i32, 1, 271 "selectVSplatUimm2", 272 [build_vector, bitconvert]>; 273 274def vsplati32_uimm5 : SplatComplexPattern<vsplat_uimm5, v4i32, 1, 275 "selectVSplatUimm5", 276 [build_vector, bitconvert]>; 277 278def vsplati32_simm5 : SplatComplexPattern<vsplat_simm5, v4i32, 1, 279 "selectVSplatSimm5", 280 [build_vector, bitconvert]>; 281 282def vsplati64_uimm1 : SplatComplexPattern<vsplat_uimm1, v2i64, 1, 283 "selectVSplatUimm1", 284 [build_vector, bitconvert]>; 285 286def vsplati64_uimm5 : SplatComplexPattern<vsplat_uimm5, v2i64, 1, 287 "selectVSplatUimm5", 288 [build_vector, bitconvert]>; 289 290def vsplati64_uimm6 : SplatComplexPattern<vsplat_uimm6, v2i64, 1, 291 "selectVSplatUimm6", 292 [build_vector, bitconvert]>; 293 294def vsplati64_simm5 : SplatComplexPattern<vsplat_simm5, v2i64, 1, 295 "selectVSplatSimm5", 296 [build_vector, bitconvert]>; 297 298// Any build_vector that is a constant splat with a value that is an exact 299// power of 2 300def vsplat_uimm_pow2 : ComplexPattern<vAny, 1, "selectVSplatUimmPow2", 301 [build_vector, bitconvert]>; 302 303def fms : PatFrag<(ops node:$wd, node:$ws, node:$wt), 304 (fsub node:$wd, (fmul node:$ws, node:$wt))>; 305 306def muladd : PatFrag<(ops node:$wd, node:$ws, node:$wt), 307 (add node:$wd, (mul node:$ws, node:$wt))>; 308 309def mulsub : PatFrag<(ops node:$wd, node:$ws, node:$wt), 310 (sub node:$wd, (mul node:$ws, node:$wt))>; 311 312// Immediates 313def immSExt5 : ImmLeaf<i32, [{return isInt<5>(Imm);}]>; 314def immSExt10: ImmLeaf<i32, [{return isInt<10>(Imm);}]>; 315 316// Instruction encoding. 317class ADD_A_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010000>; 318class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>; 319class ADD_A_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010000>; 320class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>; 321 322class ADDS_A_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010000>; 323class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>; 324class ADDS_A_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010000>; 325class ADDS_A_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010000>; 326 327class ADDS_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010000>; 328class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>; 329class ADDS_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010000>; 330class ADDS_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010000>; 331 332class ADDS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010000>; 333class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>; 334class ADDS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010000>; 335class ADDS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010000>; 336 337class ADDV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001110>; 338class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>; 339class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>; 340class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>; 341 342class ADDVI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000110>; 343class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>; 344class ADDVI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000110>; 345class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>; 346 347class AND_V_ENC : MSA_VEC_FMT<0b00000, 0b011110>; 348 349class ANDI_B_ENC : MSA_I8_FMT<0b00, 0b000000>; 350 351class ASUB_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010001>; 352class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>; 353class ASUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010001>; 354class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>; 355 356class ASUB_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010001>; 357class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>; 358class ASUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010001>; 359class ASUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010001>; 360 361class AVE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010000>; 362class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>; 363class AVE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010000>; 364class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>; 365 366class AVE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010000>; 367class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>; 368class AVE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010000>; 369class AVE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010000>; 370 371class AVER_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010000>; 372class AVER_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010000>; 373class AVER_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010000>; 374class AVER_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010000>; 375 376class AVER_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010000>; 377class AVER_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010000>; 378class AVER_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010000>; 379class AVER_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010000>; 380 381class BCLR_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001101>; 382class BCLR_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001101>; 383class BCLR_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001101>; 384class BCLR_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001101>; 385 386class BCLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001001>; 387class BCLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001001>; 388class BCLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001001>; 389class BCLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001001>; 390 391class BINSL_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001101>; 392class BINSL_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001101>; 393class BINSL_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001101>; 394class BINSL_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001101>; 395 396class BINSLI_B_ENC : MSA_BIT_B_FMT<0b110, 0b001001>; 397class BINSLI_H_ENC : MSA_BIT_H_FMT<0b110, 0b001001>; 398class BINSLI_W_ENC : MSA_BIT_W_FMT<0b110, 0b001001>; 399class BINSLI_D_ENC : MSA_BIT_D_FMT<0b110, 0b001001>; 400 401class BINSR_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001101>; 402class BINSR_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001101>; 403class BINSR_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001101>; 404class BINSR_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001101>; 405 406class BINSRI_B_ENC : MSA_BIT_B_FMT<0b111, 0b001001>; 407class BINSRI_H_ENC : MSA_BIT_H_FMT<0b111, 0b001001>; 408class BINSRI_W_ENC : MSA_BIT_W_FMT<0b111, 0b001001>; 409class BINSRI_D_ENC : MSA_BIT_D_FMT<0b111, 0b001001>; 410 411class BMNZ_V_ENC : MSA_VEC_FMT<0b00100, 0b011110>; 412 413class BMNZI_B_ENC : MSA_I8_FMT<0b00, 0b000001>; 414 415class BMZ_V_ENC : MSA_VEC_FMT<0b00101, 0b011110>; 416 417class BMZI_B_ENC : MSA_I8_FMT<0b01, 0b000001>; 418 419class BNEG_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001101>; 420class BNEG_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001101>; 421class BNEG_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001101>; 422class BNEG_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001101>; 423 424class BNEGI_B_ENC : MSA_BIT_B_FMT<0b101, 0b001001>; 425class BNEGI_H_ENC : MSA_BIT_H_FMT<0b101, 0b001001>; 426class BNEGI_W_ENC : MSA_BIT_W_FMT<0b101, 0b001001>; 427class BNEGI_D_ENC : MSA_BIT_D_FMT<0b101, 0b001001>; 428 429class BNZ_B_ENC : MSA_I10_FMT<0b000, 0b00, 0b001100>; 430class BNZ_H_ENC : MSA_I10_FMT<0b000, 0b01, 0b001100>; 431class BNZ_W_ENC : MSA_I10_FMT<0b000, 0b10, 0b001100>; 432class BNZ_D_ENC : MSA_I10_FMT<0b000, 0b11, 0b001100>; 433 434class BNZ_V_ENC : MSA_VEC_FMT<0b01000, 0b011110>; 435 436class BSEL_V_ENC : MSA_VEC_FMT<0b00110, 0b011110>; 437 438class BSELI_B_ENC : MSA_I8_FMT<0b10, 0b000001>; 439 440class BSET_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001101>; 441class BSET_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001101>; 442class BSET_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001101>; 443class BSET_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001101>; 444 445class BSETI_B_ENC : MSA_BIT_B_FMT<0b100, 0b001001>; 446class BSETI_H_ENC : MSA_BIT_H_FMT<0b100, 0b001001>; 447class BSETI_W_ENC : MSA_BIT_W_FMT<0b100, 0b001001>; 448class BSETI_D_ENC : MSA_BIT_D_FMT<0b100, 0b001001>; 449 450class BZ_B_ENC : MSA_I10_FMT<0b001, 0b00, 0b001100>; 451class BZ_H_ENC : MSA_I10_FMT<0b001, 0b01, 0b001100>; 452class BZ_W_ENC : MSA_I10_FMT<0b001, 0b10, 0b001100>; 453class BZ_D_ENC : MSA_I10_FMT<0b001, 0b11, 0b001100>; 454 455class BZ_V_ENC : MSA_VECS10_FMT<0b01001, 0b011110>; 456 457class CEQ_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001111>; 458class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>; 459class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>; 460class CEQ_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001111>; 461 462class CEQI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000111>; 463class CEQI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000111>; 464class CEQI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000111>; 465class CEQI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000111>; 466 467class CFCMSA_ENC : MSA_ELM_FMT<0b0001111110, 0b011001>; 468 469class CLE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001111>; 470class CLE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001111>; 471class CLE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001111>; 472class CLE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001111>; 473 474class CLE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001111>; 475class CLE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001111>; 476class CLE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001111>; 477class CLE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001111>; 478 479class CLEI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000111>; 480class CLEI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000111>; 481class CLEI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000111>; 482class CLEI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000111>; 483 484class CLEI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000111>; 485class CLEI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000111>; 486class CLEI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000111>; 487class CLEI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000111>; 488 489class CLT_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001111>; 490class CLT_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001111>; 491class CLT_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001111>; 492class CLT_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001111>; 493 494class CLT_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001111>; 495class CLT_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001111>; 496class CLT_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001111>; 497class CLT_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001111>; 498 499class CLTI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000111>; 500class CLTI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000111>; 501class CLTI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000111>; 502class CLTI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000111>; 503 504class CLTI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000111>; 505class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>; 506class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>; 507class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>; 508 509class COPY_S_B_ENC : MSA_ELM_COPY_B_FMT<0b0010, 0b011001>; 510class COPY_S_H_ENC : MSA_ELM_COPY_H_FMT<0b0010, 0b011001>; 511class COPY_S_W_ENC : MSA_ELM_COPY_W_FMT<0b0010, 0b011001>; 512 513class COPY_U_B_ENC : MSA_ELM_COPY_B_FMT<0b0011, 0b011001>; 514class COPY_U_H_ENC : MSA_ELM_COPY_H_FMT<0b0011, 0b011001>; 515class COPY_U_W_ENC : MSA_ELM_COPY_W_FMT<0b0011, 0b011001>; 516 517class CTCMSA_ENC : MSA_ELM_FMT<0b0000111110, 0b011001>; 518 519class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>; 520class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>; 521class DIV_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010010>; 522class DIV_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010010>; 523 524class DIV_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010010>; 525class DIV_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010010>; 526class DIV_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010010>; 527class DIV_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010010>; 528 529class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>; 530class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>; 531class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>; 532 533class DOTP_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010011>; 534class DOTP_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010011>; 535class DOTP_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010011>; 536 537class DPADD_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010011>; 538class DPADD_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010011>; 539class DPADD_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010011>; 540 541class DPADD_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010011>; 542class DPADD_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010011>; 543class DPADD_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010011>; 544 545class DPSUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010011>; 546class DPSUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010011>; 547class DPSUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010011>; 548 549class DPSUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010011>; 550class DPSUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010011>; 551class DPSUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010011>; 552 553class FADD_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011011>; 554class FADD_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011011>; 555 556class FCAF_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011010>; 557class FCAF_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011010>; 558 559class FCEQ_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011010>; 560class FCEQ_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011010>; 561 562class FCLASS_W_ENC : MSA_2RF_FMT<0b110010000, 0b0, 0b011110>; 563class FCLASS_D_ENC : MSA_2RF_FMT<0b110010000, 0b1, 0b011110>; 564 565class FCLE_W_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011010>; 566class FCLE_D_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011010>; 567 568class FCLT_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011010>; 569class FCLT_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011010>; 570 571class FCNE_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011100>; 572class FCNE_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011100>; 573 574class FCOR_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011100>; 575class FCOR_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011100>; 576 577class FCUEQ_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011010>; 578class FCUEQ_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011010>; 579 580class FCULE_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011010>; 581class FCULE_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011010>; 582 583class FCULT_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011010>; 584class FCULT_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011010>; 585 586class FCUN_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011010>; 587class FCUN_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011010>; 588 589class FCUNE_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011100>; 590class FCUNE_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011100>; 591 592class FDIV_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011011>; 593class FDIV_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011011>; 594 595class FEXDO_H_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011011>; 596class FEXDO_W_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011011>; 597 598class FEXP2_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011011>; 599class FEXP2_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011011>; 600 601class FEXUPL_W_ENC : MSA_2RF_FMT<0b110011000, 0b0, 0b011110>; 602class FEXUPL_D_ENC : MSA_2RF_FMT<0b110011000, 0b1, 0b011110>; 603 604class FEXUPR_W_ENC : MSA_2RF_FMT<0b110011001, 0b0, 0b011110>; 605class FEXUPR_D_ENC : MSA_2RF_FMT<0b110011001, 0b1, 0b011110>; 606 607class FFINT_S_W_ENC : MSA_2RF_FMT<0b110011110, 0b0, 0b011110>; 608class FFINT_S_D_ENC : MSA_2RF_FMT<0b110011110, 0b1, 0b011110>; 609 610class FFINT_U_W_ENC : MSA_2RF_FMT<0b110011111, 0b0, 0b011110>; 611class FFINT_U_D_ENC : MSA_2RF_FMT<0b110011111, 0b1, 0b011110>; 612 613class FFQL_W_ENC : MSA_2RF_FMT<0b110011010, 0b0, 0b011110>; 614class FFQL_D_ENC : MSA_2RF_FMT<0b110011010, 0b1, 0b011110>; 615 616class FFQR_W_ENC : MSA_2RF_FMT<0b110011011, 0b0, 0b011110>; 617class FFQR_D_ENC : MSA_2RF_FMT<0b110011011, 0b1, 0b011110>; 618 619class FILL_B_ENC : MSA_2R_FILL_FMT<0b11000000, 0b00, 0b011110>; 620class FILL_H_ENC : MSA_2R_FILL_FMT<0b11000000, 0b01, 0b011110>; 621class FILL_W_ENC : MSA_2R_FILL_FMT<0b11000000, 0b10, 0b011110>; 622 623class FLOG2_W_ENC : MSA_2RF_FMT<0b110010111, 0b0, 0b011110>; 624class FLOG2_D_ENC : MSA_2RF_FMT<0b110010111, 0b1, 0b011110>; 625 626class FMADD_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011011>; 627class FMADD_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011011>; 628 629class FMAX_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011011>; 630class FMAX_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011011>; 631 632class FMAX_A_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011011>; 633class FMAX_A_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011011>; 634 635class FMIN_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011011>; 636class FMIN_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011011>; 637 638class FMIN_A_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011011>; 639class FMIN_A_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011011>; 640 641class FMSUB_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011011>; 642class FMSUB_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011011>; 643 644class FMUL_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011011>; 645class FMUL_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011011>; 646 647class FRINT_W_ENC : MSA_2RF_FMT<0b110010110, 0b0, 0b011110>; 648class FRINT_D_ENC : MSA_2RF_FMT<0b110010110, 0b1, 0b011110>; 649 650class FRCP_W_ENC : MSA_2RF_FMT<0b110010101, 0b0, 0b011110>; 651class FRCP_D_ENC : MSA_2RF_FMT<0b110010101, 0b1, 0b011110>; 652 653class FRSQRT_W_ENC : MSA_2RF_FMT<0b110010100, 0b0, 0b011110>; 654class FRSQRT_D_ENC : MSA_2RF_FMT<0b110010100, 0b1, 0b011110>; 655 656class FSAF_W_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011010>; 657class FSAF_D_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011010>; 658 659class FSEQ_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011010>; 660class FSEQ_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011010>; 661 662class FSLE_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011010>; 663class FSLE_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011010>; 664 665class FSLT_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011010>; 666class FSLT_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011010>; 667 668class FSNE_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011100>; 669class FSNE_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011100>; 670 671class FSOR_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011100>; 672class FSOR_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011100>; 673 674class FSQRT_W_ENC : MSA_2RF_FMT<0b110010011, 0b0, 0b011110>; 675class FSQRT_D_ENC : MSA_2RF_FMT<0b110010011, 0b1, 0b011110>; 676 677class FSUB_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011011>; 678class FSUB_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011011>; 679 680class FSUEQ_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011010>; 681class FSUEQ_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011010>; 682 683class FSULE_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011010>; 684class FSULE_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011010>; 685 686class FSULT_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011010>; 687class FSULT_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011010>; 688 689class FSUN_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011010>; 690class FSUN_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011010>; 691 692class FSUNE_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011100>; 693class FSUNE_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011100>; 694 695class FTINT_S_W_ENC : MSA_2RF_FMT<0b110011100, 0b0, 0b011110>; 696class FTINT_S_D_ENC : MSA_2RF_FMT<0b110011100, 0b1, 0b011110>; 697 698class FTINT_U_W_ENC : MSA_2RF_FMT<0b110011101, 0b0, 0b011110>; 699class FTINT_U_D_ENC : MSA_2RF_FMT<0b110011101, 0b1, 0b011110>; 700 701class FTQ_H_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011011>; 702class FTQ_W_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011011>; 703 704class FTRUNC_S_W_ENC : MSA_2RF_FMT<0b110010001, 0b0, 0b011110>; 705class FTRUNC_S_D_ENC : MSA_2RF_FMT<0b110010001, 0b1, 0b011110>; 706 707class FTRUNC_U_W_ENC : MSA_2RF_FMT<0b110010010, 0b0, 0b011110>; 708class FTRUNC_U_D_ENC : MSA_2RF_FMT<0b110010010, 0b1, 0b011110>; 709 710class HADD_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010101>; 711class HADD_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010101>; 712class HADD_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010101>; 713 714class HADD_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010101>; 715class HADD_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010101>; 716class HADD_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010101>; 717 718class HSUB_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010101>; 719class HSUB_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010101>; 720class HSUB_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010101>; 721 722class HSUB_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010101>; 723class HSUB_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010101>; 724class HSUB_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010101>; 725 726class ILVEV_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010100>; 727class ILVEV_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010100>; 728class ILVEV_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010100>; 729class ILVEV_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010100>; 730 731class ILVL_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010100>; 732class ILVL_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010100>; 733class ILVL_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010100>; 734class ILVL_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010100>; 735 736class ILVOD_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010100>; 737class ILVOD_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010100>; 738class ILVOD_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010100>; 739class ILVOD_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010100>; 740 741class ILVR_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010100>; 742class ILVR_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010100>; 743class ILVR_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010100>; 744class ILVR_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010100>; 745 746class INSERT_B_ENC : MSA_ELM_INSERT_B_FMT<0b0100, 0b011001>; 747class INSERT_H_ENC : MSA_ELM_INSERT_H_FMT<0b0100, 0b011001>; 748class INSERT_W_ENC : MSA_ELM_INSERT_W_FMT<0b0100, 0b011001>; 749 750class INSVE_B_ENC : MSA_ELM_B_FMT<0b0101, 0b011001>; 751class INSVE_H_ENC : MSA_ELM_H_FMT<0b0101, 0b011001>; 752class INSVE_W_ENC : MSA_ELM_W_FMT<0b0101, 0b011001>; 753class INSVE_D_ENC : MSA_ELM_D_FMT<0b0101, 0b011001>; 754 755class LD_B_ENC : MSA_I5_FMT<0b110, 0b00, 0b000111>; 756class LD_H_ENC : MSA_I5_FMT<0b110, 0b01, 0b000111>; 757class LD_W_ENC : MSA_I5_FMT<0b110, 0b10, 0b000111>; 758class LD_D_ENC : MSA_I5_FMT<0b110, 0b11, 0b000111>; 759 760class LDI_B_ENC : MSA_I10_FMT<0b010, 0b00, 0b001100>; 761class LDI_H_ENC : MSA_I10_FMT<0b010, 0b01, 0b001100>; 762class LDI_W_ENC : MSA_I10_FMT<0b010, 0b10, 0b001100>; 763class LDI_D_ENC : MSA_I10_FMT<0b010, 0b11, 0b001100>; 764 765class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>; 766class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>; 767 768class MADDR_Q_H_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011100>; 769class MADDR_Q_W_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011100>; 770 771class MADDV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010010>; 772class MADDV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010010>; 773class MADDV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010010>; 774class MADDV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010010>; 775 776class MAX_A_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001110>; 777class MAX_A_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001110>; 778class MAX_A_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001110>; 779class MAX_A_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001110>; 780 781class MAX_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001110>; 782class MAX_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001110>; 783class MAX_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001110>; 784class MAX_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001110>; 785 786class MAX_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001110>; 787class MAX_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001110>; 788class MAX_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001110>; 789class MAX_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001110>; 790 791class MAXI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000110>; 792class MAXI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000110>; 793class MAXI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000110>; 794class MAXI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000110>; 795 796class MAXI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000110>; 797class MAXI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000110>; 798class MAXI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000110>; 799class MAXI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000110>; 800 801class MIN_A_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001110>; 802class MIN_A_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001110>; 803class MIN_A_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001110>; 804class MIN_A_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001110>; 805 806class MIN_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001110>; 807class MIN_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001110>; 808class MIN_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001110>; 809class MIN_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001110>; 810 811class MIN_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001110>; 812class MIN_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001110>; 813class MIN_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001110>; 814class MIN_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001110>; 815 816class MINI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000110>; 817class MINI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000110>; 818class MINI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000110>; 819class MINI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000110>; 820 821class MINI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000110>; 822class MINI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000110>; 823class MINI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000110>; 824class MINI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000110>; 825 826class MOD_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010010>; 827class MOD_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010010>; 828class MOD_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010010>; 829class MOD_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010010>; 830 831class MOD_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010010>; 832class MOD_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010010>; 833class MOD_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010010>; 834class MOD_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010010>; 835 836class MOVE_V_ENC : MSA_ELM_FMT<0b0010111110, 0b011001>; 837 838class MSUB_Q_H_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011100>; 839class MSUB_Q_W_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011100>; 840 841class MSUBR_Q_H_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011100>; 842class MSUBR_Q_W_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011100>; 843 844class MSUBV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010010>; 845class MSUBV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010010>; 846class MSUBV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010010>; 847class MSUBV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010010>; 848 849class MUL_Q_H_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011100>; 850class MUL_Q_W_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011100>; 851 852class MULR_Q_H_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011100>; 853class MULR_Q_W_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011100>; 854 855class MULV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010010>; 856class MULV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010010>; 857class MULV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010010>; 858class MULV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010010>; 859 860class NLOC_B_ENC : MSA_2R_FMT<0b11000010, 0b00, 0b011110>; 861class NLOC_H_ENC : MSA_2R_FMT<0b11000010, 0b01, 0b011110>; 862class NLOC_W_ENC : MSA_2R_FMT<0b11000010, 0b10, 0b011110>; 863class NLOC_D_ENC : MSA_2R_FMT<0b11000010, 0b11, 0b011110>; 864 865class NLZC_B_ENC : MSA_2R_FMT<0b11000011, 0b00, 0b011110>; 866class NLZC_H_ENC : MSA_2R_FMT<0b11000011, 0b01, 0b011110>; 867class NLZC_W_ENC : MSA_2R_FMT<0b11000011, 0b10, 0b011110>; 868class NLZC_D_ENC : MSA_2R_FMT<0b11000011, 0b11, 0b011110>; 869 870class NOR_V_ENC : MSA_VEC_FMT<0b00010, 0b011110>; 871 872class NORI_B_ENC : MSA_I8_FMT<0b10, 0b000000>; 873 874class OR_V_ENC : MSA_VEC_FMT<0b00001, 0b011110>; 875 876class ORI_B_ENC : MSA_I8_FMT<0b01, 0b000000>; 877 878class PCKEV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010100>; 879class PCKEV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010100>; 880class PCKEV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010100>; 881class PCKEV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010100>; 882 883class PCKOD_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010100>; 884class PCKOD_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010100>; 885class PCKOD_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010100>; 886class PCKOD_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010100>; 887 888class PCNT_B_ENC : MSA_2R_FMT<0b11000001, 0b00, 0b011110>; 889class PCNT_H_ENC : MSA_2R_FMT<0b11000001, 0b01, 0b011110>; 890class PCNT_W_ENC : MSA_2R_FMT<0b11000001, 0b10, 0b011110>; 891class PCNT_D_ENC : MSA_2R_FMT<0b11000001, 0b11, 0b011110>; 892 893class SAT_S_B_ENC : MSA_BIT_B_FMT<0b000, 0b001010>; 894class SAT_S_H_ENC : MSA_BIT_H_FMT<0b000, 0b001010>; 895class SAT_S_W_ENC : MSA_BIT_W_FMT<0b000, 0b001010>; 896class SAT_S_D_ENC : MSA_BIT_D_FMT<0b000, 0b001010>; 897 898class SAT_U_B_ENC : MSA_BIT_B_FMT<0b001, 0b001010>; 899class SAT_U_H_ENC : MSA_BIT_H_FMT<0b001, 0b001010>; 900class SAT_U_W_ENC : MSA_BIT_W_FMT<0b001, 0b001010>; 901class SAT_U_D_ENC : MSA_BIT_D_FMT<0b001, 0b001010>; 902 903class SHF_B_ENC : MSA_I8_FMT<0b00, 0b000010>; 904class SHF_H_ENC : MSA_I8_FMT<0b01, 0b000010>; 905class SHF_W_ENC : MSA_I8_FMT<0b10, 0b000010>; 906 907class SLD_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010100>; 908class SLD_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010100>; 909class SLD_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010100>; 910class SLD_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010100>; 911 912class SLDI_B_ENC : MSA_ELM_B_FMT<0b0000, 0b011001>; 913class SLDI_H_ENC : MSA_ELM_H_FMT<0b0000, 0b011001>; 914class SLDI_W_ENC : MSA_ELM_W_FMT<0b0000, 0b011001>; 915class SLDI_D_ENC : MSA_ELM_D_FMT<0b0000, 0b011001>; 916 917class SLL_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001101>; 918class SLL_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001101>; 919class SLL_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001101>; 920class SLL_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001101>; 921 922class SLLI_B_ENC : MSA_BIT_B_FMT<0b000, 0b001001>; 923class SLLI_H_ENC : MSA_BIT_H_FMT<0b000, 0b001001>; 924class SLLI_W_ENC : MSA_BIT_W_FMT<0b000, 0b001001>; 925class SLLI_D_ENC : MSA_BIT_D_FMT<0b000, 0b001001>; 926 927class SPLAT_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010100>; 928class SPLAT_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010100>; 929class SPLAT_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010100>; 930class SPLAT_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010100>; 931 932class SPLATI_B_ENC : MSA_ELM_B_FMT<0b0001, 0b011001>; 933class SPLATI_H_ENC : MSA_ELM_H_FMT<0b0001, 0b011001>; 934class SPLATI_W_ENC : MSA_ELM_W_FMT<0b0001, 0b011001>; 935class SPLATI_D_ENC : MSA_ELM_D_FMT<0b0001, 0b011001>; 936 937class SRA_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001101>; 938class SRA_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001101>; 939class SRA_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001101>; 940class SRA_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001101>; 941 942class SRAI_B_ENC : MSA_BIT_B_FMT<0b001, 0b001001>; 943class SRAI_H_ENC : MSA_BIT_H_FMT<0b001, 0b001001>; 944class SRAI_W_ENC : MSA_BIT_W_FMT<0b001, 0b001001>; 945class SRAI_D_ENC : MSA_BIT_D_FMT<0b001, 0b001001>; 946 947class SRAR_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010101>; 948class SRAR_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010101>; 949class SRAR_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010101>; 950class SRAR_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010101>; 951 952class SRARI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001010>; 953class SRARI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001010>; 954class SRARI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001010>; 955class SRARI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001010>; 956 957class SRL_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001101>; 958class SRL_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001101>; 959class SRL_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001101>; 960class SRL_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001101>; 961 962class SRLI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001001>; 963class SRLI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001001>; 964class SRLI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001001>; 965class SRLI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001001>; 966 967class SRLR_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010101>; 968class SRLR_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010101>; 969class SRLR_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010101>; 970class SRLR_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010101>; 971 972class SRLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001010>; 973class SRLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001010>; 974class SRLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001010>; 975class SRLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001010>; 976 977class ST_B_ENC : MSA_I5_FMT<0b111, 0b00, 0b000111>; 978class ST_H_ENC : MSA_I5_FMT<0b111, 0b01, 0b000111>; 979class ST_W_ENC : MSA_I5_FMT<0b111, 0b10, 0b000111>; 980class ST_D_ENC : MSA_I5_FMT<0b111, 0b11, 0b000111>; 981 982class SUBS_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010001>; 983class SUBS_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010001>; 984class SUBS_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010001>; 985class SUBS_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010001>; 986 987class SUBS_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010001>; 988class SUBS_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010001>; 989class SUBS_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010001>; 990class SUBS_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010001>; 991 992class SUBSUS_U_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010001>; 993class SUBSUS_U_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010001>; 994class SUBSUS_U_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010001>; 995class SUBSUS_U_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010001>; 996 997class SUBSUU_S_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010001>; 998class SUBSUU_S_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010001>; 999class SUBSUU_S_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010001>; 1000class SUBSUU_S_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010001>; 1001 1002class SUBV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001110>; 1003class SUBV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001110>; 1004class SUBV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001110>; 1005class SUBV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001110>; 1006 1007class SUBVI_B_ENC : MSA_I5_FMT<0b001, 0b00, 0b000110>; 1008class SUBVI_H_ENC : MSA_I5_FMT<0b001, 0b01, 0b000110>; 1009class SUBVI_W_ENC : MSA_I5_FMT<0b001, 0b10, 0b000110>; 1010class SUBVI_D_ENC : MSA_I5_FMT<0b001, 0b11, 0b000110>; 1011 1012class VSHF_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010101>; 1013class VSHF_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010101>; 1014class VSHF_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010101>; 1015class VSHF_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010101>; 1016 1017class XOR_V_ENC : MSA_VEC_FMT<0b00011, 0b011110>; 1018 1019class XORI_B_ENC : MSA_I8_FMT<0b11, 0b000000>; 1020 1021// Instruction desc. 1022class MSA_BIT_B_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1023 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1024 InstrItinClass itin = NoItinerary> { 1025 dag OutOperandList = (outs ROWD:$wd); 1026 dag InOperandList = (ins ROWS:$ws, uimm3:$m); 1027 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1028 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt3:$m))]; 1029 InstrItinClass Itinerary = itin; 1030} 1031 1032class MSA_BIT_H_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1033 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1034 InstrItinClass itin = NoItinerary> { 1035 dag OutOperandList = (outs ROWD:$wd); 1036 dag InOperandList = (ins ROWS:$ws, uimm4:$m); 1037 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1038 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt4:$m))]; 1039 InstrItinClass Itinerary = itin; 1040} 1041 1042class MSA_BIT_W_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1043 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1044 InstrItinClass itin = NoItinerary> { 1045 dag OutOperandList = (outs ROWD:$wd); 1046 dag InOperandList = (ins ROWS:$ws, uimm5:$m); 1047 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1048 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt5:$m))]; 1049 InstrItinClass Itinerary = itin; 1050} 1051 1052class MSA_BIT_D_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1053 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1054 InstrItinClass itin = NoItinerary> { 1055 dag OutOperandList = (outs ROWD:$wd); 1056 dag InOperandList = (ins ROWS:$ws, uimm6:$m); 1057 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1058 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt6:$m))]; 1059 InstrItinClass Itinerary = itin; 1060} 1061 1062class MSA_BIT_SPLAT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1063 SplatComplexPattern SplatImm, 1064 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1065 InstrItinClass itin = NoItinerary> { 1066 dag OutOperandList = (outs ROWD:$wd); 1067 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$m); 1068 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1069 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$m))]; 1070 InstrItinClass Itinerary = itin; 1071} 1072 1073class MSA_COPY_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1074 ValueType VecTy, RegisterOperand ROD, 1075 RegisterOperand ROWS, 1076 InstrItinClass itin = NoItinerary> { 1077 dag OutOperandList = (outs ROD:$rd); 1078 dag InOperandList = (ins ROWS:$ws, uimm4:$n); 1079 string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]"); 1080 list<dag> Pattern = [(set ROD:$rd, (OpNode (VecTy ROWS:$ws), immZExt4:$n))]; 1081 InstrItinClass Itinerary = itin; 1082} 1083 1084class MSA_ELM_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1085 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1086 InstrItinClass itin = NoItinerary> { 1087 dag OutOperandList = (outs ROWD:$wd); 1088 dag InOperandList = (ins ROWS:$ws, uimm4:$n); 1089 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$n]"); 1090 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt4:$n))]; 1091 InstrItinClass Itinerary = itin; 1092} 1093 1094class MSA_COPY_PSEUDO_BASE<SDPatternOperator OpNode, ValueType VecTy, 1095 RegisterClass RCD, RegisterClass RCWS> : 1096 MipsPseudo<(outs RCD:$wd), (ins RCWS:$ws, uimm4:$n), 1097 [(set RCD:$wd, (OpNode (VecTy RCWS:$ws), immZExt4:$n))]> { 1098 bit usesCustomInserter = 1; 1099} 1100 1101class MSA_I5_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1102 SplatComplexPattern SplatImm, RegisterOperand ROWD, 1103 RegisterOperand ROWS = ROWD, 1104 InstrItinClass itin = NoItinerary> { 1105 dag OutOperandList = (outs ROWD:$wd); 1106 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$imm); 1107 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $imm"); 1108 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$imm))]; 1109 InstrItinClass Itinerary = itin; 1110} 1111 1112class MSA_I8_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1113 SplatComplexPattern SplatImm, RegisterOperand ROWD, 1114 RegisterOperand ROWS = ROWD, 1115 InstrItinClass itin = NoItinerary> { 1116 dag OutOperandList = (outs ROWD:$wd); 1117 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$u8); 1118 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1119 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$u8))]; 1120 InstrItinClass Itinerary = itin; 1121} 1122 1123// This class is deprecated and will be removed in the next few patches 1124class MSA_I8_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1125 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1126 InstrItinClass itin = NoItinerary> { 1127 dag OutOperandList = (outs ROWD:$wd); 1128 dag InOperandList = (ins ROWS:$ws, uimm8:$u8); 1129 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1130 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt8:$u8))]; 1131 InstrItinClass Itinerary = itin; 1132} 1133 1134class MSA_I8_SHF_DESC_BASE<string instr_asm, RegisterOperand ROWD, 1135 RegisterOperand ROWS = ROWD, 1136 InstrItinClass itin = NoItinerary> { 1137 dag OutOperandList = (outs ROWD:$wd); 1138 dag InOperandList = (ins ROWS:$ws, uimm8:$u8); 1139 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1140 list<dag> Pattern = [(set ROWD:$wd, (MipsSHF immZExt8:$u8, ROWS:$ws))]; 1141 InstrItinClass Itinerary = itin; 1142} 1143 1144class MSA_I10_LDI_DESC_BASE<string instr_asm, RegisterClass RCWD, 1145 InstrItinClass itin = NoItinerary> { 1146 dag OutOperandList = (outs RCWD:$wd); 1147 dag InOperandList = (ins vsplat_simm10:$i10); 1148 string AsmString = !strconcat(instr_asm, "\t$wd, $i10"); 1149 // LDI is matched using custom matching code in MipsSEISelDAGToDAG.cpp 1150 list<dag> Pattern = []; 1151 bit hasSideEffects = 0; 1152 InstrItinClass Itinerary = itin; 1153} 1154 1155class MSA_2R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1156 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1157 InstrItinClass itin = NoItinerary> { 1158 dag OutOperandList = (outs ROWD:$wd); 1159 dag InOperandList = (ins ROWS:$ws); 1160 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 1161 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))]; 1162 InstrItinClass Itinerary = itin; 1163} 1164 1165class MSA_2R_FILL_DESC_BASE<string instr_asm, ValueType VT, 1166 SDPatternOperator OpNode, RegisterOperand ROWD, 1167 RegisterOperand ROS = ROWD, 1168 InstrItinClass itin = NoItinerary> { 1169 dag OutOperandList = (outs ROWD:$wd); 1170 dag InOperandList = (ins ROS:$rs); 1171 string AsmString = !strconcat(instr_asm, "\t$wd, $rs"); 1172 list<dag> Pattern = [(set ROWD:$wd, (VT (OpNode ROS:$rs)))]; 1173 InstrItinClass Itinerary = itin; 1174} 1175 1176class MSA_2R_FILL_PSEUDO_BASE<ValueType VT, SDPatternOperator OpNode, 1177 RegisterClass RCWD, RegisterClass RCWS = RCWD> : 1178 MipsPseudo<(outs RCWD:$wd), (ins RCWS:$fs), 1179 [(set RCWD:$wd, (OpNode RCWS:$fs))]> { 1180 let usesCustomInserter = 1; 1181} 1182 1183class MSA_2RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1184 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1185 InstrItinClass itin = NoItinerary> { 1186 dag OutOperandList = (outs ROWD:$wd); 1187 dag InOperandList = (ins ROWS:$ws); 1188 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 1189 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))]; 1190 InstrItinClass Itinerary = itin; 1191} 1192 1193class MSA_3R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1194 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1195 RegisterOperand ROWT = ROWD, 1196 InstrItinClass itin = NoItinerary> { 1197 dag OutOperandList = (outs ROWD:$wd); 1198 dag InOperandList = (ins ROWS:$ws, ROWT:$wt); 1199 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1200 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))]; 1201 InstrItinClass Itinerary = itin; 1202} 1203 1204class MSA_3R_VSHF_DESC_BASE<string instr_asm, RegisterOperand ROWD, 1205 RegisterOperand ROWS = ROWD, 1206 RegisterOperand ROWT = ROWD, 1207 InstrItinClass itin = NoItinerary> { 1208 dag OutOperandList = (outs ROWD:$wd); 1209 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt); 1210 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1211 list<dag> Pattern = [(set ROWD:$wd, (MipsVSHF ROWD:$wd_in, ROWS:$ws, 1212 ROWT:$wt))]; 1213 string Constraints = "$wd = $wd_in"; 1214 InstrItinClass Itinerary = itin; 1215} 1216 1217class MSA_3R_4R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1218 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1219 RegisterOperand ROWT = ROWD, 1220 InstrItinClass itin = NoItinerary> { 1221 dag OutOperandList = (outs ROWD:$wd); 1222 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt); 1223 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1224 list<dag> Pattern = [(set ROWD:$wd, 1225 (OpNode ROWD:$wd_in, ROWS:$ws, ROWT:$wt))]; 1226 InstrItinClass Itinerary = itin; 1227 string Constraints = "$wd = $wd_in"; 1228} 1229 1230class MSA_3RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1231 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1232 RegisterOperand ROWT = ROWD, 1233 InstrItinClass itin = NoItinerary> : 1234 MSA_3R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>; 1235 1236class MSA_3RF_4RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1237 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1238 RegisterOperand ROWT = ROWD, 1239 InstrItinClass itin = NoItinerary> : 1240 MSA_3R_4R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>; 1241 1242class MSA_CBRANCH_DESC_BASE<string instr_asm, RegisterClass RCWD> { 1243 dag OutOperandList = (outs); 1244 dag InOperandList = (ins RCWD:$wd, brtarget:$offset); 1245 string AsmString = !strconcat(instr_asm, "\t$wd, $offset"); 1246 list<dag> Pattern = []; 1247 InstrItinClass Itinerary = IIBranch; 1248 bit isBranch = 1; 1249 bit isTerminator = 1; 1250 bit hasDelaySlot = 1; 1251 list<Register> Defs = [AT]; 1252} 1253 1254class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1255 RegisterOperand ROWD, RegisterOperand ROS, 1256 InstrItinClass itin = NoItinerary> { 1257 dag OutOperandList = (outs ROWD:$wd); 1258 dag InOperandList = (ins ROWD:$wd_in, ROS:$rs, uimm6:$n); 1259 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $rs"); 1260 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in, 1261 ROS:$rs, 1262 immZExt6:$n))]; 1263 InstrItinClass Itinerary = itin; 1264 string Constraints = "$wd = $wd_in"; 1265} 1266 1267class MSA_INSERT_PSEUDO_BASE<SDPatternOperator OpNode, ValueType Ty, 1268 RegisterOperand ROWD, RegisterOperand ROFS> : 1269 MipsPseudo<(outs ROWD:$wd), (ins ROWD:$wd_in, uimm6:$n, ROFS:$fs), 1270 [(set ROWD:$wd, (OpNode (Ty ROWD:$wd_in), ROFS:$fs, 1271 immZExt6:$n))]> { 1272 bit usesCustomInserter = 1; 1273 string Constraints = "$wd = $wd_in"; 1274} 1275 1276class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1277 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1278 InstrItinClass itin = NoItinerary> { 1279 dag OutOperandList = (outs ROWD:$wd); 1280 dag InOperandList = (ins ROWD:$wd_in, uimm6:$n, ROWS:$ws); 1281 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[0]"); 1282 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in, 1283 immZExt6:$n, 1284 ROWS:$ws))]; 1285 InstrItinClass Itinerary = itin; 1286 string Constraints = "$wd = $wd_in"; 1287} 1288 1289class MSA_VEC_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1290 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1291 RegisterOperand ROWT = ROWD, 1292 InstrItinClass itin = NoItinerary> { 1293 dag OutOperandList = (outs ROWD:$wd); 1294 dag InOperandList = (ins ROWS:$ws, ROWT:$wt); 1295 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1296 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))]; 1297 InstrItinClass Itinerary = itin; 1298} 1299 1300class MSA_ELM_SPLAT_DESC_BASE<string instr_asm, SplatComplexPattern SplatImm, 1301 RegisterOperand ROWD, 1302 RegisterOperand ROWS = ROWD, 1303 InstrItinClass itin = NoItinerary> { 1304 dag OutOperandList = (outs ROWD:$wd); 1305 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$n); 1306 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$n]"); 1307 list<dag> Pattern = [(set ROWD:$wd, (MipsVSHF SplatImm:$n, ROWS:$ws, 1308 ROWS:$ws))]; 1309 InstrItinClass Itinerary = itin; 1310} 1311 1312class MSA_VEC_PSEUDO_BASE<SDPatternOperator OpNode, RegisterOperand ROWD, 1313 RegisterOperand ROWS = ROWD, 1314 RegisterOperand ROWT = ROWD> : 1315 MipsPseudo<(outs ROWD:$wd), (ins ROWS:$ws, ROWT:$wt), 1316 [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))]>; 1317 1318class ADD_A_B_DESC : MSA_3R_DESC_BASE<"add_a.b", int_mips_add_a_b, MSA128BOpnd>, 1319 IsCommutable; 1320class ADD_A_H_DESC : MSA_3R_DESC_BASE<"add_a.h", int_mips_add_a_h, MSA128HOpnd>, 1321 IsCommutable; 1322class ADD_A_W_DESC : MSA_3R_DESC_BASE<"add_a.w", int_mips_add_a_w, MSA128WOpnd>, 1323 IsCommutable; 1324class ADD_A_D_DESC : MSA_3R_DESC_BASE<"add_a.d", int_mips_add_a_d, MSA128DOpnd>, 1325 IsCommutable; 1326 1327class ADDS_A_B_DESC : MSA_3R_DESC_BASE<"adds_a.b", int_mips_adds_a_b, 1328 MSA128BOpnd>, IsCommutable; 1329class ADDS_A_H_DESC : MSA_3R_DESC_BASE<"adds_a.h", int_mips_adds_a_h, 1330 MSA128HOpnd>, IsCommutable; 1331class ADDS_A_W_DESC : MSA_3R_DESC_BASE<"adds_a.w", int_mips_adds_a_w, 1332 MSA128WOpnd>, IsCommutable; 1333class ADDS_A_D_DESC : MSA_3R_DESC_BASE<"adds_a.d", int_mips_adds_a_d, 1334 MSA128DOpnd>, IsCommutable; 1335 1336class ADDS_S_B_DESC : MSA_3R_DESC_BASE<"adds_s.b", int_mips_adds_s_b, 1337 MSA128BOpnd>, IsCommutable; 1338class ADDS_S_H_DESC : MSA_3R_DESC_BASE<"adds_s.h", int_mips_adds_s_h, 1339 MSA128HOpnd>, IsCommutable; 1340class ADDS_S_W_DESC : MSA_3R_DESC_BASE<"adds_s.w", int_mips_adds_s_w, 1341 MSA128WOpnd>, IsCommutable; 1342class ADDS_S_D_DESC : MSA_3R_DESC_BASE<"adds_s.d", int_mips_adds_s_d, 1343 MSA128DOpnd>, IsCommutable; 1344 1345class ADDS_U_B_DESC : MSA_3R_DESC_BASE<"adds_u.b", int_mips_adds_u_b, 1346 MSA128BOpnd>, IsCommutable; 1347class ADDS_U_H_DESC : MSA_3R_DESC_BASE<"adds_u.h", int_mips_adds_u_h, 1348 MSA128HOpnd>, IsCommutable; 1349class ADDS_U_W_DESC : MSA_3R_DESC_BASE<"adds_u.w", int_mips_adds_u_w, 1350 MSA128WOpnd>, IsCommutable; 1351class ADDS_U_D_DESC : MSA_3R_DESC_BASE<"adds_u.d", int_mips_adds_u_d, 1352 MSA128DOpnd>, IsCommutable; 1353 1354class ADDV_B_DESC : MSA_3R_DESC_BASE<"addv.b", add, MSA128BOpnd>, IsCommutable; 1355class ADDV_H_DESC : MSA_3R_DESC_BASE<"addv.h", add, MSA128HOpnd>, IsCommutable; 1356class ADDV_W_DESC : MSA_3R_DESC_BASE<"addv.w", add, MSA128WOpnd>, IsCommutable; 1357class ADDV_D_DESC : MSA_3R_DESC_BASE<"addv.d", add, MSA128DOpnd>, IsCommutable; 1358 1359class ADDVI_B_DESC : MSA_I5_DESC_BASE<"addvi.b", add, vsplati8_uimm5, 1360 MSA128BOpnd>; 1361class ADDVI_H_DESC : MSA_I5_DESC_BASE<"addvi.h", add, vsplati16_uimm5, 1362 MSA128HOpnd>; 1363class ADDVI_W_DESC : MSA_I5_DESC_BASE<"addvi.w", add, vsplati32_uimm5, 1364 MSA128WOpnd>; 1365class ADDVI_D_DESC : MSA_I5_DESC_BASE<"addvi.d", add, vsplati64_uimm5, 1366 MSA128DOpnd>; 1367 1368class AND_V_DESC : MSA_VEC_DESC_BASE<"and.v", and, MSA128BOpnd>; 1369class AND_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128HOpnd>; 1370class AND_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128WOpnd>; 1371class AND_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128DOpnd>; 1372 1373class ANDI_B_DESC : MSA_I8_DESC_BASE<"andi.b", and, vsplati8_uimm8, 1374 MSA128BOpnd>; 1375 1376class ASUB_S_B_DESC : MSA_3R_DESC_BASE<"asub_s.b", int_mips_asub_s_b, 1377 MSA128BOpnd>; 1378class ASUB_S_H_DESC : MSA_3R_DESC_BASE<"asub_s.h", int_mips_asub_s_h, 1379 MSA128HOpnd>; 1380class ASUB_S_W_DESC : MSA_3R_DESC_BASE<"asub_s.w", int_mips_asub_s_w, 1381 MSA128WOpnd>; 1382class ASUB_S_D_DESC : MSA_3R_DESC_BASE<"asub_s.d", int_mips_asub_s_d, 1383 MSA128DOpnd>; 1384 1385class ASUB_U_B_DESC : MSA_3R_DESC_BASE<"asub_u.b", int_mips_asub_u_b, 1386 MSA128BOpnd>; 1387class ASUB_U_H_DESC : MSA_3R_DESC_BASE<"asub_u.h", int_mips_asub_u_h, 1388 MSA128HOpnd>; 1389class ASUB_U_W_DESC : MSA_3R_DESC_BASE<"asub_u.w", int_mips_asub_u_w, 1390 MSA128WOpnd>; 1391class ASUB_U_D_DESC : MSA_3R_DESC_BASE<"asub_u.d", int_mips_asub_u_d, 1392 MSA128DOpnd>; 1393 1394class AVE_S_B_DESC : MSA_3R_DESC_BASE<"ave_s.b", int_mips_ave_s_b, MSA128BOpnd>, 1395 IsCommutable; 1396class AVE_S_H_DESC : MSA_3R_DESC_BASE<"ave_s.h", int_mips_ave_s_h, MSA128HOpnd>, 1397 IsCommutable; 1398class AVE_S_W_DESC : MSA_3R_DESC_BASE<"ave_s.w", int_mips_ave_s_w, MSA128WOpnd>, 1399 IsCommutable; 1400class AVE_S_D_DESC : MSA_3R_DESC_BASE<"ave_s.d", int_mips_ave_s_d, MSA128DOpnd>, 1401 IsCommutable; 1402 1403class AVE_U_B_DESC : MSA_3R_DESC_BASE<"ave_u.b", int_mips_ave_u_b, MSA128BOpnd>, 1404 IsCommutable; 1405class AVE_U_H_DESC : MSA_3R_DESC_BASE<"ave_u.h", int_mips_ave_u_h, MSA128HOpnd>, 1406 IsCommutable; 1407class AVE_U_W_DESC : MSA_3R_DESC_BASE<"ave_u.w", int_mips_ave_u_w, MSA128WOpnd>, 1408 IsCommutable; 1409class AVE_U_D_DESC : MSA_3R_DESC_BASE<"ave_u.d", int_mips_ave_u_d, MSA128DOpnd>, 1410 IsCommutable; 1411 1412class AVER_S_B_DESC : MSA_3R_DESC_BASE<"aver_s.b", int_mips_aver_s_b, 1413 MSA128BOpnd>, IsCommutable; 1414class AVER_S_H_DESC : MSA_3R_DESC_BASE<"aver_s.h", int_mips_aver_s_h, 1415 MSA128HOpnd>, IsCommutable; 1416class AVER_S_W_DESC : MSA_3R_DESC_BASE<"aver_s.w", int_mips_aver_s_w, 1417 MSA128WOpnd>, IsCommutable; 1418class AVER_S_D_DESC : MSA_3R_DESC_BASE<"aver_s.d", int_mips_aver_s_d, 1419 MSA128DOpnd>, IsCommutable; 1420 1421class AVER_U_B_DESC : MSA_3R_DESC_BASE<"aver_u.b", int_mips_aver_u_b, 1422 MSA128BOpnd>, IsCommutable; 1423class AVER_U_H_DESC : MSA_3R_DESC_BASE<"aver_u.h", int_mips_aver_u_h, 1424 MSA128HOpnd>, IsCommutable; 1425class AVER_U_W_DESC : MSA_3R_DESC_BASE<"aver_u.w", int_mips_aver_u_w, 1426 MSA128WOpnd>, IsCommutable; 1427class AVER_U_D_DESC : MSA_3R_DESC_BASE<"aver_u.d", int_mips_aver_u_d, 1428 MSA128DOpnd>, IsCommutable; 1429 1430class BCLR_B_DESC : MSA_3R_DESC_BASE<"bclr.b", int_mips_bclr_b, MSA128BOpnd>; 1431class BCLR_H_DESC : MSA_3R_DESC_BASE<"bclr.h", int_mips_bclr_h, MSA128HOpnd>; 1432class BCLR_W_DESC : MSA_3R_DESC_BASE<"bclr.w", int_mips_bclr_w, MSA128WOpnd>; 1433class BCLR_D_DESC : MSA_3R_DESC_BASE<"bclr.d", int_mips_bclr_d, MSA128DOpnd>; 1434 1435class BCLRI_B_DESC : MSA_BIT_B_DESC_BASE<"bclri.b", int_mips_bclri_b, 1436 MSA128BOpnd>; 1437class BCLRI_H_DESC : MSA_BIT_H_DESC_BASE<"bclri.h", int_mips_bclri_h, 1438 MSA128HOpnd>; 1439class BCLRI_W_DESC : MSA_BIT_W_DESC_BASE<"bclri.w", int_mips_bclri_w, 1440 MSA128WOpnd>; 1441class BCLRI_D_DESC : MSA_BIT_D_DESC_BASE<"bclri.d", int_mips_bclri_d, 1442 MSA128DOpnd>; 1443 1444class BINSL_B_DESC : MSA_3R_DESC_BASE<"binsl.b", int_mips_binsl_b, MSA128BOpnd>; 1445class BINSL_H_DESC : MSA_3R_DESC_BASE<"binsl.h", int_mips_binsl_h, MSA128HOpnd>; 1446class BINSL_W_DESC : MSA_3R_DESC_BASE<"binsl.w", int_mips_binsl_w, MSA128WOpnd>; 1447class BINSL_D_DESC : MSA_3R_DESC_BASE<"binsl.d", int_mips_binsl_d, MSA128DOpnd>; 1448 1449class BINSLI_B_DESC : MSA_BIT_B_DESC_BASE<"binsli.b", int_mips_binsli_b, 1450 MSA128BOpnd>; 1451class BINSLI_H_DESC : MSA_BIT_H_DESC_BASE<"binsli.h", int_mips_binsli_h, 1452 MSA128HOpnd>; 1453class BINSLI_W_DESC : MSA_BIT_W_DESC_BASE<"binsli.w", int_mips_binsli_w, 1454 MSA128WOpnd>; 1455class BINSLI_D_DESC : MSA_BIT_D_DESC_BASE<"binsli.d", int_mips_binsli_d, 1456 MSA128DOpnd>; 1457 1458class BINSR_B_DESC : MSA_3R_DESC_BASE<"binsr.b", int_mips_binsr_b, MSA128BOpnd>; 1459class BINSR_H_DESC : MSA_3R_DESC_BASE<"binsr.h", int_mips_binsr_h, MSA128HOpnd>; 1460class BINSR_W_DESC : MSA_3R_DESC_BASE<"binsr.w", int_mips_binsr_w, MSA128WOpnd>; 1461class BINSR_D_DESC : MSA_3R_DESC_BASE<"binsr.d", int_mips_binsr_d, MSA128DOpnd>; 1462 1463class BINSRI_B_DESC : MSA_BIT_B_DESC_BASE<"binsri.b", int_mips_binsri_b, 1464 MSA128BOpnd>; 1465class BINSRI_H_DESC : MSA_BIT_H_DESC_BASE<"binsri.h", int_mips_binsri_h, 1466 MSA128HOpnd>; 1467class BINSRI_W_DESC : MSA_BIT_W_DESC_BASE<"binsri.w", int_mips_binsri_w, 1468 MSA128WOpnd>; 1469class BINSRI_D_DESC : MSA_BIT_D_DESC_BASE<"binsri.d", int_mips_binsri_d, 1470 MSA128DOpnd>; 1471 1472class BMNZ_V_DESC : MSA_VEC_DESC_BASE<"bmnz.v", int_mips_bmnz_v, MSA128BOpnd>; 1473 1474class BMNZI_B_DESC : MSA_I8_X_DESC_BASE<"bmnzi.b", int_mips_bmnzi_b, 1475 MSA128BOpnd>; 1476 1477class BMZ_V_DESC : MSA_VEC_DESC_BASE<"bmz.v", int_mips_bmz_v, MSA128BOpnd>; 1478 1479class BMZI_B_DESC : MSA_I8_X_DESC_BASE<"bmzi.b", int_mips_bmzi_b, MSA128BOpnd>; 1480 1481class BNEG_B_DESC : MSA_3R_DESC_BASE<"bneg.b", int_mips_bneg_b, MSA128BOpnd>; 1482class BNEG_H_DESC : MSA_3R_DESC_BASE<"bneg.h", int_mips_bneg_h, MSA128HOpnd>; 1483class BNEG_W_DESC : MSA_3R_DESC_BASE<"bneg.w", int_mips_bneg_w, MSA128WOpnd>; 1484class BNEG_D_DESC : MSA_3R_DESC_BASE<"bneg.d", int_mips_bneg_d, MSA128DOpnd>; 1485 1486class BNEGI_B_DESC : MSA_BIT_B_DESC_BASE<"bnegi.b", int_mips_bnegi_b, 1487 MSA128BOpnd>; 1488class BNEGI_H_DESC : MSA_BIT_H_DESC_BASE<"bnegi.h", int_mips_bnegi_h, 1489 MSA128HOpnd>; 1490class BNEGI_W_DESC : MSA_BIT_W_DESC_BASE<"bnegi.w", int_mips_bnegi_w, 1491 MSA128WOpnd>; 1492class BNEGI_D_DESC : MSA_BIT_D_DESC_BASE<"bnegi.d", int_mips_bnegi_d, 1493 MSA128DOpnd>; 1494 1495class BNZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bnz.b", MSA128B>; 1496class BNZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bnz.h", MSA128H>; 1497class BNZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bnz.w", MSA128W>; 1498class BNZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bnz.d", MSA128D>; 1499 1500class BNZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bnz.v", MSA128B>; 1501 1502class BSEL_V_DESC { 1503 dag OutOperandList = (outs MSA128BOpnd:$wd); 1504 dag InOperandList = (ins MSA128BOpnd:$wd_in, MSA128BOpnd:$ws, 1505 MSA128BOpnd:$wt); 1506 string AsmString = "bsel.v\t$wd, $ws, $wt"; 1507 list<dag> Pattern = [(set MSA128BOpnd:$wd, 1508 (vselect MSA128BOpnd:$wd_in, MSA128BOpnd:$ws, 1509 MSA128BOpnd:$wt))]; 1510 InstrItinClass Itinerary = NoItinerary; 1511 string Constraints = "$wd = $wd_in"; 1512} 1513 1514class BSELI_B_DESC { 1515 dag OutOperandList = (outs MSA128BOpnd:$wd); 1516 dag InOperandList = (ins MSA128BOpnd:$wd_in, MSA128BOpnd:$ws, 1517 vsplat_uimm8:$u8); 1518 string AsmString = "bseli.b\t$wd, $ws, $u8"; 1519 list<dag> Pattern = [(set MSA128BOpnd:$wd, (vselect MSA128BOpnd:$wd_in, 1520 MSA128BOpnd:$ws, 1521 vsplati8_uimm8:$u8))]; 1522 InstrItinClass Itinerary = NoItinerary; 1523 string Constraints = "$wd = $wd_in"; 1524} 1525 1526class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", int_mips_bset_b, MSA128BOpnd>; 1527class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", int_mips_bset_h, MSA128HOpnd>; 1528class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", int_mips_bset_w, MSA128WOpnd>; 1529class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", int_mips_bset_d, MSA128DOpnd>; 1530 1531class BSETI_B_DESC : MSA_BIT_B_DESC_BASE<"bseti.b", int_mips_bseti_b, 1532 MSA128BOpnd>; 1533class BSETI_H_DESC : MSA_BIT_H_DESC_BASE<"bseti.h", int_mips_bseti_h, 1534 MSA128HOpnd>; 1535class BSETI_W_DESC : MSA_BIT_W_DESC_BASE<"bseti.w", int_mips_bseti_w, 1536 MSA128WOpnd>; 1537class BSETI_D_DESC : MSA_BIT_D_DESC_BASE<"bseti.d", int_mips_bseti_d, 1538 MSA128DOpnd>; 1539 1540class BZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bz.b", MSA128B>; 1541class BZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bz.h", MSA128H>; 1542class BZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bz.w", MSA128W>; 1543class BZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bz.d", MSA128D>; 1544 1545class BZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bz.v", MSA128B>; 1546 1547class CEQ_B_DESC : MSA_3R_DESC_BASE<"ceq.b", vseteq_v16i8, MSA128BOpnd>, 1548 IsCommutable; 1549class CEQ_H_DESC : MSA_3R_DESC_BASE<"ceq.h", vseteq_v8i16, MSA128HOpnd>, 1550 IsCommutable; 1551class CEQ_W_DESC : MSA_3R_DESC_BASE<"ceq.w", vseteq_v4i32, MSA128WOpnd>, 1552 IsCommutable; 1553class CEQ_D_DESC : MSA_3R_DESC_BASE<"ceq.d", vseteq_v2i64, MSA128DOpnd>, 1554 IsCommutable; 1555 1556class CEQI_B_DESC : MSA_I5_DESC_BASE<"ceqi.b", vseteq_v16i8, vsplati8_simm5, 1557 MSA128BOpnd>; 1558class CEQI_H_DESC : MSA_I5_DESC_BASE<"ceqi.h", vseteq_v8i16, vsplati16_simm5, 1559 MSA128HOpnd>; 1560class CEQI_W_DESC : MSA_I5_DESC_BASE<"ceqi.w", vseteq_v4i32, vsplati32_simm5, 1561 MSA128WOpnd>; 1562class CEQI_D_DESC : MSA_I5_DESC_BASE<"ceqi.d", vseteq_v2i64, vsplati64_simm5, 1563 MSA128DOpnd>; 1564 1565class CFCMSA_DESC { 1566 dag OutOperandList = (outs GPR32:$rd); 1567 dag InOperandList = (ins MSACtrl:$cs); 1568 string AsmString = "cfcmsa\t$rd, $cs"; 1569 InstrItinClass Itinerary = NoItinerary; 1570 bit hasSideEffects = 1; 1571} 1572 1573class CLE_S_B_DESC : MSA_3R_DESC_BASE<"cle_s.b", vsetle_v16i8, MSA128BOpnd>; 1574class CLE_S_H_DESC : MSA_3R_DESC_BASE<"cle_s.h", vsetle_v8i16, MSA128HOpnd>; 1575class CLE_S_W_DESC : MSA_3R_DESC_BASE<"cle_s.w", vsetle_v4i32, MSA128WOpnd>; 1576class CLE_S_D_DESC : MSA_3R_DESC_BASE<"cle_s.d", vsetle_v2i64, MSA128DOpnd>; 1577 1578class CLE_U_B_DESC : MSA_3R_DESC_BASE<"cle_u.b", vsetule_v16i8, MSA128BOpnd>; 1579class CLE_U_H_DESC : MSA_3R_DESC_BASE<"cle_u.h", vsetule_v8i16, MSA128HOpnd>; 1580class CLE_U_W_DESC : MSA_3R_DESC_BASE<"cle_u.w", vsetule_v4i32, MSA128WOpnd>; 1581class CLE_U_D_DESC : MSA_3R_DESC_BASE<"cle_u.d", vsetule_v2i64, MSA128DOpnd>; 1582 1583class CLEI_S_B_DESC : MSA_I5_DESC_BASE<"clei_s.b", vsetle_v16i8, 1584 vsplati8_simm5, MSA128BOpnd>; 1585class CLEI_S_H_DESC : MSA_I5_DESC_BASE<"clei_s.h", vsetle_v8i16, 1586 vsplati16_simm5, MSA128HOpnd>; 1587class CLEI_S_W_DESC : MSA_I5_DESC_BASE<"clei_s.w", vsetle_v4i32, 1588 vsplati32_simm5, MSA128WOpnd>; 1589class CLEI_S_D_DESC : MSA_I5_DESC_BASE<"clei_s.d", vsetle_v2i64, 1590 vsplati64_simm5, MSA128DOpnd>; 1591 1592class CLEI_U_B_DESC : MSA_I5_DESC_BASE<"clei_u.b", vsetule_v16i8, 1593 vsplati8_uimm5, MSA128BOpnd>; 1594class CLEI_U_H_DESC : MSA_I5_DESC_BASE<"clei_u.h", vsetule_v8i16, 1595 vsplati16_uimm5, MSA128HOpnd>; 1596class CLEI_U_W_DESC : MSA_I5_DESC_BASE<"clei_u.w", vsetule_v4i32, 1597 vsplati32_uimm5, MSA128WOpnd>; 1598class CLEI_U_D_DESC : MSA_I5_DESC_BASE<"clei_u.d", vsetule_v2i64, 1599 vsplati64_uimm5, MSA128DOpnd>; 1600 1601class CLT_S_B_DESC : MSA_3R_DESC_BASE<"clt_s.b", vsetlt_v16i8, MSA128BOpnd>; 1602class CLT_S_H_DESC : MSA_3R_DESC_BASE<"clt_s.h", vsetlt_v8i16, MSA128HOpnd>; 1603class CLT_S_W_DESC : MSA_3R_DESC_BASE<"clt_s.w", vsetlt_v4i32, MSA128WOpnd>; 1604class CLT_S_D_DESC : MSA_3R_DESC_BASE<"clt_s.d", vsetlt_v2i64, MSA128DOpnd>; 1605 1606class CLT_U_B_DESC : MSA_3R_DESC_BASE<"clt_u.b", vsetult_v16i8, MSA128BOpnd>; 1607class CLT_U_H_DESC : MSA_3R_DESC_BASE<"clt_u.h", vsetult_v8i16, MSA128HOpnd>; 1608class CLT_U_W_DESC : MSA_3R_DESC_BASE<"clt_u.w", vsetult_v4i32, MSA128WOpnd>; 1609class CLT_U_D_DESC : MSA_3R_DESC_BASE<"clt_u.d", vsetult_v2i64, MSA128DOpnd>; 1610 1611class CLTI_S_B_DESC : MSA_I5_DESC_BASE<"clti_s.b", vsetlt_v16i8, 1612 vsplati8_simm5, MSA128BOpnd>; 1613class CLTI_S_H_DESC : MSA_I5_DESC_BASE<"clti_s.h", vsetlt_v8i16, 1614 vsplati16_simm5, MSA128HOpnd>; 1615class CLTI_S_W_DESC : MSA_I5_DESC_BASE<"clti_s.w", vsetlt_v4i32, 1616 vsplati32_simm5, MSA128WOpnd>; 1617class CLTI_S_D_DESC : MSA_I5_DESC_BASE<"clti_s.d", vsetlt_v2i64, 1618 vsplati64_simm5, MSA128DOpnd>; 1619 1620class CLTI_U_B_DESC : MSA_I5_DESC_BASE<"clti_u.b", vsetult_v16i8, 1621 vsplati8_uimm5, MSA128BOpnd>; 1622class CLTI_U_H_DESC : MSA_I5_DESC_BASE<"clti_u.h", vsetult_v8i16, 1623 vsplati16_uimm5, MSA128HOpnd>; 1624class CLTI_U_W_DESC : MSA_I5_DESC_BASE<"clti_u.w", vsetult_v4i32, 1625 vsplati32_uimm5, MSA128WOpnd>; 1626class CLTI_U_D_DESC : MSA_I5_DESC_BASE<"clti_u.d", vsetult_v2i64, 1627 vsplati64_uimm5, MSA128DOpnd>; 1628 1629class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", vextract_sext_i8, v16i8, 1630 GPR32Opnd, MSA128BOpnd>; 1631class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", vextract_sext_i16, v8i16, 1632 GPR32Opnd, MSA128HOpnd>; 1633class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", vextract_sext_i32, v4i32, 1634 GPR32Opnd, MSA128WOpnd>; 1635 1636class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", vextract_zext_i8, v16i8, 1637 GPR32Opnd, MSA128BOpnd>; 1638class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", vextract_zext_i16, v8i16, 1639 GPR32Opnd, MSA128HOpnd>; 1640class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", vextract_zext_i32, v4i32, 1641 GPR32Opnd, MSA128WOpnd>; 1642 1643class COPY_FW_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v4f32, FGR32, 1644 MSA128W>; 1645class COPY_FD_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v2f64, FGR64, 1646 MSA128D>; 1647 1648class CTCMSA_DESC { 1649 dag OutOperandList = (outs); 1650 dag InOperandList = (ins MSACtrl:$cd, GPR32:$rs); 1651 string AsmString = "ctcmsa\t$cd, $rs"; 1652 InstrItinClass Itinerary = NoItinerary; 1653 bit hasSideEffects = 1; 1654} 1655 1656class DIV_S_B_DESC : MSA_3R_DESC_BASE<"div_s.b", sdiv, MSA128BOpnd>; 1657class DIV_S_H_DESC : MSA_3R_DESC_BASE<"div_s.h", sdiv, MSA128HOpnd>; 1658class DIV_S_W_DESC : MSA_3R_DESC_BASE<"div_s.w", sdiv, MSA128WOpnd>; 1659class DIV_S_D_DESC : MSA_3R_DESC_BASE<"div_s.d", sdiv, MSA128DOpnd>; 1660 1661class DIV_U_B_DESC : MSA_3R_DESC_BASE<"div_u.b", udiv, MSA128BOpnd>; 1662class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", udiv, MSA128HOpnd>; 1663class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", udiv, MSA128WOpnd>; 1664class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", udiv, MSA128DOpnd>; 1665 1666class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h, 1667 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>, 1668 IsCommutable; 1669class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w, 1670 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>, 1671 IsCommutable; 1672class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d, 1673 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>, 1674 IsCommutable; 1675 1676class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h, 1677 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>, 1678 IsCommutable; 1679class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w, 1680 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>, 1681 IsCommutable; 1682class DOTP_U_D_DESC : MSA_3R_DESC_BASE<"dotp_u.d", int_mips_dotp_u_d, 1683 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>, 1684 IsCommutable; 1685 1686class DPADD_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.h", int_mips_dpadd_s_h, 1687 MSA128HOpnd, MSA128BOpnd, 1688 MSA128BOpnd>, IsCommutable; 1689class DPADD_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.w", int_mips_dpadd_s_w, 1690 MSA128WOpnd, MSA128HOpnd, 1691 MSA128HOpnd>, IsCommutable; 1692class DPADD_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.d", int_mips_dpadd_s_d, 1693 MSA128DOpnd, MSA128WOpnd, 1694 MSA128WOpnd>, IsCommutable; 1695 1696class DPADD_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.h", int_mips_dpadd_u_h, 1697 MSA128HOpnd, MSA128BOpnd, 1698 MSA128BOpnd>, IsCommutable; 1699class DPADD_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.w", int_mips_dpadd_u_w, 1700 MSA128WOpnd, MSA128HOpnd, 1701 MSA128HOpnd>, IsCommutable; 1702class DPADD_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.d", int_mips_dpadd_u_d, 1703 MSA128DOpnd, MSA128WOpnd, 1704 MSA128WOpnd>, IsCommutable; 1705 1706class DPSUB_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.h", int_mips_dpsub_s_h, 1707 MSA128HOpnd, MSA128BOpnd, 1708 MSA128BOpnd>; 1709class DPSUB_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.w", int_mips_dpsub_s_w, 1710 MSA128WOpnd, MSA128HOpnd, 1711 MSA128HOpnd>; 1712class DPSUB_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.d", int_mips_dpsub_s_d, 1713 MSA128DOpnd, MSA128WOpnd, 1714 MSA128WOpnd>; 1715 1716class DPSUB_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.h", int_mips_dpsub_u_h, 1717 MSA128HOpnd, MSA128BOpnd, 1718 MSA128BOpnd>; 1719class DPSUB_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.w", int_mips_dpsub_u_w, 1720 MSA128WOpnd, MSA128HOpnd, 1721 MSA128HOpnd>; 1722class DPSUB_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.d", int_mips_dpsub_u_d, 1723 MSA128DOpnd, MSA128WOpnd, 1724 MSA128WOpnd>; 1725 1726class FADD_W_DESC : MSA_3RF_DESC_BASE<"fadd.w", fadd, MSA128WOpnd>, 1727 IsCommutable; 1728class FADD_D_DESC : MSA_3RF_DESC_BASE<"fadd.d", fadd, MSA128DOpnd>, 1729 IsCommutable; 1730 1731class FCAF_W_DESC : MSA_3RF_DESC_BASE<"fcaf.w", int_mips_fcaf_w, MSA128WOpnd>, 1732 IsCommutable; 1733class FCAF_D_DESC : MSA_3RF_DESC_BASE<"fcaf.d", int_mips_fcaf_d, MSA128DOpnd>, 1734 IsCommutable; 1735 1736class FCEQ_W_DESC : MSA_3RF_DESC_BASE<"fceq.w", vfsetoeq_v4f32, MSA128WOpnd>, 1737 IsCommutable; 1738class FCEQ_D_DESC : MSA_3RF_DESC_BASE<"fceq.d", vfsetoeq_v2f64, MSA128DOpnd>, 1739 IsCommutable; 1740 1741class FCLASS_W_DESC : MSA_2RF_DESC_BASE<"fclass.w", int_mips_fclass_w, 1742 MSA128WOpnd>; 1743class FCLASS_D_DESC : MSA_2RF_DESC_BASE<"fclass.d", int_mips_fclass_d, 1744 MSA128DOpnd>; 1745 1746class FCLE_W_DESC : MSA_3RF_DESC_BASE<"fcle.w", vfsetole_v4f32, MSA128WOpnd>; 1747class FCLE_D_DESC : MSA_3RF_DESC_BASE<"fcle.d", vfsetole_v2f64, MSA128DOpnd>; 1748 1749class FCLT_W_DESC : MSA_3RF_DESC_BASE<"fclt.w", vfsetolt_v4f32, MSA128WOpnd>; 1750class FCLT_D_DESC : MSA_3RF_DESC_BASE<"fclt.d", vfsetolt_v2f64, MSA128DOpnd>; 1751 1752class FCNE_W_DESC : MSA_3RF_DESC_BASE<"fcne.w", vfsetone_v4f32, MSA128WOpnd>, 1753 IsCommutable; 1754class FCNE_D_DESC : MSA_3RF_DESC_BASE<"fcne.d", vfsetone_v2f64, MSA128DOpnd>, 1755 IsCommutable; 1756 1757class FCOR_W_DESC : MSA_3RF_DESC_BASE<"fcor.w", vfsetord_v4f32, MSA128WOpnd>, 1758 IsCommutable; 1759class FCOR_D_DESC : MSA_3RF_DESC_BASE<"fcor.d", vfsetord_v2f64, MSA128DOpnd>, 1760 IsCommutable; 1761 1762class FCUEQ_W_DESC : MSA_3RF_DESC_BASE<"fcueq.w", vfsetueq_v4f32, MSA128WOpnd>, 1763 IsCommutable; 1764class FCUEQ_D_DESC : MSA_3RF_DESC_BASE<"fcueq.d", vfsetueq_v2f64, MSA128DOpnd>, 1765 IsCommutable; 1766 1767class FCULE_W_DESC : MSA_3RF_DESC_BASE<"fcule.w", vfsetule_v4f32, MSA128WOpnd>, 1768 IsCommutable; 1769class FCULE_D_DESC : MSA_3RF_DESC_BASE<"fcule.d", vfsetule_v2f64, MSA128DOpnd>, 1770 IsCommutable; 1771 1772class FCULT_W_DESC : MSA_3RF_DESC_BASE<"fcult.w", vfsetult_v4f32, MSA128WOpnd>, 1773 IsCommutable; 1774class FCULT_D_DESC : MSA_3RF_DESC_BASE<"fcult.d", vfsetult_v2f64, MSA128DOpnd>, 1775 IsCommutable; 1776 1777class FCUN_W_DESC : MSA_3RF_DESC_BASE<"fcun.w", vfsetun_v4f32, MSA128WOpnd>, 1778 IsCommutable; 1779class FCUN_D_DESC : MSA_3RF_DESC_BASE<"fcun.d", vfsetun_v2f64, MSA128DOpnd>, 1780 IsCommutable; 1781 1782class FCUNE_W_DESC : MSA_3RF_DESC_BASE<"fcune.w", vfsetune_v4f32, MSA128WOpnd>, 1783 IsCommutable; 1784class FCUNE_D_DESC : MSA_3RF_DESC_BASE<"fcune.d", vfsetune_v2f64, MSA128DOpnd>, 1785 IsCommutable; 1786 1787class FDIV_W_DESC : MSA_3RF_DESC_BASE<"fdiv.w", fdiv, MSA128WOpnd>; 1788class FDIV_D_DESC : MSA_3RF_DESC_BASE<"fdiv.d", fdiv, MSA128DOpnd>; 1789 1790class FEXDO_H_DESC : MSA_3RF_DESC_BASE<"fexdo.h", int_mips_fexdo_h, 1791 MSA128HOpnd, MSA128WOpnd, MSA128WOpnd>; 1792class FEXDO_W_DESC : MSA_3RF_DESC_BASE<"fexdo.w", int_mips_fexdo_w, 1793 MSA128WOpnd, MSA128DOpnd, MSA128DOpnd>; 1794 1795class FEXP2_W_DESC : MSA_3RF_DESC_BASE<"fexp2.w", int_mips_fexp2_w, 1796 MSA128WOpnd>; 1797class FEXP2_D_DESC : MSA_3RF_DESC_BASE<"fexp2.d", int_mips_fexp2_d, 1798 MSA128DOpnd>; 1799 1800class FEXUPL_W_DESC : MSA_2RF_DESC_BASE<"fexupl.w", int_mips_fexupl_w, 1801 MSA128WOpnd, MSA128HOpnd>; 1802class FEXUPL_D_DESC : MSA_2RF_DESC_BASE<"fexupl.d", int_mips_fexupl_d, 1803 MSA128DOpnd, MSA128WOpnd>; 1804 1805class FEXUPR_W_DESC : MSA_2RF_DESC_BASE<"fexupr.w", int_mips_fexupr_w, 1806 MSA128WOpnd, MSA128HOpnd>; 1807class FEXUPR_D_DESC : MSA_2RF_DESC_BASE<"fexupr.d", int_mips_fexupr_d, 1808 MSA128DOpnd, MSA128WOpnd>; 1809 1810class FFINT_S_W_DESC : MSA_2RF_DESC_BASE<"ffint_s.w", sint_to_fp, MSA128WOpnd>; 1811class FFINT_S_D_DESC : MSA_2RF_DESC_BASE<"ffint_s.d", sint_to_fp, MSA128DOpnd>; 1812 1813class FFINT_U_W_DESC : MSA_2RF_DESC_BASE<"ffint_u.w", uint_to_fp, MSA128WOpnd>; 1814class FFINT_U_D_DESC : MSA_2RF_DESC_BASE<"ffint_u.d", uint_to_fp, MSA128DOpnd>; 1815 1816class FFQL_W_DESC : MSA_2RF_DESC_BASE<"ffql.w", int_mips_ffql_w, 1817 MSA128WOpnd, MSA128HOpnd>; 1818class FFQL_D_DESC : MSA_2RF_DESC_BASE<"ffql.d", int_mips_ffql_d, 1819 MSA128DOpnd, MSA128WOpnd>; 1820 1821class FFQR_W_DESC : MSA_2RF_DESC_BASE<"ffqr.w", int_mips_ffqr_w, 1822 MSA128WOpnd, MSA128HOpnd>; 1823class FFQR_D_DESC : MSA_2RF_DESC_BASE<"ffqr.d", int_mips_ffqr_d, 1824 MSA128DOpnd, MSA128WOpnd>; 1825 1826class FILL_B_DESC : MSA_2R_FILL_DESC_BASE<"fill.b", v16i8, vsplati8, 1827 MSA128BOpnd, GPR32Opnd>; 1828class FILL_H_DESC : MSA_2R_FILL_DESC_BASE<"fill.h", v8i16, vsplati16, 1829 MSA128HOpnd, GPR32Opnd>; 1830class FILL_W_DESC : MSA_2R_FILL_DESC_BASE<"fill.w", v4i32, vsplati32, 1831 MSA128WOpnd, GPR32Opnd>; 1832 1833class FILL_FW_PSEUDO_DESC : MSA_2R_FILL_PSEUDO_BASE<v4f32, vsplatf32, MSA128W, 1834 FGR32>; 1835class FILL_FD_PSEUDO_DESC : MSA_2R_FILL_PSEUDO_BASE<v2f64, vsplatf64, MSA128D, 1836 FGR64>; 1837 1838class FLOG2_W_DESC : MSA_2RF_DESC_BASE<"flog2.w", flog2, MSA128WOpnd>; 1839class FLOG2_D_DESC : MSA_2RF_DESC_BASE<"flog2.d", flog2, MSA128DOpnd>; 1840 1841class FMADD_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.w", fma, MSA128WOpnd>; 1842class FMADD_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.d", fma, MSA128DOpnd>; 1843 1844class FMAX_W_DESC : MSA_3RF_DESC_BASE<"fmax.w", int_mips_fmax_w, MSA128WOpnd>; 1845class FMAX_D_DESC : MSA_3RF_DESC_BASE<"fmax.d", int_mips_fmax_d, MSA128DOpnd>; 1846 1847class FMAX_A_W_DESC : MSA_3RF_DESC_BASE<"fmax_a.w", int_mips_fmax_a_w, 1848 MSA128WOpnd>; 1849class FMAX_A_D_DESC : MSA_3RF_DESC_BASE<"fmax_a.d", int_mips_fmax_a_d, 1850 MSA128DOpnd>; 1851 1852class FMIN_W_DESC : MSA_3RF_DESC_BASE<"fmin.w", int_mips_fmin_w, MSA128WOpnd>; 1853class FMIN_D_DESC : MSA_3RF_DESC_BASE<"fmin.d", int_mips_fmin_d, MSA128DOpnd>; 1854 1855class FMIN_A_W_DESC : MSA_3RF_DESC_BASE<"fmin_a.w", int_mips_fmin_a_w, 1856 MSA128WOpnd>; 1857class FMIN_A_D_DESC : MSA_3RF_DESC_BASE<"fmin_a.d", int_mips_fmin_a_d, 1858 MSA128DOpnd>; 1859 1860class FMSUB_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.w", fms, MSA128WOpnd>; 1861class FMSUB_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.d", fms, MSA128DOpnd>; 1862 1863class FMUL_W_DESC : MSA_3RF_DESC_BASE<"fmul.w", fmul, MSA128WOpnd>; 1864class FMUL_D_DESC : MSA_3RF_DESC_BASE<"fmul.d", fmul, MSA128DOpnd>; 1865 1866class FRINT_W_DESC : MSA_2RF_DESC_BASE<"frint.w", frint, MSA128WOpnd>; 1867class FRINT_D_DESC : MSA_2RF_DESC_BASE<"frint.d", frint, MSA128DOpnd>; 1868 1869class FRCP_W_DESC : MSA_2RF_DESC_BASE<"frcp.w", int_mips_frcp_w, MSA128WOpnd>; 1870class FRCP_D_DESC : MSA_2RF_DESC_BASE<"frcp.d", int_mips_frcp_d, MSA128DOpnd>; 1871 1872class FRSQRT_W_DESC : MSA_2RF_DESC_BASE<"frsqrt.w", int_mips_frsqrt_w, 1873 MSA128WOpnd>; 1874class FRSQRT_D_DESC : MSA_2RF_DESC_BASE<"frsqrt.d", int_mips_frsqrt_d, 1875 MSA128DOpnd>; 1876 1877class FSAF_W_DESC : MSA_3RF_DESC_BASE<"fsaf.w", int_mips_fsaf_w, MSA128WOpnd>; 1878class FSAF_D_DESC : MSA_3RF_DESC_BASE<"fsaf.d", int_mips_fsaf_d, MSA128DOpnd>; 1879 1880class FSEQ_W_DESC : MSA_3RF_DESC_BASE<"fseq.w", int_mips_fseq_w, MSA128WOpnd>; 1881class FSEQ_D_DESC : MSA_3RF_DESC_BASE<"fseq.d", int_mips_fseq_d, MSA128DOpnd>; 1882 1883class FSLE_W_DESC : MSA_3RF_DESC_BASE<"fsle.w", int_mips_fsle_w, MSA128WOpnd>; 1884class FSLE_D_DESC : MSA_3RF_DESC_BASE<"fsle.d", int_mips_fsle_d, MSA128DOpnd>; 1885 1886class FSLT_W_DESC : MSA_3RF_DESC_BASE<"fslt.w", int_mips_fslt_w, MSA128WOpnd>; 1887class FSLT_D_DESC : MSA_3RF_DESC_BASE<"fslt.d", int_mips_fslt_d, MSA128DOpnd>; 1888 1889class FSNE_W_DESC : MSA_3RF_DESC_BASE<"fsne.w", int_mips_fsne_w, MSA128WOpnd>; 1890class FSNE_D_DESC : MSA_3RF_DESC_BASE<"fsne.d", int_mips_fsne_d, MSA128DOpnd>; 1891 1892class FSOR_W_DESC : MSA_3RF_DESC_BASE<"fsor.w", int_mips_fsor_w, MSA128WOpnd>; 1893class FSOR_D_DESC : MSA_3RF_DESC_BASE<"fsor.d", int_mips_fsor_d, MSA128DOpnd>; 1894 1895class FSQRT_W_DESC : MSA_2RF_DESC_BASE<"fsqrt.w", fsqrt, MSA128WOpnd>; 1896class FSQRT_D_DESC : MSA_2RF_DESC_BASE<"fsqrt.d", fsqrt, MSA128DOpnd>; 1897 1898class FSUB_W_DESC : MSA_3RF_DESC_BASE<"fsub.w", fsub, MSA128WOpnd>; 1899class FSUB_D_DESC : MSA_3RF_DESC_BASE<"fsub.d", fsub, MSA128DOpnd>; 1900 1901class FSUEQ_W_DESC : MSA_3RF_DESC_BASE<"fsueq.w", int_mips_fsueq_w, 1902 MSA128WOpnd>; 1903class FSUEQ_D_DESC : MSA_3RF_DESC_BASE<"fsueq.d", int_mips_fsueq_d, 1904 MSA128DOpnd>; 1905 1906class FSULE_W_DESC : MSA_3RF_DESC_BASE<"fsule.w", int_mips_fsule_w, 1907 MSA128WOpnd>; 1908class FSULE_D_DESC : MSA_3RF_DESC_BASE<"fsule.d", int_mips_fsule_d, 1909 MSA128DOpnd>; 1910 1911class FSULT_W_DESC : MSA_3RF_DESC_BASE<"fsult.w", int_mips_fsult_w, 1912 MSA128WOpnd>; 1913class FSULT_D_DESC : MSA_3RF_DESC_BASE<"fsult.d", int_mips_fsult_d, 1914 MSA128DOpnd>; 1915 1916class FSUN_W_DESC : MSA_3RF_DESC_BASE<"fsun.w", int_mips_fsun_w, 1917 MSA128WOpnd>; 1918class FSUN_D_DESC : MSA_3RF_DESC_BASE<"fsun.d", int_mips_fsun_d, 1919 MSA128DOpnd>; 1920 1921class FSUNE_W_DESC : MSA_3RF_DESC_BASE<"fsune.w", int_mips_fsune_w, 1922 MSA128WOpnd>; 1923class FSUNE_D_DESC : MSA_3RF_DESC_BASE<"fsune.d", int_mips_fsune_d, 1924 MSA128DOpnd>; 1925 1926class FTINT_S_W_DESC : MSA_2RF_DESC_BASE<"ftint_s.w", int_mips_ftint_s_w, 1927 MSA128WOpnd>; 1928class FTINT_S_D_DESC : MSA_2RF_DESC_BASE<"ftint_s.d", int_mips_ftint_s_d, 1929 MSA128DOpnd>; 1930 1931class FTINT_U_W_DESC : MSA_2RF_DESC_BASE<"ftint_u.w", int_mips_ftint_u_w, 1932 MSA128WOpnd>; 1933class FTINT_U_D_DESC : MSA_2RF_DESC_BASE<"ftint_u.d", int_mips_ftint_u_d, 1934 MSA128DOpnd>; 1935 1936class FTQ_H_DESC : MSA_3RF_DESC_BASE<"ftq.h", int_mips_ftq_h, 1937 MSA128HOpnd, MSA128WOpnd, MSA128WOpnd>; 1938class FTQ_W_DESC : MSA_3RF_DESC_BASE<"ftq.w", int_mips_ftq_w, 1939 MSA128WOpnd, MSA128DOpnd, MSA128DOpnd>; 1940 1941class FTRUNC_S_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.w", fp_to_sint, 1942 MSA128WOpnd>; 1943class FTRUNC_S_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.d", fp_to_sint, 1944 MSA128DOpnd>; 1945 1946class FTRUNC_U_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.w", fp_to_uint, 1947 MSA128WOpnd>; 1948class FTRUNC_U_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.d", fp_to_uint, 1949 MSA128DOpnd>; 1950 1951class HADD_S_H_DESC : MSA_3R_DESC_BASE<"hadd_s.h", int_mips_hadd_s_h, 1952 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1953class HADD_S_W_DESC : MSA_3R_DESC_BASE<"hadd_s.w", int_mips_hadd_s_w, 1954 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 1955class HADD_S_D_DESC : MSA_3R_DESC_BASE<"hadd_s.d", int_mips_hadd_s_d, 1956 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 1957 1958class HADD_U_H_DESC : MSA_3R_DESC_BASE<"hadd_u.h", int_mips_hadd_u_h, 1959 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1960class HADD_U_W_DESC : MSA_3R_DESC_BASE<"hadd_u.w", int_mips_hadd_u_w, 1961 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 1962class HADD_U_D_DESC : MSA_3R_DESC_BASE<"hadd_u.d", int_mips_hadd_u_d, 1963 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 1964 1965class HSUB_S_H_DESC : MSA_3R_DESC_BASE<"hsub_s.h", int_mips_hsub_s_h, 1966 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1967class HSUB_S_W_DESC : MSA_3R_DESC_BASE<"hsub_s.w", int_mips_hsub_s_w, 1968 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 1969class HSUB_S_D_DESC : MSA_3R_DESC_BASE<"hsub_s.d", int_mips_hsub_s_d, 1970 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 1971 1972class HSUB_U_H_DESC : MSA_3R_DESC_BASE<"hsub_u.h", int_mips_hsub_u_h, 1973 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1974class HSUB_U_W_DESC : MSA_3R_DESC_BASE<"hsub_u.w", int_mips_hsub_u_w, 1975 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 1976class HSUB_U_D_DESC : MSA_3R_DESC_BASE<"hsub_u.d", int_mips_hsub_u_d, 1977 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 1978 1979class ILVEV_B_DESC : MSA_3R_DESC_BASE<"ilvev.b", MipsILVEV, MSA128BOpnd>; 1980class ILVEV_H_DESC : MSA_3R_DESC_BASE<"ilvev.h", MipsILVEV, MSA128HOpnd>; 1981class ILVEV_W_DESC : MSA_3R_DESC_BASE<"ilvev.w", MipsILVEV, MSA128WOpnd>; 1982class ILVEV_D_DESC : MSA_3R_DESC_BASE<"ilvev.d", MipsILVEV, MSA128DOpnd>; 1983 1984class ILVL_B_DESC : MSA_3R_DESC_BASE<"ilvl.b", MipsILVL, MSA128BOpnd>; 1985class ILVL_H_DESC : MSA_3R_DESC_BASE<"ilvl.h", MipsILVL, MSA128HOpnd>; 1986class ILVL_W_DESC : MSA_3R_DESC_BASE<"ilvl.w", MipsILVL, MSA128WOpnd>; 1987class ILVL_D_DESC : MSA_3R_DESC_BASE<"ilvl.d", MipsILVL, MSA128DOpnd>; 1988 1989class ILVOD_B_DESC : MSA_3R_DESC_BASE<"ilvod.b", MipsILVOD, MSA128BOpnd>; 1990class ILVOD_H_DESC : MSA_3R_DESC_BASE<"ilvod.h", MipsILVOD, MSA128HOpnd>; 1991class ILVOD_W_DESC : MSA_3R_DESC_BASE<"ilvod.w", MipsILVOD, MSA128WOpnd>; 1992class ILVOD_D_DESC : MSA_3R_DESC_BASE<"ilvod.d", MipsILVOD, MSA128DOpnd>; 1993 1994class ILVR_B_DESC : MSA_3R_DESC_BASE<"ilvr.b", MipsILVR, MSA128BOpnd>; 1995class ILVR_H_DESC : MSA_3R_DESC_BASE<"ilvr.h", MipsILVR, MSA128HOpnd>; 1996class ILVR_W_DESC : MSA_3R_DESC_BASE<"ilvr.w", MipsILVR, MSA128WOpnd>; 1997class ILVR_D_DESC : MSA_3R_DESC_BASE<"ilvr.d", MipsILVR, MSA128DOpnd>; 1998 1999class INSERT_B_DESC : MSA_INSERT_DESC_BASE<"insert.b", vinsert_v16i8, 2000 MSA128BOpnd, GPR32Opnd>; 2001class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", vinsert_v8i16, 2002 MSA128HOpnd, GPR32Opnd>; 2003class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", vinsert_v4i32, 2004 MSA128WOpnd, GPR32Opnd>; 2005 2006class INSERT_FW_PSEUDO_DESC : MSA_INSERT_PSEUDO_BASE<vector_insert, v4f32, 2007 MSA128WOpnd, FGR32Opnd>; 2008class INSERT_FD_PSEUDO_DESC : MSA_INSERT_PSEUDO_BASE<vector_insert, v2f64, 2009 MSA128DOpnd, FGR64Opnd>; 2010 2011class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b, 2012 MSA128BOpnd>; 2013class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h, 2014 MSA128HOpnd>; 2015class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w, 2016 MSA128WOpnd>; 2017class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d, 2018 MSA128DOpnd>; 2019 2020class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2021 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem, 2022 ComplexPattern Addr = addrRegImm, 2023 InstrItinClass itin = NoItinerary> { 2024 dag OutOperandList = (outs RCWD:$wd); 2025 dag InOperandList = (ins MemOpnd:$addr); 2026 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2027 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))]; 2028 InstrItinClass Itinerary = itin; 2029} 2030 2031class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, MSA128B>; 2032class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, MSA128H>; 2033class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, MSA128W>; 2034class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, MSA128D>; 2035 2036class LDI_B_DESC : MSA_I10_LDI_DESC_BASE<"ldi.b", MSA128B>; 2037class LDI_H_DESC : MSA_I10_LDI_DESC_BASE<"ldi.h", MSA128H>; 2038class LDI_W_DESC : MSA_I10_LDI_DESC_BASE<"ldi.w", MSA128W>; 2039class LDI_D_DESC : MSA_I10_LDI_DESC_BASE<"ldi.d", MSA128D>; 2040 2041 2042class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h, 2043 MSA128HOpnd>; 2044class MADD_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.w", int_mips_madd_q_w, 2045 MSA128WOpnd>; 2046 2047class MADDR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.h", int_mips_maddr_q_h, 2048 MSA128HOpnd>; 2049class MADDR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.w", int_mips_maddr_q_w, 2050 MSA128WOpnd>; 2051 2052class MADDV_B_DESC : MSA_3R_4R_DESC_BASE<"maddv.b", muladd, MSA128BOpnd>; 2053class MADDV_H_DESC : MSA_3R_4R_DESC_BASE<"maddv.h", muladd, MSA128HOpnd>; 2054class MADDV_W_DESC : MSA_3R_4R_DESC_BASE<"maddv.w", muladd, MSA128WOpnd>; 2055class MADDV_D_DESC : MSA_3R_4R_DESC_BASE<"maddv.d", muladd, MSA128DOpnd>; 2056 2057class MAX_A_B_DESC : MSA_3R_DESC_BASE<"max_a.b", int_mips_max_a_b, MSA128BOpnd>; 2058class MAX_A_H_DESC : MSA_3R_DESC_BASE<"max_a.h", int_mips_max_a_h, MSA128HOpnd>; 2059class MAX_A_W_DESC : MSA_3R_DESC_BASE<"max_a.w", int_mips_max_a_w, MSA128WOpnd>; 2060class MAX_A_D_DESC : MSA_3R_DESC_BASE<"max_a.d", int_mips_max_a_d, MSA128DOpnd>; 2061 2062class MAX_S_B_DESC : MSA_3R_DESC_BASE<"max_s.b", MipsVSMax, MSA128BOpnd>; 2063class MAX_S_H_DESC : MSA_3R_DESC_BASE<"max_s.h", MipsVSMax, MSA128HOpnd>; 2064class MAX_S_W_DESC : MSA_3R_DESC_BASE<"max_s.w", MipsVSMax, MSA128WOpnd>; 2065class MAX_S_D_DESC : MSA_3R_DESC_BASE<"max_s.d", MipsVSMax, MSA128DOpnd>; 2066 2067class MAX_U_B_DESC : MSA_3R_DESC_BASE<"max_u.b", MipsVUMax, MSA128BOpnd>; 2068class MAX_U_H_DESC : MSA_3R_DESC_BASE<"max_u.h", MipsVUMax, MSA128HOpnd>; 2069class MAX_U_W_DESC : MSA_3R_DESC_BASE<"max_u.w", MipsVUMax, MSA128WOpnd>; 2070class MAX_U_D_DESC : MSA_3R_DESC_BASE<"max_u.d", MipsVUMax, MSA128DOpnd>; 2071 2072class MAXI_S_B_DESC : MSA_I5_DESC_BASE<"maxi_s.b", MipsVSMax, vsplati8_simm5, 2073 MSA128BOpnd>; 2074class MAXI_S_H_DESC : MSA_I5_DESC_BASE<"maxi_s.h", MipsVSMax, vsplati16_simm5, 2075 MSA128HOpnd>; 2076class MAXI_S_W_DESC : MSA_I5_DESC_BASE<"maxi_s.w", MipsVSMax, vsplati32_simm5, 2077 MSA128WOpnd>; 2078class MAXI_S_D_DESC : MSA_I5_DESC_BASE<"maxi_s.d", MipsVSMax, vsplati64_simm5, 2079 MSA128DOpnd>; 2080 2081class MAXI_U_B_DESC : MSA_I5_DESC_BASE<"maxi_u.b", MipsVUMax, vsplati8_uimm5, 2082 MSA128BOpnd>; 2083class MAXI_U_H_DESC : MSA_I5_DESC_BASE<"maxi_u.h", MipsVUMax, vsplati16_uimm5, 2084 MSA128HOpnd>; 2085class MAXI_U_W_DESC : MSA_I5_DESC_BASE<"maxi_u.w", MipsVUMax, vsplati32_uimm5, 2086 MSA128WOpnd>; 2087class MAXI_U_D_DESC : MSA_I5_DESC_BASE<"maxi_u.d", MipsVUMax, vsplati64_uimm5, 2088 MSA128DOpnd>; 2089 2090class MIN_A_B_DESC : MSA_3R_DESC_BASE<"min_a.b", int_mips_min_a_b, MSA128BOpnd>; 2091class MIN_A_H_DESC : MSA_3R_DESC_BASE<"min_a.h", int_mips_min_a_h, MSA128HOpnd>; 2092class MIN_A_W_DESC : MSA_3R_DESC_BASE<"min_a.w", int_mips_min_a_w, MSA128WOpnd>; 2093class MIN_A_D_DESC : MSA_3R_DESC_BASE<"min_a.d", int_mips_min_a_d, MSA128DOpnd>; 2094 2095class MIN_S_B_DESC : MSA_3R_DESC_BASE<"min_s.b", MipsVSMin, MSA128BOpnd>; 2096class MIN_S_H_DESC : MSA_3R_DESC_BASE<"min_s.h", MipsVSMin, MSA128HOpnd>; 2097class MIN_S_W_DESC : MSA_3R_DESC_BASE<"min_s.w", MipsVSMin, MSA128WOpnd>; 2098class MIN_S_D_DESC : MSA_3R_DESC_BASE<"min_s.d", MipsVSMin, MSA128DOpnd>; 2099 2100class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", MipsVUMin, MSA128BOpnd>; 2101class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", MipsVUMin, MSA128HOpnd>; 2102class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", MipsVUMin, MSA128WOpnd>; 2103class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", MipsVUMin, MSA128DOpnd>; 2104 2105class MINI_S_B_DESC : MSA_I5_DESC_BASE<"mini_s.b", MipsVSMin, vsplati8_simm5, 2106 MSA128BOpnd>; 2107class MINI_S_H_DESC : MSA_I5_DESC_BASE<"mini_s.h", MipsVSMin, vsplati16_simm5, 2108 MSA128HOpnd>; 2109class MINI_S_W_DESC : MSA_I5_DESC_BASE<"mini_s.w", MipsVSMin, vsplati32_simm5, 2110 MSA128WOpnd>; 2111class MINI_S_D_DESC : MSA_I5_DESC_BASE<"mini_s.d", MipsVSMin, vsplati64_simm5, 2112 MSA128DOpnd>; 2113 2114class MINI_U_B_DESC : MSA_I5_DESC_BASE<"mini_u.b", MipsVUMin, vsplati8_uimm5, 2115 MSA128BOpnd>; 2116class MINI_U_H_DESC : MSA_I5_DESC_BASE<"mini_u.h", MipsVUMin, vsplati16_uimm5, 2117 MSA128HOpnd>; 2118class MINI_U_W_DESC : MSA_I5_DESC_BASE<"mini_u.w", MipsVUMin, vsplati32_uimm5, 2119 MSA128WOpnd>; 2120class MINI_U_D_DESC : MSA_I5_DESC_BASE<"mini_u.d", MipsVUMin, vsplati64_uimm5, 2121 MSA128DOpnd>; 2122 2123class MOD_S_B_DESC : MSA_3R_DESC_BASE<"mod_s.b", srem, MSA128BOpnd>; 2124class MOD_S_H_DESC : MSA_3R_DESC_BASE<"mod_s.h", srem, MSA128HOpnd>; 2125class MOD_S_W_DESC : MSA_3R_DESC_BASE<"mod_s.w", srem, MSA128WOpnd>; 2126class MOD_S_D_DESC : MSA_3R_DESC_BASE<"mod_s.d", srem, MSA128DOpnd>; 2127 2128class MOD_U_B_DESC : MSA_3R_DESC_BASE<"mod_u.b", urem, MSA128BOpnd>; 2129class MOD_U_H_DESC : MSA_3R_DESC_BASE<"mod_u.h", urem, MSA128HOpnd>; 2130class MOD_U_W_DESC : MSA_3R_DESC_BASE<"mod_u.w", urem, MSA128WOpnd>; 2131class MOD_U_D_DESC : MSA_3R_DESC_BASE<"mod_u.d", urem, MSA128DOpnd>; 2132 2133class MOVE_V_DESC { 2134 dag OutOperandList = (outs MSA128B:$wd); 2135 dag InOperandList = (ins MSA128B:$ws); 2136 string AsmString = "move.v\t$wd, $ws"; 2137 list<dag> Pattern = []; 2138 InstrItinClass Itinerary = NoItinerary; 2139} 2140 2141class MSUB_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.h", int_mips_msub_q_h, 2142 MSA128HOpnd>; 2143class MSUB_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.w", int_mips_msub_q_w, 2144 MSA128WOpnd>; 2145 2146class MSUBR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.h", int_mips_msubr_q_h, 2147 MSA128HOpnd>; 2148class MSUBR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.w", int_mips_msubr_q_w, 2149 MSA128WOpnd>; 2150 2151class MSUBV_B_DESC : MSA_3R_4R_DESC_BASE<"msubv.b", mulsub, MSA128BOpnd>; 2152class MSUBV_H_DESC : MSA_3R_4R_DESC_BASE<"msubv.h", mulsub, MSA128HOpnd>; 2153class MSUBV_W_DESC : MSA_3R_4R_DESC_BASE<"msubv.w", mulsub, MSA128WOpnd>; 2154class MSUBV_D_DESC : MSA_3R_4R_DESC_BASE<"msubv.d", mulsub, MSA128DOpnd>; 2155 2156class MUL_Q_H_DESC : MSA_3RF_DESC_BASE<"mul_q.h", int_mips_mul_q_h, 2157 MSA128HOpnd>; 2158class MUL_Q_W_DESC : MSA_3RF_DESC_BASE<"mul_q.w", int_mips_mul_q_w, 2159 MSA128WOpnd>; 2160 2161class MULR_Q_H_DESC : MSA_3RF_DESC_BASE<"mulr_q.h", int_mips_mulr_q_h, 2162 MSA128HOpnd>; 2163class MULR_Q_W_DESC : MSA_3RF_DESC_BASE<"mulr_q.w", int_mips_mulr_q_w, 2164 MSA128WOpnd>; 2165 2166class MULV_B_DESC : MSA_3R_DESC_BASE<"mulv.b", mul, MSA128BOpnd>; 2167class MULV_H_DESC : MSA_3R_DESC_BASE<"mulv.h", mul, MSA128HOpnd>; 2168class MULV_W_DESC : MSA_3R_DESC_BASE<"mulv.w", mul, MSA128WOpnd>; 2169class MULV_D_DESC : MSA_3R_DESC_BASE<"mulv.d", mul, MSA128DOpnd>; 2170 2171class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b, MSA128BOpnd>; 2172class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h, MSA128HOpnd>; 2173class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w, MSA128WOpnd>; 2174class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d, MSA128DOpnd>; 2175 2176class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", ctlz, MSA128BOpnd>; 2177class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", ctlz, MSA128HOpnd>; 2178class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", ctlz, MSA128WOpnd>; 2179class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", ctlz, MSA128DOpnd>; 2180 2181class NOR_V_DESC : MSA_VEC_DESC_BASE<"nor.v", MipsVNOR, MSA128BOpnd>; 2182class NOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128HOpnd>; 2183class NOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128WOpnd>; 2184class NOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128DOpnd>; 2185 2186class NORI_B_DESC : MSA_I8_DESC_BASE<"nori.b", MipsVNOR, vsplati8_uimm8, 2187 MSA128BOpnd>; 2188 2189class OR_V_DESC : MSA_VEC_DESC_BASE<"or.v", or, MSA128BOpnd>; 2190class OR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128HOpnd>; 2191class OR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128WOpnd>; 2192class OR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128DOpnd>; 2193 2194class ORI_B_DESC : MSA_I8_DESC_BASE<"ori.b", or, vsplati8_uimm8, MSA128BOpnd>; 2195 2196class PCKEV_B_DESC : MSA_3R_DESC_BASE<"pckev.b", MipsPCKEV, MSA128BOpnd>; 2197class PCKEV_H_DESC : MSA_3R_DESC_BASE<"pckev.h", MipsPCKEV, MSA128HOpnd>; 2198class PCKEV_W_DESC : MSA_3R_DESC_BASE<"pckev.w", MipsPCKEV, MSA128WOpnd>; 2199class PCKEV_D_DESC : MSA_3R_DESC_BASE<"pckev.d", MipsPCKEV, MSA128DOpnd>; 2200 2201class PCKOD_B_DESC : MSA_3R_DESC_BASE<"pckod.b", MipsPCKOD, MSA128BOpnd>; 2202class PCKOD_H_DESC : MSA_3R_DESC_BASE<"pckod.h", MipsPCKOD, MSA128HOpnd>; 2203class PCKOD_W_DESC : MSA_3R_DESC_BASE<"pckod.w", MipsPCKOD, MSA128WOpnd>; 2204class PCKOD_D_DESC : MSA_3R_DESC_BASE<"pckod.d", MipsPCKOD, MSA128DOpnd>; 2205 2206class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", ctpop, MSA128BOpnd>; 2207class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", ctpop, MSA128HOpnd>; 2208class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", ctpop, MSA128WOpnd>; 2209class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", ctpop, MSA128DOpnd>; 2210 2211class SAT_S_B_DESC : MSA_BIT_B_DESC_BASE<"sat_s.b", int_mips_sat_s_b, 2212 MSA128BOpnd>; 2213class SAT_S_H_DESC : MSA_BIT_H_DESC_BASE<"sat_s.h", int_mips_sat_s_h, 2214 MSA128HOpnd>; 2215class SAT_S_W_DESC : MSA_BIT_W_DESC_BASE<"sat_s.w", int_mips_sat_s_w, 2216 MSA128WOpnd>; 2217class SAT_S_D_DESC : MSA_BIT_D_DESC_BASE<"sat_s.d", int_mips_sat_s_d, 2218 MSA128DOpnd>; 2219 2220class SAT_U_B_DESC : MSA_BIT_B_DESC_BASE<"sat_u.b", int_mips_sat_u_b, 2221 MSA128BOpnd>; 2222class SAT_U_H_DESC : MSA_BIT_H_DESC_BASE<"sat_u.h", int_mips_sat_u_h, 2223 MSA128HOpnd>; 2224class SAT_U_W_DESC : MSA_BIT_W_DESC_BASE<"sat_u.w", int_mips_sat_u_w, 2225 MSA128WOpnd>; 2226class SAT_U_D_DESC : MSA_BIT_D_DESC_BASE<"sat_u.d", int_mips_sat_u_d, 2227 MSA128DOpnd>; 2228 2229class SHF_B_DESC : MSA_I8_SHF_DESC_BASE<"shf.b", MSA128BOpnd>; 2230class SHF_H_DESC : MSA_I8_SHF_DESC_BASE<"shf.h", MSA128HOpnd>; 2231class SHF_W_DESC : MSA_I8_SHF_DESC_BASE<"shf.w", MSA128WOpnd>; 2232 2233class SLD_B_DESC : MSA_3R_DESC_BASE<"sld.b", int_mips_sld_b, MSA128BOpnd>; 2234class SLD_H_DESC : MSA_3R_DESC_BASE<"sld.h", int_mips_sld_h, MSA128HOpnd>; 2235class SLD_W_DESC : MSA_3R_DESC_BASE<"sld.w", int_mips_sld_w, MSA128WOpnd>; 2236class SLD_D_DESC : MSA_3R_DESC_BASE<"sld.d", int_mips_sld_d, MSA128DOpnd>; 2237 2238class SLDI_B_DESC : MSA_ELM_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128BOpnd>; 2239class SLDI_H_DESC : MSA_ELM_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128HOpnd>; 2240class SLDI_W_DESC : MSA_ELM_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128WOpnd>; 2241class SLDI_D_DESC : MSA_ELM_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128DOpnd>; 2242 2243class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", shl, MSA128BOpnd>; 2244class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", shl, MSA128HOpnd>; 2245class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", shl, MSA128WOpnd>; 2246class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", shl, MSA128DOpnd>; 2247 2248class SLLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.b", shl, vsplati8_uimm3, 2249 MSA128BOpnd>; 2250class SLLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.h", shl, vsplati16_uimm4, 2251 MSA128HOpnd>; 2252class SLLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.w", shl, vsplati32_uimm5, 2253 MSA128WOpnd>; 2254class SLLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.d", shl, vsplati64_uimm6, 2255 MSA128DOpnd>; 2256 2257class SPLAT_B_DESC : MSA_3R_DESC_BASE<"splat.b", int_mips_splat_b, MSA128BOpnd, 2258 MSA128BOpnd, GPR32Opnd>; 2259class SPLAT_H_DESC : MSA_3R_DESC_BASE<"splat.h", int_mips_splat_h, MSA128HOpnd, 2260 MSA128HOpnd, GPR32Opnd>; 2261class SPLAT_W_DESC : MSA_3R_DESC_BASE<"splat.w", int_mips_splat_w, MSA128WOpnd, 2262 MSA128WOpnd, GPR32Opnd>; 2263class SPLAT_D_DESC : MSA_3R_DESC_BASE<"splat.d", int_mips_splat_d, MSA128DOpnd, 2264 MSA128DOpnd, GPR32Opnd>; 2265 2266class SPLATI_B_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.b", vsplati8_uimm4, 2267 MSA128BOpnd>; 2268class SPLATI_H_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.h", vsplati16_uimm3, 2269 MSA128HOpnd>; 2270class SPLATI_W_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.w", vsplati32_uimm2, 2271 MSA128WOpnd>; 2272class SPLATI_D_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.d", vsplati64_uimm1, 2273 MSA128DOpnd>; 2274 2275class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", sra, MSA128BOpnd>; 2276class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", sra, MSA128HOpnd>; 2277class SRA_W_DESC : MSA_3R_DESC_BASE<"sra.w", sra, MSA128WOpnd>; 2278class SRA_D_DESC : MSA_3R_DESC_BASE<"sra.d", sra, MSA128DOpnd>; 2279 2280class SRAI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.b", sra, vsplati8_uimm3, 2281 MSA128BOpnd>; 2282class SRAI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.h", sra, vsplati16_uimm4, 2283 MSA128HOpnd>; 2284class SRAI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.w", sra, vsplati32_uimm5, 2285 MSA128WOpnd>; 2286class SRAI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.d", sra, vsplati64_uimm6, 2287 MSA128DOpnd>; 2288 2289class SRAR_B_DESC : MSA_3R_DESC_BASE<"srar.b", int_mips_srar_b, MSA128BOpnd>; 2290class SRAR_H_DESC : MSA_3R_DESC_BASE<"srar.h", int_mips_srar_h, MSA128HOpnd>; 2291class SRAR_W_DESC : MSA_3R_DESC_BASE<"srar.w", int_mips_srar_w, MSA128WOpnd>; 2292class SRAR_D_DESC : MSA_3R_DESC_BASE<"srar.d", int_mips_srar_d, MSA128DOpnd>; 2293 2294class SRARI_B_DESC : MSA_BIT_B_DESC_BASE<"srari.b", int_mips_srari_b, 2295 MSA128BOpnd>; 2296class SRARI_H_DESC : MSA_BIT_H_DESC_BASE<"srari.h", int_mips_srari_h, 2297 MSA128HOpnd>; 2298class SRARI_W_DESC : MSA_BIT_W_DESC_BASE<"srari.w", int_mips_srari_w, 2299 MSA128WOpnd>; 2300class SRARI_D_DESC : MSA_BIT_D_DESC_BASE<"srari.d", int_mips_srari_d, 2301 MSA128DOpnd>; 2302 2303class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", srl, MSA128BOpnd>; 2304class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", srl, MSA128HOpnd>; 2305class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", srl, MSA128WOpnd>; 2306class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", srl, MSA128DOpnd>; 2307 2308class SRLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.b", srl, vsplati8_uimm3, 2309 MSA128BOpnd>; 2310class SRLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.h", srl, vsplati16_uimm4, 2311 MSA128HOpnd>; 2312class SRLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.w", srl, vsplati32_uimm5, 2313 MSA128WOpnd>; 2314class SRLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.d", srl, vsplati64_uimm6, 2315 MSA128DOpnd>; 2316 2317class SRLR_B_DESC : MSA_3R_DESC_BASE<"srlr.b", int_mips_srlr_b, MSA128BOpnd>; 2318class SRLR_H_DESC : MSA_3R_DESC_BASE<"srlr.h", int_mips_srlr_h, MSA128HOpnd>; 2319class SRLR_W_DESC : MSA_3R_DESC_BASE<"srlr.w", int_mips_srlr_w, MSA128WOpnd>; 2320class SRLR_D_DESC : MSA_3R_DESC_BASE<"srlr.d", int_mips_srlr_d, MSA128DOpnd>; 2321 2322class SRLRI_B_DESC : MSA_BIT_B_DESC_BASE<"srlri.b", int_mips_srlri_b, 2323 MSA128BOpnd>; 2324class SRLRI_H_DESC : MSA_BIT_H_DESC_BASE<"srlri.h", int_mips_srlri_h, 2325 MSA128HOpnd>; 2326class SRLRI_W_DESC : MSA_BIT_W_DESC_BASE<"srlri.w", int_mips_srlri_w, 2327 MSA128WOpnd>; 2328class SRLRI_D_DESC : MSA_BIT_D_DESC_BASE<"srlri.d", int_mips_srlri_d, 2329 MSA128DOpnd>; 2330 2331class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2332 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem, 2333 ComplexPattern Addr = addrRegImm, 2334 InstrItinClass itin = NoItinerary> { 2335 dag OutOperandList = (outs); 2336 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr); 2337 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2338 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)]; 2339 InstrItinClass Itinerary = itin; 2340} 2341 2342class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, MSA128B>; 2343class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, MSA128H>; 2344class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, MSA128W>; 2345class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, MSA128D>; 2346 2347class SUBS_S_B_DESC : MSA_3R_DESC_BASE<"subs_s.b", int_mips_subs_s_b, 2348 MSA128BOpnd>; 2349class SUBS_S_H_DESC : MSA_3R_DESC_BASE<"subs_s.h", int_mips_subs_s_h, 2350 MSA128HOpnd>; 2351class SUBS_S_W_DESC : MSA_3R_DESC_BASE<"subs_s.w", int_mips_subs_s_w, 2352 MSA128WOpnd>; 2353class SUBS_S_D_DESC : MSA_3R_DESC_BASE<"subs_s.d", int_mips_subs_s_d, 2354 MSA128DOpnd>; 2355 2356class SUBS_U_B_DESC : MSA_3R_DESC_BASE<"subs_u.b", int_mips_subs_u_b, 2357 MSA128BOpnd>; 2358class SUBS_U_H_DESC : MSA_3R_DESC_BASE<"subs_u.h", int_mips_subs_u_h, 2359 MSA128HOpnd>; 2360class SUBS_U_W_DESC : MSA_3R_DESC_BASE<"subs_u.w", int_mips_subs_u_w, 2361 MSA128WOpnd>; 2362class SUBS_U_D_DESC : MSA_3R_DESC_BASE<"subs_u.d", int_mips_subs_u_d, 2363 MSA128DOpnd>; 2364 2365class SUBSUS_U_B_DESC : MSA_3R_DESC_BASE<"subsus_u.b", int_mips_subsus_u_b, 2366 MSA128BOpnd>; 2367class SUBSUS_U_H_DESC : MSA_3R_DESC_BASE<"subsus_u.h", int_mips_subsus_u_h, 2368 MSA128HOpnd>; 2369class SUBSUS_U_W_DESC : MSA_3R_DESC_BASE<"subsus_u.w", int_mips_subsus_u_w, 2370 MSA128WOpnd>; 2371class SUBSUS_U_D_DESC : MSA_3R_DESC_BASE<"subsus_u.d", int_mips_subsus_u_d, 2372 MSA128DOpnd>; 2373 2374class SUBSUU_S_B_DESC : MSA_3R_DESC_BASE<"subsuu_s.b", int_mips_subsuu_s_b, 2375 MSA128BOpnd>; 2376class SUBSUU_S_H_DESC : MSA_3R_DESC_BASE<"subsuu_s.h", int_mips_subsuu_s_h, 2377 MSA128HOpnd>; 2378class SUBSUU_S_W_DESC : MSA_3R_DESC_BASE<"subsuu_s.w", int_mips_subsuu_s_w, 2379 MSA128WOpnd>; 2380class SUBSUU_S_D_DESC : MSA_3R_DESC_BASE<"subsuu_s.d", int_mips_subsuu_s_d, 2381 MSA128DOpnd>; 2382 2383class SUBV_B_DESC : MSA_3R_DESC_BASE<"subv.b", sub, MSA128BOpnd>; 2384class SUBV_H_DESC : MSA_3R_DESC_BASE<"subv.h", sub, MSA128HOpnd>; 2385class SUBV_W_DESC : MSA_3R_DESC_BASE<"subv.w", sub, MSA128WOpnd>; 2386class SUBV_D_DESC : MSA_3R_DESC_BASE<"subv.d", sub, MSA128DOpnd>; 2387 2388class SUBVI_B_DESC : MSA_I5_DESC_BASE<"subvi.b", sub, vsplati8_uimm5, 2389 MSA128BOpnd>; 2390class SUBVI_H_DESC : MSA_I5_DESC_BASE<"subvi.h", sub, vsplati16_uimm5, 2391 MSA128HOpnd>; 2392class SUBVI_W_DESC : MSA_I5_DESC_BASE<"subvi.w", sub, vsplati32_uimm5, 2393 MSA128WOpnd>; 2394class SUBVI_D_DESC : MSA_I5_DESC_BASE<"subvi.d", sub, vsplati64_uimm5, 2395 MSA128DOpnd>; 2396 2397class VSHF_B_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.b", MSA128BOpnd>; 2398class VSHF_H_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.h", MSA128HOpnd>; 2399class VSHF_W_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.w", MSA128WOpnd>; 2400class VSHF_D_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.d", MSA128DOpnd>; 2401 2402class XOR_V_DESC : MSA_VEC_DESC_BASE<"xor.v", xor, MSA128BOpnd>; 2403class XOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128HOpnd>; 2404class XOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128WOpnd>; 2405class XOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128DOpnd>; 2406 2407class XORI_B_DESC : MSA_I8_DESC_BASE<"xori.b", xor, vsplati8_uimm8, 2408 MSA128BOpnd>; 2409 2410// Instruction defs. 2411def ADD_A_B : ADD_A_B_ENC, ADD_A_B_DESC; 2412def ADD_A_H : ADD_A_H_ENC, ADD_A_H_DESC; 2413def ADD_A_W : ADD_A_W_ENC, ADD_A_W_DESC; 2414def ADD_A_D : ADD_A_D_ENC, ADD_A_D_DESC; 2415 2416def ADDS_A_B : ADDS_A_B_ENC, ADDS_A_B_DESC; 2417def ADDS_A_H : ADDS_A_H_ENC, ADDS_A_H_DESC; 2418def ADDS_A_W : ADDS_A_W_ENC, ADDS_A_W_DESC; 2419def ADDS_A_D : ADDS_A_D_ENC, ADDS_A_D_DESC; 2420 2421def ADDS_S_B : ADDS_S_B_ENC, ADDS_S_B_DESC; 2422def ADDS_S_H : ADDS_S_H_ENC, ADDS_S_H_DESC; 2423def ADDS_S_W : ADDS_S_W_ENC, ADDS_S_W_DESC; 2424def ADDS_S_D : ADDS_S_D_ENC, ADDS_S_D_DESC; 2425 2426def ADDS_U_B : ADDS_U_B_ENC, ADDS_U_B_DESC; 2427def ADDS_U_H : ADDS_U_H_ENC, ADDS_U_H_DESC; 2428def ADDS_U_W : ADDS_U_W_ENC, ADDS_U_W_DESC; 2429def ADDS_U_D : ADDS_U_D_ENC, ADDS_U_D_DESC; 2430 2431def ADDV_B : ADDV_B_ENC, ADDV_B_DESC; 2432def ADDV_H : ADDV_H_ENC, ADDV_H_DESC; 2433def ADDV_W : ADDV_W_ENC, ADDV_W_DESC; 2434def ADDV_D : ADDV_D_ENC, ADDV_D_DESC; 2435 2436def ADDVI_B : ADDVI_B_ENC, ADDVI_B_DESC; 2437def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC; 2438def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC; 2439def ADDVI_D : ADDVI_D_ENC, ADDVI_D_DESC; 2440 2441def AND_V : AND_V_ENC, AND_V_DESC; 2442def AND_V_H_PSEUDO : AND_V_H_PSEUDO_DESC, 2443 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd, 2444 MSA128BOpnd:$ws, 2445 MSA128BOpnd:$wt)>; 2446def AND_V_W_PSEUDO : AND_V_W_PSEUDO_DESC, 2447 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd, 2448 MSA128BOpnd:$ws, 2449 MSA128BOpnd:$wt)>; 2450def AND_V_D_PSEUDO : AND_V_D_PSEUDO_DESC, 2451 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd, 2452 MSA128BOpnd:$ws, 2453 MSA128BOpnd:$wt)>; 2454 2455def ANDI_B : ANDI_B_ENC, ANDI_B_DESC; 2456 2457def ASUB_S_B : ASUB_S_B_ENC, ASUB_S_B_DESC; 2458def ASUB_S_H : ASUB_S_H_ENC, ASUB_S_H_DESC; 2459def ASUB_S_W : ASUB_S_W_ENC, ASUB_S_W_DESC; 2460def ASUB_S_D : ASUB_S_D_ENC, ASUB_S_D_DESC; 2461 2462def ASUB_U_B : ASUB_U_B_ENC, ASUB_U_B_DESC; 2463def ASUB_U_H : ASUB_U_H_ENC, ASUB_U_H_DESC; 2464def ASUB_U_W : ASUB_U_W_ENC, ASUB_U_W_DESC; 2465def ASUB_U_D : ASUB_U_D_ENC, ASUB_U_D_DESC; 2466 2467def AVE_S_B : AVE_S_B_ENC, AVE_S_B_DESC; 2468def AVE_S_H : AVE_S_H_ENC, AVE_S_H_DESC; 2469def AVE_S_W : AVE_S_W_ENC, AVE_S_W_DESC; 2470def AVE_S_D : AVE_S_D_ENC, AVE_S_D_DESC; 2471 2472def AVE_U_B : AVE_U_B_ENC, AVE_U_B_DESC; 2473def AVE_U_H : AVE_U_H_ENC, AVE_U_H_DESC; 2474def AVE_U_W : AVE_U_W_ENC, AVE_U_W_DESC; 2475def AVE_U_D : AVE_U_D_ENC, AVE_U_D_DESC; 2476 2477def AVER_S_B : AVER_S_B_ENC, AVER_S_B_DESC; 2478def AVER_S_H : AVER_S_H_ENC, AVER_S_H_DESC; 2479def AVER_S_W : AVER_S_W_ENC, AVER_S_W_DESC; 2480def AVER_S_D : AVER_S_D_ENC, AVER_S_D_DESC; 2481 2482def AVER_U_B : AVER_U_B_ENC, AVER_U_B_DESC; 2483def AVER_U_H : AVER_U_H_ENC, AVER_U_H_DESC; 2484def AVER_U_W : AVER_U_W_ENC, AVER_U_W_DESC; 2485def AVER_U_D : AVER_U_D_ENC, AVER_U_D_DESC; 2486 2487def BCLR_B : BCLR_B_ENC, BCLR_B_DESC; 2488def BCLR_H : BCLR_H_ENC, BCLR_H_DESC; 2489def BCLR_W : BCLR_W_ENC, BCLR_W_DESC; 2490def BCLR_D : BCLR_D_ENC, BCLR_D_DESC; 2491 2492def BCLRI_B : BCLRI_B_ENC, BCLRI_B_DESC; 2493def BCLRI_H : BCLRI_H_ENC, BCLRI_H_DESC; 2494def BCLRI_W : BCLRI_W_ENC, BCLRI_W_DESC; 2495def BCLRI_D : BCLRI_D_ENC, BCLRI_D_DESC; 2496 2497def BINSL_B : BINSL_B_ENC, BINSL_B_DESC; 2498def BINSL_H : BINSL_H_ENC, BINSL_H_DESC; 2499def BINSL_W : BINSL_W_ENC, BINSL_W_DESC; 2500def BINSL_D : BINSL_D_ENC, BINSL_D_DESC; 2501 2502def BINSLI_B : BINSLI_B_ENC, BINSLI_B_DESC; 2503def BINSLI_H : BINSLI_H_ENC, BINSLI_H_DESC; 2504def BINSLI_W : BINSLI_W_ENC, BINSLI_W_DESC; 2505def BINSLI_D : BINSLI_D_ENC, BINSLI_D_DESC; 2506 2507def BINSR_B : BINSR_B_ENC, BINSR_B_DESC; 2508def BINSR_H : BINSR_H_ENC, BINSR_H_DESC; 2509def BINSR_W : BINSR_W_ENC, BINSR_W_DESC; 2510def BINSR_D : BINSR_D_ENC, BINSR_D_DESC; 2511 2512def BINSRI_B : BINSRI_B_ENC, BINSRI_B_DESC; 2513def BINSRI_H : BINSRI_H_ENC, BINSRI_H_DESC; 2514def BINSRI_W : BINSRI_W_ENC, BINSRI_W_DESC; 2515def BINSRI_D : BINSRI_D_ENC, BINSRI_D_DESC; 2516 2517def BMNZ_V : BMNZ_V_ENC, BMNZ_V_DESC; 2518 2519def BMNZI_B : BMNZI_B_ENC, BMNZI_B_DESC; 2520 2521def BMZ_V : BMZ_V_ENC, BMZ_V_DESC; 2522 2523def BMZI_B : BMZI_B_ENC, BMZI_B_DESC; 2524 2525def BNEG_B : BNEG_B_ENC, BNEG_B_DESC; 2526def BNEG_H : BNEG_H_ENC, BNEG_H_DESC; 2527def BNEG_W : BNEG_W_ENC, BNEG_W_DESC; 2528def BNEG_D : BNEG_D_ENC, BNEG_D_DESC; 2529 2530def BNEGI_B : BNEGI_B_ENC, BNEGI_B_DESC; 2531def BNEGI_H : BNEGI_H_ENC, BNEGI_H_DESC; 2532def BNEGI_W : BNEGI_W_ENC, BNEGI_W_DESC; 2533def BNEGI_D : BNEGI_D_ENC, BNEGI_D_DESC; 2534 2535def BNZ_B : BNZ_B_ENC, BNZ_B_DESC; 2536def BNZ_H : BNZ_H_ENC, BNZ_H_DESC; 2537def BNZ_W : BNZ_W_ENC, BNZ_W_DESC; 2538def BNZ_D : BNZ_D_ENC, BNZ_D_DESC; 2539 2540def BNZ_V : BNZ_V_ENC, BNZ_V_DESC; 2541 2542def BSEL_V : BSEL_V_ENC, BSEL_V_DESC; 2543 2544class MSA_BSEL_PSEUDO_BASE<RegisterOperand RO, ValueType Ty> : 2545 MipsPseudo<(outs RO:$wd), (ins RO:$wd_in, RO:$ws, RO:$wt), 2546 [(set RO:$wd, (Ty (vselect RO:$wd_in, RO:$ws, RO:$wt)))]>, 2547 PseudoInstExpansion<(BSEL_V MSA128BOpnd:$wd, MSA128BOpnd:$wd_in, 2548 MSA128BOpnd:$ws, MSA128BOpnd:$wt)> { 2549 let Constraints = "$wd_in = $wd"; 2550} 2551 2552def BSEL_H_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128HOpnd, v8i16>; 2553def BSEL_W_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128WOpnd, v4i32>; 2554def BSEL_D_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128DOpnd, v2i64>; 2555def BSEL_FW_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128WOpnd, v4f32>; 2556def BSEL_FD_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128DOpnd, v2f64>; 2557 2558def BSELI_B : BSELI_B_ENC, BSELI_B_DESC; 2559 2560def BSET_B : BSET_B_ENC, BSET_B_DESC; 2561def BSET_H : BSET_H_ENC, BSET_H_DESC; 2562def BSET_W : BSET_W_ENC, BSET_W_DESC; 2563def BSET_D : BSET_D_ENC, BSET_D_DESC; 2564 2565def BSETI_B : BSETI_B_ENC, BSETI_B_DESC; 2566def BSETI_H : BSETI_H_ENC, BSETI_H_DESC; 2567def BSETI_W : BSETI_W_ENC, BSETI_W_DESC; 2568def BSETI_D : BSETI_D_ENC, BSETI_D_DESC; 2569 2570def BZ_B : BZ_B_ENC, BZ_B_DESC; 2571def BZ_H : BZ_H_ENC, BZ_H_DESC; 2572def BZ_W : BZ_W_ENC, BZ_W_DESC; 2573def BZ_D : BZ_D_ENC, BZ_D_DESC; 2574 2575def BZ_V : BZ_V_ENC, BZ_V_DESC; 2576 2577def CEQ_B : CEQ_B_ENC, CEQ_B_DESC; 2578def CEQ_H : CEQ_H_ENC, CEQ_H_DESC; 2579def CEQ_W : CEQ_W_ENC, CEQ_W_DESC; 2580def CEQ_D : CEQ_D_ENC, CEQ_D_DESC; 2581 2582def CEQI_B : CEQI_B_ENC, CEQI_B_DESC; 2583def CEQI_H : CEQI_H_ENC, CEQI_H_DESC; 2584def CEQI_W : CEQI_W_ENC, CEQI_W_DESC; 2585def CEQI_D : CEQI_D_ENC, CEQI_D_DESC; 2586 2587def CFCMSA : CFCMSA_ENC, CFCMSA_DESC; 2588 2589def CLE_S_B : CLE_S_B_ENC, CLE_S_B_DESC; 2590def CLE_S_H : CLE_S_H_ENC, CLE_S_H_DESC; 2591def CLE_S_W : CLE_S_W_ENC, CLE_S_W_DESC; 2592def CLE_S_D : CLE_S_D_ENC, CLE_S_D_DESC; 2593 2594def CLE_U_B : CLE_U_B_ENC, CLE_U_B_DESC; 2595def CLE_U_H : CLE_U_H_ENC, CLE_U_H_DESC; 2596def CLE_U_W : CLE_U_W_ENC, CLE_U_W_DESC; 2597def CLE_U_D : CLE_U_D_ENC, CLE_U_D_DESC; 2598 2599def CLEI_S_B : CLEI_S_B_ENC, CLEI_S_B_DESC; 2600def CLEI_S_H : CLEI_S_H_ENC, CLEI_S_H_DESC; 2601def CLEI_S_W : CLEI_S_W_ENC, CLEI_S_W_DESC; 2602def CLEI_S_D : CLEI_S_D_ENC, CLEI_S_D_DESC; 2603 2604def CLEI_U_B : CLEI_U_B_ENC, CLEI_U_B_DESC; 2605def CLEI_U_H : CLEI_U_H_ENC, CLEI_U_H_DESC; 2606def CLEI_U_W : CLEI_U_W_ENC, CLEI_U_W_DESC; 2607def CLEI_U_D : CLEI_U_D_ENC, CLEI_U_D_DESC; 2608 2609def CLT_S_B : CLT_S_B_ENC, CLT_S_B_DESC; 2610def CLT_S_H : CLT_S_H_ENC, CLT_S_H_DESC; 2611def CLT_S_W : CLT_S_W_ENC, CLT_S_W_DESC; 2612def CLT_S_D : CLT_S_D_ENC, CLT_S_D_DESC; 2613 2614def CLT_U_B : CLT_U_B_ENC, CLT_U_B_DESC; 2615def CLT_U_H : CLT_U_H_ENC, CLT_U_H_DESC; 2616def CLT_U_W : CLT_U_W_ENC, CLT_U_W_DESC; 2617def CLT_U_D : CLT_U_D_ENC, CLT_U_D_DESC; 2618 2619def CLTI_S_B : CLTI_S_B_ENC, CLTI_S_B_DESC; 2620def CLTI_S_H : CLTI_S_H_ENC, CLTI_S_H_DESC; 2621def CLTI_S_W : CLTI_S_W_ENC, CLTI_S_W_DESC; 2622def CLTI_S_D : CLTI_S_D_ENC, CLTI_S_D_DESC; 2623 2624def CLTI_U_B : CLTI_U_B_ENC, CLTI_U_B_DESC; 2625def CLTI_U_H : CLTI_U_H_ENC, CLTI_U_H_DESC; 2626def CLTI_U_W : CLTI_U_W_ENC, CLTI_U_W_DESC; 2627def CLTI_U_D : CLTI_U_D_ENC, CLTI_U_D_DESC; 2628 2629def COPY_S_B : COPY_S_B_ENC, COPY_S_B_DESC; 2630def COPY_S_H : COPY_S_H_ENC, COPY_S_H_DESC; 2631def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC; 2632 2633def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC; 2634def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC; 2635def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC; 2636 2637def COPY_FW_PSEUDO : COPY_FW_PSEUDO_DESC; 2638def COPY_FD_PSEUDO : COPY_FD_PSEUDO_DESC; 2639 2640def CTCMSA : CTCMSA_ENC, CTCMSA_DESC; 2641 2642def DIV_S_B : DIV_S_B_ENC, DIV_S_B_DESC; 2643def DIV_S_H : DIV_S_H_ENC, DIV_S_H_DESC; 2644def DIV_S_W : DIV_S_W_ENC, DIV_S_W_DESC; 2645def DIV_S_D : DIV_S_D_ENC, DIV_S_D_DESC; 2646 2647def DIV_U_B : DIV_U_B_ENC, DIV_U_B_DESC; 2648def DIV_U_H : DIV_U_H_ENC, DIV_U_H_DESC; 2649def DIV_U_W : DIV_U_W_ENC, DIV_U_W_DESC; 2650def DIV_U_D : DIV_U_D_ENC, DIV_U_D_DESC; 2651 2652def DOTP_S_H : DOTP_S_H_ENC, DOTP_S_H_DESC; 2653def DOTP_S_W : DOTP_S_W_ENC, DOTP_S_W_DESC; 2654def DOTP_S_D : DOTP_S_D_ENC, DOTP_S_D_DESC; 2655 2656def DOTP_U_H : DOTP_U_H_ENC, DOTP_U_H_DESC; 2657def DOTP_U_W : DOTP_U_W_ENC, DOTP_U_W_DESC; 2658def DOTP_U_D : DOTP_U_D_ENC, DOTP_U_D_DESC; 2659 2660def DPADD_S_H : DPADD_S_H_ENC, DPADD_S_H_DESC; 2661def DPADD_S_W : DPADD_S_W_ENC, DPADD_S_W_DESC; 2662def DPADD_S_D : DPADD_S_D_ENC, DPADD_S_D_DESC; 2663 2664def DPADD_U_H : DPADD_U_H_ENC, DPADD_U_H_DESC; 2665def DPADD_U_W : DPADD_U_W_ENC, DPADD_U_W_DESC; 2666def DPADD_U_D : DPADD_U_D_ENC, DPADD_U_D_DESC; 2667 2668def DPSUB_S_H : DPSUB_S_H_ENC, DPSUB_S_H_DESC; 2669def DPSUB_S_W : DPSUB_S_W_ENC, DPSUB_S_W_DESC; 2670def DPSUB_S_D : DPSUB_S_D_ENC, DPSUB_S_D_DESC; 2671 2672def DPSUB_U_H : DPSUB_U_H_ENC, DPSUB_U_H_DESC; 2673def DPSUB_U_W : DPSUB_U_W_ENC, DPSUB_U_W_DESC; 2674def DPSUB_U_D : DPSUB_U_D_ENC, DPSUB_U_D_DESC; 2675 2676def FADD_W : FADD_W_ENC, FADD_W_DESC; 2677def FADD_D : FADD_D_ENC, FADD_D_DESC; 2678 2679def FCAF_W : FCAF_W_ENC, FCAF_W_DESC; 2680def FCAF_D : FCAF_D_ENC, FCAF_D_DESC; 2681 2682def FCEQ_W : FCEQ_W_ENC, FCEQ_W_DESC; 2683def FCEQ_D : FCEQ_D_ENC, FCEQ_D_DESC; 2684 2685def FCLE_W : FCLE_W_ENC, FCLE_W_DESC; 2686def FCLE_D : FCLE_D_ENC, FCLE_D_DESC; 2687 2688def FCLT_W : FCLT_W_ENC, FCLT_W_DESC; 2689def FCLT_D : FCLT_D_ENC, FCLT_D_DESC; 2690 2691def FCLASS_W : FCLASS_W_ENC, FCLASS_W_DESC; 2692def FCLASS_D : FCLASS_D_ENC, FCLASS_D_DESC; 2693 2694def FCNE_W : FCNE_W_ENC, FCNE_W_DESC; 2695def FCNE_D : FCNE_D_ENC, FCNE_D_DESC; 2696 2697def FCOR_W : FCOR_W_ENC, FCOR_W_DESC; 2698def FCOR_D : FCOR_D_ENC, FCOR_D_DESC; 2699 2700def FCUEQ_W : FCUEQ_W_ENC, FCUEQ_W_DESC; 2701def FCUEQ_D : FCUEQ_D_ENC, FCUEQ_D_DESC; 2702 2703def FCULE_W : FCULE_W_ENC, FCULE_W_DESC; 2704def FCULE_D : FCULE_D_ENC, FCULE_D_DESC; 2705 2706def FCULT_W : FCULT_W_ENC, FCULT_W_DESC; 2707def FCULT_D : FCULT_D_ENC, FCULT_D_DESC; 2708 2709def FCUN_W : FCUN_W_ENC, FCUN_W_DESC; 2710def FCUN_D : FCUN_D_ENC, FCUN_D_DESC; 2711 2712def FCUNE_W : FCUNE_W_ENC, FCUNE_W_DESC; 2713def FCUNE_D : FCUNE_D_ENC, FCUNE_D_DESC; 2714 2715def FDIV_W : FDIV_W_ENC, FDIV_W_DESC; 2716def FDIV_D : FDIV_D_ENC, FDIV_D_DESC; 2717 2718def FEXDO_H : FEXDO_H_ENC, FEXDO_H_DESC; 2719def FEXDO_W : FEXDO_W_ENC, FEXDO_W_DESC; 2720 2721def FEXP2_W : FEXP2_W_ENC, FEXP2_W_DESC; 2722def FEXP2_D : FEXP2_D_ENC, FEXP2_D_DESC; 2723 2724def FEXUPL_W : FEXUPL_W_ENC, FEXUPL_W_DESC; 2725def FEXUPL_D : FEXUPL_D_ENC, FEXUPL_D_DESC; 2726 2727def FEXUPR_W : FEXUPR_W_ENC, FEXUPR_W_DESC; 2728def FEXUPR_D : FEXUPR_D_ENC, FEXUPR_D_DESC; 2729 2730def FFINT_S_W : FFINT_S_W_ENC, FFINT_S_W_DESC; 2731def FFINT_S_D : FFINT_S_D_ENC, FFINT_S_D_DESC; 2732 2733def FFINT_U_W : FFINT_U_W_ENC, FFINT_U_W_DESC; 2734def FFINT_U_D : FFINT_U_D_ENC, FFINT_U_D_DESC; 2735 2736def FFQL_W : FFQL_W_ENC, FFQL_W_DESC; 2737def FFQL_D : FFQL_D_ENC, FFQL_D_DESC; 2738 2739def FFQR_W : FFQR_W_ENC, FFQR_W_DESC; 2740def FFQR_D : FFQR_D_ENC, FFQR_D_DESC; 2741 2742def FILL_B : FILL_B_ENC, FILL_B_DESC; 2743def FILL_H : FILL_H_ENC, FILL_H_DESC; 2744def FILL_W : FILL_W_ENC, FILL_W_DESC; 2745def FILL_FW_PSEUDO : FILL_FW_PSEUDO_DESC; 2746def FILL_FD_PSEUDO : FILL_FD_PSEUDO_DESC; 2747 2748def FLOG2_W : FLOG2_W_ENC, FLOG2_W_DESC; 2749def FLOG2_D : FLOG2_D_ENC, FLOG2_D_DESC; 2750 2751def FMADD_W : FMADD_W_ENC, FMADD_W_DESC; 2752def FMADD_D : FMADD_D_ENC, FMADD_D_DESC; 2753 2754def FMAX_W : FMAX_W_ENC, FMAX_W_DESC; 2755def FMAX_D : FMAX_D_ENC, FMAX_D_DESC; 2756 2757def FMAX_A_W : FMAX_A_W_ENC, FMAX_A_W_DESC; 2758def FMAX_A_D : FMAX_A_D_ENC, FMAX_A_D_DESC; 2759 2760def FMIN_W : FMIN_W_ENC, FMIN_W_DESC; 2761def FMIN_D : FMIN_D_ENC, FMIN_D_DESC; 2762 2763def FMIN_A_W : FMIN_A_W_ENC, FMIN_A_W_DESC; 2764def FMIN_A_D : FMIN_A_D_ENC, FMIN_A_D_DESC; 2765 2766def FMSUB_W : FMSUB_W_ENC, FMSUB_W_DESC; 2767def FMSUB_D : FMSUB_D_ENC, FMSUB_D_DESC; 2768 2769def FMUL_W : FMUL_W_ENC, FMUL_W_DESC; 2770def FMUL_D : FMUL_D_ENC, FMUL_D_DESC; 2771 2772def FRINT_W : FRINT_W_ENC, FRINT_W_DESC; 2773def FRINT_D : FRINT_D_ENC, FRINT_D_DESC; 2774 2775def FRCP_W : FRCP_W_ENC, FRCP_W_DESC; 2776def FRCP_D : FRCP_D_ENC, FRCP_D_DESC; 2777 2778def FRSQRT_W : FRSQRT_W_ENC, FRSQRT_W_DESC; 2779def FRSQRT_D : FRSQRT_D_ENC, FRSQRT_D_DESC; 2780 2781def FSAF_W : FSAF_W_ENC, FSAF_W_DESC; 2782def FSAF_D : FSAF_D_ENC, FSAF_D_DESC; 2783 2784def FSEQ_W : FSEQ_W_ENC, FSEQ_W_DESC; 2785def FSEQ_D : FSEQ_D_ENC, FSEQ_D_DESC; 2786 2787def FSLE_W : FSLE_W_ENC, FSLE_W_DESC; 2788def FSLE_D : FSLE_D_ENC, FSLE_D_DESC; 2789 2790def FSLT_W : FSLT_W_ENC, FSLT_W_DESC; 2791def FSLT_D : FSLT_D_ENC, FSLT_D_DESC; 2792 2793def FSNE_W : FSNE_W_ENC, FSNE_W_DESC; 2794def FSNE_D : FSNE_D_ENC, FSNE_D_DESC; 2795 2796def FSOR_W : FSOR_W_ENC, FSOR_W_DESC; 2797def FSOR_D : FSOR_D_ENC, FSOR_D_DESC; 2798 2799def FSQRT_W : FSQRT_W_ENC, FSQRT_W_DESC; 2800def FSQRT_D : FSQRT_D_ENC, FSQRT_D_DESC; 2801 2802def FSUB_W : FSUB_W_ENC, FSUB_W_DESC; 2803def FSUB_D : FSUB_D_ENC, FSUB_D_DESC; 2804 2805def FSUEQ_W : FSUEQ_W_ENC, FSUEQ_W_DESC; 2806def FSUEQ_D : FSUEQ_D_ENC, FSUEQ_D_DESC; 2807 2808def FSULE_W : FSULE_W_ENC, FSULE_W_DESC; 2809def FSULE_D : FSULE_D_ENC, FSULE_D_DESC; 2810 2811def FSULT_W : FSULT_W_ENC, FSULT_W_DESC; 2812def FSULT_D : FSULT_D_ENC, FSULT_D_DESC; 2813 2814def FSUN_W : FSUN_W_ENC, FSUN_W_DESC; 2815def FSUN_D : FSUN_D_ENC, FSUN_D_DESC; 2816 2817def FSUNE_W : FSUNE_W_ENC, FSUNE_W_DESC; 2818def FSUNE_D : FSUNE_D_ENC, FSUNE_D_DESC; 2819 2820def FTINT_S_W : FTINT_S_W_ENC, FTINT_S_W_DESC; 2821def FTINT_S_D : FTINT_S_D_ENC, FTINT_S_D_DESC; 2822 2823def FTINT_U_W : FTINT_U_W_ENC, FTINT_U_W_DESC; 2824def FTINT_U_D : FTINT_U_D_ENC, FTINT_U_D_DESC; 2825 2826def FTQ_H : FTQ_H_ENC, FTQ_H_DESC; 2827def FTQ_W : FTQ_W_ENC, FTQ_W_DESC; 2828 2829def FTRUNC_S_W : FTRUNC_S_W_ENC, FTRUNC_S_W_DESC; 2830def FTRUNC_S_D : FTRUNC_S_D_ENC, FTRUNC_S_D_DESC; 2831 2832def FTRUNC_U_W : FTRUNC_U_W_ENC, FTRUNC_U_W_DESC; 2833def FTRUNC_U_D : FTRUNC_U_D_ENC, FTRUNC_U_D_DESC; 2834 2835def HADD_S_H : HADD_S_H_ENC, HADD_S_H_DESC; 2836def HADD_S_W : HADD_S_W_ENC, HADD_S_W_DESC; 2837def HADD_S_D : HADD_S_D_ENC, HADD_S_D_DESC; 2838 2839def HADD_U_H : HADD_U_H_ENC, HADD_U_H_DESC; 2840def HADD_U_W : HADD_U_W_ENC, HADD_U_W_DESC; 2841def HADD_U_D : HADD_U_D_ENC, HADD_U_D_DESC; 2842 2843def HSUB_S_H : HSUB_S_H_ENC, HSUB_S_H_DESC; 2844def HSUB_S_W : HSUB_S_W_ENC, HSUB_S_W_DESC; 2845def HSUB_S_D : HSUB_S_D_ENC, HSUB_S_D_DESC; 2846 2847def HSUB_U_H : HSUB_U_H_ENC, HSUB_U_H_DESC; 2848def HSUB_U_W : HSUB_U_W_ENC, HSUB_U_W_DESC; 2849def HSUB_U_D : HSUB_U_D_ENC, HSUB_U_D_DESC; 2850 2851def ILVEV_B : ILVEV_B_ENC, ILVEV_B_DESC; 2852def ILVEV_H : ILVEV_H_ENC, ILVEV_H_DESC; 2853def ILVEV_W : ILVEV_W_ENC, ILVEV_W_DESC; 2854def ILVEV_D : ILVEV_D_ENC, ILVEV_D_DESC; 2855 2856def ILVL_B : ILVL_B_ENC, ILVL_B_DESC; 2857def ILVL_H : ILVL_H_ENC, ILVL_H_DESC; 2858def ILVL_W : ILVL_W_ENC, ILVL_W_DESC; 2859def ILVL_D : ILVL_D_ENC, ILVL_D_DESC; 2860 2861def ILVOD_B : ILVOD_B_ENC, ILVOD_B_DESC; 2862def ILVOD_H : ILVOD_H_ENC, ILVOD_H_DESC; 2863def ILVOD_W : ILVOD_W_ENC, ILVOD_W_DESC; 2864def ILVOD_D : ILVOD_D_ENC, ILVOD_D_DESC; 2865 2866def ILVR_B : ILVR_B_ENC, ILVR_B_DESC; 2867def ILVR_H : ILVR_H_ENC, ILVR_H_DESC; 2868def ILVR_W : ILVR_W_ENC, ILVR_W_DESC; 2869def ILVR_D : ILVR_D_ENC, ILVR_D_DESC; 2870 2871def INSERT_B : INSERT_B_ENC, INSERT_B_DESC; 2872def INSERT_H : INSERT_H_ENC, INSERT_H_DESC; 2873def INSERT_W : INSERT_W_ENC, INSERT_W_DESC; 2874 2875// INSERT_FW_PSEUDO defined after INSVE_W 2876// INSERT_FD_PSEUDO defined after INSVE_D 2877 2878def INSVE_B : INSVE_B_ENC, INSVE_B_DESC; 2879def INSVE_H : INSVE_H_ENC, INSVE_H_DESC; 2880def INSVE_W : INSVE_W_ENC, INSVE_W_DESC; 2881def INSVE_D : INSVE_D_ENC, INSVE_D_DESC; 2882 2883def INSERT_FW_PSEUDO : INSERT_FW_PSEUDO_DESC; 2884def INSERT_FD_PSEUDO : INSERT_FD_PSEUDO_DESC; 2885 2886def LD_B: LD_B_ENC, LD_B_DESC; 2887def LD_H: LD_H_ENC, LD_H_DESC; 2888def LD_W: LD_W_ENC, LD_W_DESC; 2889def LD_D: LD_D_ENC, LD_D_DESC; 2890 2891def LDI_B : LDI_B_ENC, LDI_B_DESC; 2892def LDI_H : LDI_H_ENC, LDI_H_DESC; 2893def LDI_W : LDI_W_ENC, LDI_W_DESC; 2894def LDI_D : LDI_D_ENC, LDI_D_DESC; 2895 2896def MADD_Q_H : MADD_Q_H_ENC, MADD_Q_H_DESC; 2897def MADD_Q_W : MADD_Q_W_ENC, MADD_Q_W_DESC; 2898 2899def MADDR_Q_H : MADDR_Q_H_ENC, MADDR_Q_H_DESC; 2900def MADDR_Q_W : MADDR_Q_W_ENC, MADDR_Q_W_DESC; 2901 2902def MADDV_B : MADDV_B_ENC, MADDV_B_DESC; 2903def MADDV_H : MADDV_H_ENC, MADDV_H_DESC; 2904def MADDV_W : MADDV_W_ENC, MADDV_W_DESC; 2905def MADDV_D : MADDV_D_ENC, MADDV_D_DESC; 2906 2907def MAX_A_B : MAX_A_B_ENC, MAX_A_B_DESC; 2908def MAX_A_H : MAX_A_H_ENC, MAX_A_H_DESC; 2909def MAX_A_W : MAX_A_W_ENC, MAX_A_W_DESC; 2910def MAX_A_D : MAX_A_D_ENC, MAX_A_D_DESC; 2911 2912def MAX_S_B : MAX_S_B_ENC, MAX_S_B_DESC; 2913def MAX_S_H : MAX_S_H_ENC, MAX_S_H_DESC; 2914def MAX_S_W : MAX_S_W_ENC, MAX_S_W_DESC; 2915def MAX_S_D : MAX_S_D_ENC, MAX_S_D_DESC; 2916 2917def MAX_U_B : MAX_U_B_ENC, MAX_U_B_DESC; 2918def MAX_U_H : MAX_U_H_ENC, MAX_U_H_DESC; 2919def MAX_U_W : MAX_U_W_ENC, MAX_U_W_DESC; 2920def MAX_U_D : MAX_U_D_ENC, MAX_U_D_DESC; 2921 2922def MAXI_S_B : MAXI_S_B_ENC, MAXI_S_B_DESC; 2923def MAXI_S_H : MAXI_S_H_ENC, MAXI_S_H_DESC; 2924def MAXI_S_W : MAXI_S_W_ENC, MAXI_S_W_DESC; 2925def MAXI_S_D : MAXI_S_D_ENC, MAXI_S_D_DESC; 2926 2927def MAXI_U_B : MAXI_U_B_ENC, MAXI_U_B_DESC; 2928def MAXI_U_H : MAXI_U_H_ENC, MAXI_U_H_DESC; 2929def MAXI_U_W : MAXI_U_W_ENC, MAXI_U_W_DESC; 2930def MAXI_U_D : MAXI_U_D_ENC, MAXI_U_D_DESC; 2931 2932def MIN_A_B : MIN_A_B_ENC, MIN_A_B_DESC; 2933def MIN_A_H : MIN_A_H_ENC, MIN_A_H_DESC; 2934def MIN_A_W : MIN_A_W_ENC, MIN_A_W_DESC; 2935def MIN_A_D : MIN_A_D_ENC, MIN_A_D_DESC; 2936 2937def MIN_S_B : MIN_S_B_ENC, MIN_S_B_DESC; 2938def MIN_S_H : MIN_S_H_ENC, MIN_S_H_DESC; 2939def MIN_S_W : MIN_S_W_ENC, MIN_S_W_DESC; 2940def MIN_S_D : MIN_S_D_ENC, MIN_S_D_DESC; 2941 2942def MIN_U_B : MIN_U_B_ENC, MIN_U_B_DESC; 2943def MIN_U_H : MIN_U_H_ENC, MIN_U_H_DESC; 2944def MIN_U_W : MIN_U_W_ENC, MIN_U_W_DESC; 2945def MIN_U_D : MIN_U_D_ENC, MIN_U_D_DESC; 2946 2947def MINI_S_B : MINI_S_B_ENC, MINI_S_B_DESC; 2948def MINI_S_H : MINI_S_H_ENC, MINI_S_H_DESC; 2949def MINI_S_W : MINI_S_W_ENC, MINI_S_W_DESC; 2950def MINI_S_D : MINI_S_D_ENC, MINI_S_D_DESC; 2951 2952def MINI_U_B : MINI_U_B_ENC, MINI_U_B_DESC; 2953def MINI_U_H : MINI_U_H_ENC, MINI_U_H_DESC; 2954def MINI_U_W : MINI_U_W_ENC, MINI_U_W_DESC; 2955def MINI_U_D : MINI_U_D_ENC, MINI_U_D_DESC; 2956 2957def MOD_S_B : MOD_S_B_ENC, MOD_S_B_DESC; 2958def MOD_S_H : MOD_S_H_ENC, MOD_S_H_DESC; 2959def MOD_S_W : MOD_S_W_ENC, MOD_S_W_DESC; 2960def MOD_S_D : MOD_S_D_ENC, MOD_S_D_DESC; 2961 2962def MOD_U_B : MOD_U_B_ENC, MOD_U_B_DESC; 2963def MOD_U_H : MOD_U_H_ENC, MOD_U_H_DESC; 2964def MOD_U_W : MOD_U_W_ENC, MOD_U_W_DESC; 2965def MOD_U_D : MOD_U_D_ENC, MOD_U_D_DESC; 2966 2967def MOVE_V : MOVE_V_ENC, MOVE_V_DESC; 2968 2969def MSUB_Q_H : MSUB_Q_H_ENC, MSUB_Q_H_DESC; 2970def MSUB_Q_W : MSUB_Q_W_ENC, MSUB_Q_W_DESC; 2971 2972def MSUBR_Q_H : MSUBR_Q_H_ENC, MSUBR_Q_H_DESC; 2973def MSUBR_Q_W : MSUBR_Q_W_ENC, MSUBR_Q_W_DESC; 2974 2975def MSUBV_B : MSUBV_B_ENC, MSUBV_B_DESC; 2976def MSUBV_H : MSUBV_H_ENC, MSUBV_H_DESC; 2977def MSUBV_W : MSUBV_W_ENC, MSUBV_W_DESC; 2978def MSUBV_D : MSUBV_D_ENC, MSUBV_D_DESC; 2979 2980def MUL_Q_H : MUL_Q_H_ENC, MUL_Q_H_DESC; 2981def MUL_Q_W : MUL_Q_W_ENC, MUL_Q_W_DESC; 2982 2983def MULR_Q_H : MULR_Q_H_ENC, MULR_Q_H_DESC; 2984def MULR_Q_W : MULR_Q_W_ENC, MULR_Q_W_DESC; 2985 2986def MULV_B : MULV_B_ENC, MULV_B_DESC; 2987def MULV_H : MULV_H_ENC, MULV_H_DESC; 2988def MULV_W : MULV_W_ENC, MULV_W_DESC; 2989def MULV_D : MULV_D_ENC, MULV_D_DESC; 2990 2991def NLOC_B : NLOC_B_ENC, NLOC_B_DESC; 2992def NLOC_H : NLOC_H_ENC, NLOC_H_DESC; 2993def NLOC_W : NLOC_W_ENC, NLOC_W_DESC; 2994def NLOC_D : NLOC_D_ENC, NLOC_D_DESC; 2995 2996def NLZC_B : NLZC_B_ENC, NLZC_B_DESC; 2997def NLZC_H : NLZC_H_ENC, NLZC_H_DESC; 2998def NLZC_W : NLZC_W_ENC, NLZC_W_DESC; 2999def NLZC_D : NLZC_D_ENC, NLZC_D_DESC; 3000 3001def NOR_V : NOR_V_ENC, NOR_V_DESC; 3002def NOR_V_H_PSEUDO : NOR_V_H_PSEUDO_DESC, 3003 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd, 3004 MSA128BOpnd:$ws, 3005 MSA128BOpnd:$wt)>; 3006def NOR_V_W_PSEUDO : NOR_V_W_PSEUDO_DESC, 3007 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd, 3008 MSA128BOpnd:$ws, 3009 MSA128BOpnd:$wt)>; 3010def NOR_V_D_PSEUDO : NOR_V_D_PSEUDO_DESC, 3011 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd, 3012 MSA128BOpnd:$ws, 3013 MSA128BOpnd:$wt)>; 3014 3015def NORI_B : NORI_B_ENC, NORI_B_DESC; 3016 3017def OR_V : OR_V_ENC, OR_V_DESC; 3018def OR_V_H_PSEUDO : OR_V_H_PSEUDO_DESC, 3019 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd, 3020 MSA128BOpnd:$ws, 3021 MSA128BOpnd:$wt)>; 3022def OR_V_W_PSEUDO : OR_V_W_PSEUDO_DESC, 3023 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd, 3024 MSA128BOpnd:$ws, 3025 MSA128BOpnd:$wt)>; 3026def OR_V_D_PSEUDO : OR_V_D_PSEUDO_DESC, 3027 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd, 3028 MSA128BOpnd:$ws, 3029 MSA128BOpnd:$wt)>; 3030 3031def ORI_B : ORI_B_ENC, ORI_B_DESC; 3032 3033def PCKEV_B : PCKEV_B_ENC, PCKEV_B_DESC; 3034def PCKEV_H : PCKEV_H_ENC, PCKEV_H_DESC; 3035def PCKEV_W : PCKEV_W_ENC, PCKEV_W_DESC; 3036def PCKEV_D : PCKEV_D_ENC, PCKEV_D_DESC; 3037 3038def PCKOD_B : PCKOD_B_ENC, PCKOD_B_DESC; 3039def PCKOD_H : PCKOD_H_ENC, PCKOD_H_DESC; 3040def PCKOD_W : PCKOD_W_ENC, PCKOD_W_DESC; 3041def PCKOD_D : PCKOD_D_ENC, PCKOD_D_DESC; 3042 3043def PCNT_B : PCNT_B_ENC, PCNT_B_DESC; 3044def PCNT_H : PCNT_H_ENC, PCNT_H_DESC; 3045def PCNT_W : PCNT_W_ENC, PCNT_W_DESC; 3046def PCNT_D : PCNT_D_ENC, PCNT_D_DESC; 3047 3048def SAT_S_B : SAT_S_B_ENC, SAT_S_B_DESC; 3049def SAT_S_H : SAT_S_H_ENC, SAT_S_H_DESC; 3050def SAT_S_W : SAT_S_W_ENC, SAT_S_W_DESC; 3051def SAT_S_D : SAT_S_D_ENC, SAT_S_D_DESC; 3052 3053def SAT_U_B : SAT_U_B_ENC, SAT_U_B_DESC; 3054def SAT_U_H : SAT_U_H_ENC, SAT_U_H_DESC; 3055def SAT_U_W : SAT_U_W_ENC, SAT_U_W_DESC; 3056def SAT_U_D : SAT_U_D_ENC, SAT_U_D_DESC; 3057 3058def SHF_B : SHF_B_ENC, SHF_B_DESC; 3059def SHF_H : SHF_H_ENC, SHF_H_DESC; 3060def SHF_W : SHF_W_ENC, SHF_W_DESC; 3061 3062def SLD_B : SLD_B_ENC, SLD_B_DESC; 3063def SLD_H : SLD_H_ENC, SLD_H_DESC; 3064def SLD_W : SLD_W_ENC, SLD_W_DESC; 3065def SLD_D : SLD_D_ENC, SLD_D_DESC; 3066 3067def SLDI_B : SLDI_B_ENC, SLDI_B_DESC; 3068def SLDI_H : SLDI_H_ENC, SLDI_H_DESC; 3069def SLDI_W : SLDI_W_ENC, SLDI_W_DESC; 3070def SLDI_D : SLDI_D_ENC, SLDI_D_DESC; 3071 3072def SLL_B : SLL_B_ENC, SLL_B_DESC; 3073def SLL_H : SLL_H_ENC, SLL_H_DESC; 3074def SLL_W : SLL_W_ENC, SLL_W_DESC; 3075def SLL_D : SLL_D_ENC, SLL_D_DESC; 3076 3077def SLLI_B : SLLI_B_ENC, SLLI_B_DESC; 3078def SLLI_H : SLLI_H_ENC, SLLI_H_DESC; 3079def SLLI_W : SLLI_W_ENC, SLLI_W_DESC; 3080def SLLI_D : SLLI_D_ENC, SLLI_D_DESC; 3081 3082def SPLAT_B : SPLAT_B_ENC, SPLAT_B_DESC; 3083def SPLAT_H : SPLAT_H_ENC, SPLAT_H_DESC; 3084def SPLAT_W : SPLAT_W_ENC, SPLAT_W_DESC; 3085def SPLAT_D : SPLAT_D_ENC, SPLAT_D_DESC; 3086 3087def SPLATI_B : SPLATI_B_ENC, SPLATI_B_DESC; 3088def SPLATI_H : SPLATI_H_ENC, SPLATI_H_DESC; 3089def SPLATI_W : SPLATI_W_ENC, SPLATI_W_DESC; 3090def SPLATI_D : SPLATI_D_ENC, SPLATI_D_DESC; 3091 3092def SRA_B : SRA_B_ENC, SRA_B_DESC; 3093def SRA_H : SRA_H_ENC, SRA_H_DESC; 3094def SRA_W : SRA_W_ENC, SRA_W_DESC; 3095def SRA_D : SRA_D_ENC, SRA_D_DESC; 3096 3097def SRAI_B : SRAI_B_ENC, SRAI_B_DESC; 3098def SRAI_H : SRAI_H_ENC, SRAI_H_DESC; 3099def SRAI_W : SRAI_W_ENC, SRAI_W_DESC; 3100def SRAI_D : SRAI_D_ENC, SRAI_D_DESC; 3101 3102def SRAR_B : SRAR_B_ENC, SRAR_B_DESC; 3103def SRAR_H : SRAR_H_ENC, SRAR_H_DESC; 3104def SRAR_W : SRAR_W_ENC, SRAR_W_DESC; 3105def SRAR_D : SRAR_D_ENC, SRAR_D_DESC; 3106 3107def SRARI_B : SRARI_B_ENC, SRARI_B_DESC; 3108def SRARI_H : SRARI_H_ENC, SRARI_H_DESC; 3109def SRARI_W : SRARI_W_ENC, SRARI_W_DESC; 3110def SRARI_D : SRARI_D_ENC, SRARI_D_DESC; 3111 3112def SRL_B : SRL_B_ENC, SRL_B_DESC; 3113def SRL_H : SRL_H_ENC, SRL_H_DESC; 3114def SRL_W : SRL_W_ENC, SRL_W_DESC; 3115def SRL_D : SRL_D_ENC, SRL_D_DESC; 3116 3117def SRLI_B : SRLI_B_ENC, SRLI_B_DESC; 3118def SRLI_H : SRLI_H_ENC, SRLI_H_DESC; 3119def SRLI_W : SRLI_W_ENC, SRLI_W_DESC; 3120def SRLI_D : SRLI_D_ENC, SRLI_D_DESC; 3121 3122def SRLR_B : SRLR_B_ENC, SRLR_B_DESC; 3123def SRLR_H : SRLR_H_ENC, SRLR_H_DESC; 3124def SRLR_W : SRLR_W_ENC, SRLR_W_DESC; 3125def SRLR_D : SRLR_D_ENC, SRLR_D_DESC; 3126 3127def SRLRI_B : SRLRI_B_ENC, SRLRI_B_DESC; 3128def SRLRI_H : SRLRI_H_ENC, SRLRI_H_DESC; 3129def SRLRI_W : SRLRI_W_ENC, SRLRI_W_DESC; 3130def SRLRI_D : SRLRI_D_ENC, SRLRI_D_DESC; 3131 3132def ST_B: ST_B_ENC, ST_B_DESC; 3133def ST_H: ST_H_ENC, ST_H_DESC; 3134def ST_W: ST_W_ENC, ST_W_DESC; 3135def ST_D: ST_D_ENC, ST_D_DESC; 3136 3137def SUBS_S_B : SUBS_S_B_ENC, SUBS_S_B_DESC; 3138def SUBS_S_H : SUBS_S_H_ENC, SUBS_S_H_DESC; 3139def SUBS_S_W : SUBS_S_W_ENC, SUBS_S_W_DESC; 3140def SUBS_S_D : SUBS_S_D_ENC, SUBS_S_D_DESC; 3141 3142def SUBS_U_B : SUBS_U_B_ENC, SUBS_U_B_DESC; 3143def SUBS_U_H : SUBS_U_H_ENC, SUBS_U_H_DESC; 3144def SUBS_U_W : SUBS_U_W_ENC, SUBS_U_W_DESC; 3145def SUBS_U_D : SUBS_U_D_ENC, SUBS_U_D_DESC; 3146 3147def SUBSUS_U_B : SUBSUS_U_B_ENC, SUBSUS_U_B_DESC; 3148def SUBSUS_U_H : SUBSUS_U_H_ENC, SUBSUS_U_H_DESC; 3149def SUBSUS_U_W : SUBSUS_U_W_ENC, SUBSUS_U_W_DESC; 3150def SUBSUS_U_D : SUBSUS_U_D_ENC, SUBSUS_U_D_DESC; 3151 3152def SUBSUU_S_B : SUBSUU_S_B_ENC, SUBSUU_S_B_DESC; 3153def SUBSUU_S_H : SUBSUU_S_H_ENC, SUBSUU_S_H_DESC; 3154def SUBSUU_S_W : SUBSUU_S_W_ENC, SUBSUU_S_W_DESC; 3155def SUBSUU_S_D : SUBSUU_S_D_ENC, SUBSUU_S_D_DESC; 3156 3157def SUBV_B : SUBV_B_ENC, SUBV_B_DESC; 3158def SUBV_H : SUBV_H_ENC, SUBV_H_DESC; 3159def SUBV_W : SUBV_W_ENC, SUBV_W_DESC; 3160def SUBV_D : SUBV_D_ENC, SUBV_D_DESC; 3161 3162def SUBVI_B : SUBVI_B_ENC, SUBVI_B_DESC; 3163def SUBVI_H : SUBVI_H_ENC, SUBVI_H_DESC; 3164def SUBVI_W : SUBVI_W_ENC, SUBVI_W_DESC; 3165def SUBVI_D : SUBVI_D_ENC, SUBVI_D_DESC; 3166 3167def VSHF_B : VSHF_B_ENC, VSHF_B_DESC; 3168def VSHF_H : VSHF_H_ENC, VSHF_H_DESC; 3169def VSHF_W : VSHF_W_ENC, VSHF_W_DESC; 3170def VSHF_D : VSHF_D_ENC, VSHF_D_DESC; 3171 3172def XOR_V : XOR_V_ENC, XOR_V_DESC; 3173def XOR_V_H_PSEUDO : XOR_V_H_PSEUDO_DESC, 3174 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd, 3175 MSA128BOpnd:$ws, 3176 MSA128BOpnd:$wt)>; 3177def XOR_V_W_PSEUDO : XOR_V_W_PSEUDO_DESC, 3178 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd, 3179 MSA128BOpnd:$ws, 3180 MSA128BOpnd:$wt)>; 3181def XOR_V_D_PSEUDO : XOR_V_D_PSEUDO_DESC, 3182 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd, 3183 MSA128BOpnd:$ws, 3184 MSA128BOpnd:$wt)>; 3185 3186def XORI_B : XORI_B_ENC, XORI_B_DESC; 3187 3188// Patterns. 3189class MSAPat<dag pattern, dag result, list<Predicate> pred = [HasMSA]> : 3190 Pat<pattern, result>, Requires<pred>; 3191 3192def : MSAPat<(extractelt (v4i32 MSA128W:$ws), immZExt4:$idx), 3193 (COPY_S_W MSA128W:$ws, immZExt4:$idx)>; 3194 3195def : MSAPat<(v16i8 (load addr:$addr)), (LD_B addr:$addr)>; 3196def : MSAPat<(v8i16 (load addr:$addr)), (LD_H addr:$addr)>; 3197def : MSAPat<(v4i32 (load addr:$addr)), (LD_W addr:$addr)>; 3198def : MSAPat<(v2i64 (load addr:$addr)), (LD_D addr:$addr)>; 3199def : MSAPat<(v8f16 (load addr:$addr)), (LD_H addr:$addr)>; 3200def : MSAPat<(v4f32 (load addr:$addr)), (LD_W addr:$addr)>; 3201def : MSAPat<(v2f64 (load addr:$addr)), (LD_D addr:$addr)>; 3202 3203def : MSAPat<(v8f16 (load addrRegImm:$addr)), (LD_H addrRegImm:$addr)>; 3204def : MSAPat<(v4f32 (load addrRegImm:$addr)), (LD_W addrRegImm:$addr)>; 3205def : MSAPat<(v2f64 (load addrRegImm:$addr)), (LD_D addrRegImm:$addr)>; 3206 3207def : MSAPat<(store (v16i8 MSA128B:$ws), addr:$addr), 3208 (ST_B MSA128B:$ws, addr:$addr)>; 3209def : MSAPat<(store (v8i16 MSA128H:$ws), addr:$addr), 3210 (ST_H MSA128H:$ws, addr:$addr)>; 3211def : MSAPat<(store (v4i32 MSA128W:$ws), addr:$addr), 3212 (ST_W MSA128W:$ws, addr:$addr)>; 3213def : MSAPat<(store (v2i64 MSA128D:$ws), addr:$addr), 3214 (ST_D MSA128D:$ws, addr:$addr)>; 3215def : MSAPat<(store (v8f16 MSA128H:$ws), addr:$addr), 3216 (ST_H MSA128H:$ws, addr:$addr)>; 3217def : MSAPat<(store (v4f32 MSA128W:$ws), addr:$addr), 3218 (ST_W MSA128W:$ws, addr:$addr)>; 3219def : MSAPat<(store (v2f64 MSA128D:$ws), addr:$addr), 3220 (ST_D MSA128D:$ws, addr:$addr)>; 3221 3222def ST_FH : MSAPat<(store (v8f16 MSA128H:$ws), addrRegImm:$addr), 3223 (ST_H MSA128H:$ws, addrRegImm:$addr)>; 3224def ST_FW : MSAPat<(store (v4f32 MSA128W:$ws), addrRegImm:$addr), 3225 (ST_W MSA128W:$ws, addrRegImm:$addr)>; 3226def ST_FD : MSAPat<(store (v2f64 MSA128D:$ws), addrRegImm:$addr), 3227 (ST_D MSA128D:$ws, addrRegImm:$addr)>; 3228 3229class MSA_FABS_PSEUDO_DESC_BASE<RegisterOperand ROWD, 3230 RegisterOperand ROWS = ROWD, 3231 InstrItinClass itin = NoItinerary> : 3232 MipsPseudo<(outs ROWD:$wd), 3233 (ins ROWS:$ws), 3234 [(set ROWD:$wd, (fabs ROWS:$ws))]> { 3235 InstrItinClass Itinerary = itin; 3236} 3237def FABS_W : MSA_FABS_PSEUDO_DESC_BASE<MSA128WOpnd>, 3238 PseudoInstExpansion<(FMAX_A_W MSA128WOpnd:$wd, MSA128WOpnd:$ws, 3239 MSA128WOpnd:$ws)>; 3240def FABS_D : MSA_FABS_PSEUDO_DESC_BASE<MSA128DOpnd>, 3241 PseudoInstExpansion<(FMAX_A_D MSA128DOpnd:$wd, MSA128DOpnd:$ws, 3242 MSA128DOpnd:$ws)>; 3243 3244class MSABitconvertPat<ValueType DstVT, ValueType SrcVT, 3245 RegisterClass DstRC, list<Predicate> preds = [HasMSA]> : 3246 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3247 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>; 3248 3249// These are endian-independant because the element size doesnt change 3250def : MSABitconvertPat<v8i16, v8f16, MSA128H>; 3251def : MSABitconvertPat<v4i32, v4f32, MSA128W>; 3252def : MSABitconvertPat<v2i64, v2f64, MSA128D>; 3253def : MSABitconvertPat<v8f16, v8i16, MSA128H>; 3254def : MSABitconvertPat<v4f32, v4i32, MSA128W>; 3255def : MSABitconvertPat<v2f64, v2i64, MSA128D>; 3256 3257// Little endian bitcasts are always no-ops 3258def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>; 3259def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>; 3260def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>; 3261def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>; 3262def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>; 3263def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>; 3264 3265def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>; 3266def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>; 3267def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>; 3268def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>; 3269def : MSABitconvertPat<v8i16, v2f64, MSA128H, [HasMSA, IsLE]>; 3270 3271def : MSABitconvertPat<v4i32, v16i8, MSA128W, [HasMSA, IsLE]>; 3272def : MSABitconvertPat<v4i32, v8i16, MSA128W, [HasMSA, IsLE]>; 3273def : MSABitconvertPat<v4i32, v2i64, MSA128W, [HasMSA, IsLE]>; 3274def : MSABitconvertPat<v4i32, v8f16, MSA128W, [HasMSA, IsLE]>; 3275def : MSABitconvertPat<v4i32, v2f64, MSA128W, [HasMSA, IsLE]>; 3276 3277def : MSABitconvertPat<v2i64, v16i8, MSA128D, [HasMSA, IsLE]>; 3278def : MSABitconvertPat<v2i64, v8i16, MSA128D, [HasMSA, IsLE]>; 3279def : MSABitconvertPat<v2i64, v4i32, MSA128D, [HasMSA, IsLE]>; 3280def : MSABitconvertPat<v2i64, v8f16, MSA128D, [HasMSA, IsLE]>; 3281def : MSABitconvertPat<v2i64, v4f32, MSA128D, [HasMSA, IsLE]>; 3282 3283def : MSABitconvertPat<v4f32, v16i8, MSA128W, [HasMSA, IsLE]>; 3284def : MSABitconvertPat<v4f32, v8i16, MSA128W, [HasMSA, IsLE]>; 3285def : MSABitconvertPat<v4f32, v2i64, MSA128W, [HasMSA, IsLE]>; 3286def : MSABitconvertPat<v4f32, v8f16, MSA128W, [HasMSA, IsLE]>; 3287def : MSABitconvertPat<v4f32, v2f64, MSA128W, [HasMSA, IsLE]>; 3288 3289def : MSABitconvertPat<v2f64, v16i8, MSA128D, [HasMSA, IsLE]>; 3290def : MSABitconvertPat<v2f64, v8i16, MSA128D, [HasMSA, IsLE]>; 3291def : MSABitconvertPat<v2f64, v4i32, MSA128D, [HasMSA, IsLE]>; 3292def : MSABitconvertPat<v2f64, v8f16, MSA128D, [HasMSA, IsLE]>; 3293def : MSABitconvertPat<v2f64, v4f32, MSA128D, [HasMSA, IsLE]>; 3294 3295// Big endian bitcasts expand to shuffle instructions. 3296// This is because bitcast is defined to be a store/load sequence and the 3297// vector store/load instructions are mixed-endian with respect to the vector 3298// as a whole (little endian with respect to element order, but big endian 3299// elements). 3300 3301class MSABitconvertReverseQuartersPat<ValueType DstVT, ValueType SrcVT, 3302 RegisterClass DstRC, MSAInst Insn, 3303 RegisterClass ViaRC> : 3304 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3305 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 27), 3306 DstRC), 3307 [HasMSA, IsBE]>; 3308 3309class MSABitconvertReverseHalvesPat<ValueType DstVT, ValueType SrcVT, 3310 RegisterClass DstRC, MSAInst Insn, 3311 RegisterClass ViaRC> : 3312 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3313 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 177), 3314 DstRC), 3315 [HasMSA, IsBE]>; 3316 3317class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT, 3318 RegisterClass DstRC> : 3319 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 3320 3321class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT, 3322 RegisterClass DstRC> : 3323 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 3324 3325class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT, 3326 RegisterClass DstRC> : 3327 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3328 (COPY_TO_REGCLASS 3329 (SHF_W 3330 (COPY_TO_REGCLASS 3331 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27), 3332 MSA128W), 177), 3333 DstRC), 3334 [HasMSA, IsBE]>; 3335 3336class MSABitconvertReverseHInWPat<ValueType DstVT, ValueType SrcVT, 3337 RegisterClass DstRC> : 3338 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 3339 3340class MSABitconvertReverseHInDPat<ValueType DstVT, ValueType SrcVT, 3341 RegisterClass DstRC> : 3342 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 3343 3344class MSABitconvertReverseWInDPat<ValueType DstVT, ValueType SrcVT, 3345 RegisterClass DstRC> : 3346 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_W, MSA128W>; 3347 3348def : MSABitconvertReverseBInHPat<v8i16, v16i8, MSA128H>; 3349def : MSABitconvertReverseBInHPat<v8f16, v16i8, MSA128H>; 3350def : MSABitconvertReverseBInWPat<v4i32, v16i8, MSA128W>; 3351def : MSABitconvertReverseBInWPat<v4f32, v16i8, MSA128W>; 3352def : MSABitconvertReverseBInDPat<v2i64, v16i8, MSA128D>; 3353def : MSABitconvertReverseBInDPat<v2f64, v16i8, MSA128D>; 3354 3355def : MSABitconvertReverseBInHPat<v16i8, v8i16, MSA128B>; 3356def : MSABitconvertReverseHInWPat<v4i32, v8i16, MSA128W>; 3357def : MSABitconvertReverseHInWPat<v4f32, v8i16, MSA128W>; 3358def : MSABitconvertReverseHInDPat<v2i64, v8i16, MSA128D>; 3359def : MSABitconvertReverseHInDPat<v2f64, v8i16, MSA128D>; 3360 3361def : MSABitconvertReverseBInHPat<v16i8, v8f16, MSA128B>; 3362def : MSABitconvertReverseHInWPat<v4i32, v8f16, MSA128W>; 3363def : MSABitconvertReverseHInWPat<v4f32, v8f16, MSA128W>; 3364def : MSABitconvertReverseHInDPat<v2i64, v8f16, MSA128D>; 3365def : MSABitconvertReverseHInDPat<v2f64, v8f16, MSA128D>; 3366 3367def : MSABitconvertReverseBInWPat<v16i8, v4i32, MSA128B>; 3368def : MSABitconvertReverseHInWPat<v8i16, v4i32, MSA128H>; 3369def : MSABitconvertReverseHInWPat<v8f16, v4i32, MSA128H>; 3370def : MSABitconvertReverseWInDPat<v2i64, v4i32, MSA128D>; 3371def : MSABitconvertReverseWInDPat<v2f64, v4i32, MSA128D>; 3372 3373def : MSABitconvertReverseBInWPat<v16i8, v4f32, MSA128B>; 3374def : MSABitconvertReverseHInWPat<v8i16, v4f32, MSA128H>; 3375def : MSABitconvertReverseHInWPat<v8f16, v4f32, MSA128H>; 3376def : MSABitconvertReverseWInDPat<v2i64, v4f32, MSA128D>; 3377def : MSABitconvertReverseWInDPat<v2f64, v4f32, MSA128D>; 3378 3379def : MSABitconvertReverseBInDPat<v16i8, v2i64, MSA128B>; 3380def : MSABitconvertReverseHInDPat<v8i16, v2i64, MSA128H>; 3381def : MSABitconvertReverseHInDPat<v8f16, v2i64, MSA128H>; 3382def : MSABitconvertReverseWInDPat<v4i32, v2i64, MSA128W>; 3383def : MSABitconvertReverseWInDPat<v4f32, v2i64, MSA128W>; 3384 3385def : MSABitconvertReverseBInDPat<v16i8, v2f64, MSA128B>; 3386def : MSABitconvertReverseHInDPat<v8i16, v2f64, MSA128H>; 3387def : MSABitconvertReverseHInDPat<v8f16, v2f64, MSA128H>; 3388def : MSABitconvertReverseWInDPat<v4i32, v2f64, MSA128W>; 3389def : MSABitconvertReverseWInDPat<v4f32, v2f64, MSA128W>; 3390 3391// Pseudos used to implement BNZ.df, and BZ.df 3392 3393class MSA_CBRANCH_PSEUDO_DESC_BASE<SDPatternOperator OpNode, ValueType TyNode, 3394 RegisterClass RCWS, 3395 InstrItinClass itin = NoItinerary> : 3396 MipsPseudo<(outs GPR32:$dst), 3397 (ins RCWS:$ws), 3398 [(set GPR32:$dst, (OpNode (TyNode RCWS:$ws)))]> { 3399 bit usesCustomInserter = 1; 3400} 3401 3402def SNZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v16i8, 3403 MSA128B, NoItinerary>; 3404def SNZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v8i16, 3405 MSA128H, NoItinerary>; 3406def SNZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v4i32, 3407 MSA128W, NoItinerary>; 3408def SNZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v2i64, 3409 MSA128D, NoItinerary>; 3410def SNZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyNonZero, v16i8, 3411 MSA128B, NoItinerary>; 3412 3413def SZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v16i8, 3414 MSA128B, NoItinerary>; 3415def SZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v8i16, 3416 MSA128H, NoItinerary>; 3417def SZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v4i32, 3418 MSA128W, NoItinerary>; 3419def SZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v2i64, 3420 MSA128D, NoItinerary>; 3421def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8, 3422 MSA128B, NoItinerary>; 3423