MipsMSAInstrInfo.td revision f89f66e61b26974bb73b5832d5825091873b51dc
1//===- MipsMSAInstrInfo.td - MSA ASE instructions -*- tablegen ------------*-=// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file describes Mips MSA ASE instructions. 11// 12//===----------------------------------------------------------------------===// 13 14def SDT_MipsVecCond : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisVec<1>]>; 15def SDT_VSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>, 16 SDTCisInt<1>, 17 SDTCisSameAs<1, 2>, 18 SDTCisVT<3, OtherVT>]>; 19def SDT_VFSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>, 20 SDTCisFP<1>, 21 SDTCisSameAs<1, 2>, 22 SDTCisVT<3, OtherVT>]>; 23def SDT_VSHF : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisVec<0>, 24 SDTCisInt<1>, SDTCisVec<1>, 25 SDTCisSameAs<0, 2>, SDTCisSameAs<2, 3>]>; 26def SDT_SHF : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>, 27 SDTCisVT<1, i32>, SDTCisSameAs<0, 2>]>; 28def SDT_ILV : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>, 29 SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>]>; 30 31def MipsVAllNonZero : SDNode<"MipsISD::VALL_NONZERO", SDT_MipsVecCond>; 32def MipsVAnyNonZero : SDNode<"MipsISD::VANY_NONZERO", SDT_MipsVecCond>; 33def MipsVAllZero : SDNode<"MipsISD::VALL_ZERO", SDT_MipsVecCond>; 34def MipsVAnyZero : SDNode<"MipsISD::VANY_ZERO", SDT_MipsVecCond>; 35def MipsVSMax : SDNode<"MipsISD::VSMAX", SDTIntBinOp, 36 [SDNPCommutative, SDNPAssociative]>; 37def MipsVSMin : SDNode<"MipsISD::VSMIN", SDTIntBinOp, 38 [SDNPCommutative, SDNPAssociative]>; 39def MipsVUMax : SDNode<"MipsISD::VUMAX", SDTIntBinOp, 40 [SDNPCommutative, SDNPAssociative]>; 41def MipsVUMin : SDNode<"MipsISD::VUMIN", SDTIntBinOp, 42 [SDNPCommutative, SDNPAssociative]>; 43def MipsVNOR : SDNode<"MipsISD::VNOR", SDTIntBinOp, 44 [SDNPCommutative, SDNPAssociative]>; 45def MipsVSHF : SDNode<"MipsISD::VSHF", SDT_VSHF>; 46def MipsSHF : SDNode<"MipsISD::SHF", SDT_SHF>; 47def MipsILVEV : SDNode<"MipsISD::ILVEV", SDT_ILV>; 48def MipsILVOD : SDNode<"MipsISD::ILVOD", SDT_ILV>; 49def MipsILVL : SDNode<"MipsISD::ILVL", SDT_ILV>; 50def MipsILVR : SDNode<"MipsISD::ILVR", SDT_ILV>; 51def MipsPCKEV : SDNode<"MipsISD::PCKEV", SDT_ILV>; 52def MipsPCKOD : SDNode<"MipsISD::PCKOD", SDT_ILV>; 53 54def vsetcc : SDNode<"ISD::SETCC", SDT_VSetCC>; 55def vfsetcc : SDNode<"ISD::SETCC", SDT_VFSetCC>; 56 57def MipsVExtractSExt : SDNode<"MipsISD::VEXTRACT_SEXT_ELT", 58 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 59def MipsVExtractZExt : SDNode<"MipsISD::VEXTRACT_ZEXT_ELT", 60 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 61 62// Operands 63 64def uimm2 : Operand<i32> { 65 let PrintMethod = "printUnsignedImm"; 66} 67 68def uimm3 : Operand<i32> { 69 let PrintMethod = "printUnsignedImm"; 70} 71 72def uimm4 : Operand<i32> { 73 let PrintMethod = "printUnsignedImm"; 74} 75 76def uimm8 : Operand<i32> { 77 let PrintMethod = "printUnsignedImm"; 78} 79 80def simm5 : Operand<i32>; 81 82def simm10 : Operand<i32>; 83 84def vsplat_uimm1 : Operand<vAny> { 85 let PrintMethod = "printUnsignedImm8"; 86} 87 88def vsplat_uimm2 : Operand<vAny> { 89 let PrintMethod = "printUnsignedImm8"; 90} 91 92def vsplat_uimm3 : Operand<vAny> { 93 let PrintMethod = "printUnsignedImm"; 94} 95 96def vsplat_uimm4 : Operand<vAny> { 97 let PrintMethod = "printUnsignedImm"; 98} 99 100def vsplat_uimm5 : Operand<vAny> { 101 let PrintMethod = "printUnsignedImm"; 102} 103 104def vsplat_uimm6 : Operand<vAny> { 105 let PrintMethod = "printUnsignedImm"; 106} 107 108def vsplat_uimm8 : Operand<vAny> { 109 let PrintMethod = "printUnsignedImm"; 110} 111 112def vsplat_simm5 : Operand<vAny>; 113 114def vsplat_simm10 : Operand<vAny>; 115 116def immZExt2Lsa : ImmLeaf<i32, [{return isUInt<2>(Imm - 1);}]>; 117 118// Pattern fragments 119def vextract_sext_i8 : PatFrag<(ops node:$vec, node:$idx), 120 (MipsVExtractSExt node:$vec, node:$idx, i8)>; 121def vextract_sext_i16 : PatFrag<(ops node:$vec, node:$idx), 122 (MipsVExtractSExt node:$vec, node:$idx, i16)>; 123def vextract_sext_i32 : PatFrag<(ops node:$vec, node:$idx), 124 (MipsVExtractSExt node:$vec, node:$idx, i32)>; 125 126def vextract_zext_i8 : PatFrag<(ops node:$vec, node:$idx), 127 (MipsVExtractZExt node:$vec, node:$idx, i8)>; 128def vextract_zext_i16 : PatFrag<(ops node:$vec, node:$idx), 129 (MipsVExtractZExt node:$vec, node:$idx, i16)>; 130def vextract_zext_i32 : PatFrag<(ops node:$vec, node:$idx), 131 (MipsVExtractZExt node:$vec, node:$idx, i32)>; 132 133def vinsert_v16i8 : PatFrag<(ops node:$vec, node:$val, node:$idx), 134 (v16i8 (vector_insert node:$vec, node:$val, node:$idx))>; 135def vinsert_v8i16 : PatFrag<(ops node:$vec, node:$val, node:$idx), 136 (v8i16 (vector_insert node:$vec, node:$val, node:$idx))>; 137def vinsert_v4i32 : PatFrag<(ops node:$vec, node:$val, node:$idx), 138 (v4i32 (vector_insert node:$vec, node:$val, node:$idx))>; 139 140class vfsetcc_type<ValueType ResTy, ValueType OpTy, CondCode CC> : 141 PatFrag<(ops node:$lhs, node:$rhs), 142 (ResTy (vfsetcc (OpTy node:$lhs), (OpTy node:$rhs), CC))>; 143 144// ISD::SETFALSE cannot occur 145def vfsetoeq_v4f32 : vfsetcc_type<v4i32, v4f32, SETOEQ>; 146def vfsetoeq_v2f64 : vfsetcc_type<v2i64, v2f64, SETOEQ>; 147def vfsetoge_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGE>; 148def vfsetoge_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGE>; 149def vfsetogt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGT>; 150def vfsetogt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGT>; 151def vfsetole_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLE>; 152def vfsetole_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLE>; 153def vfsetolt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLT>; 154def vfsetolt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLT>; 155def vfsetone_v4f32 : vfsetcc_type<v4i32, v4f32, SETONE>; 156def vfsetone_v2f64 : vfsetcc_type<v2i64, v2f64, SETONE>; 157def vfsetord_v4f32 : vfsetcc_type<v4i32, v4f32, SETO>; 158def vfsetord_v2f64 : vfsetcc_type<v2i64, v2f64, SETO>; 159def vfsetun_v4f32 : vfsetcc_type<v4i32, v4f32, SETUO>; 160def vfsetun_v2f64 : vfsetcc_type<v2i64, v2f64, SETUO>; 161def vfsetueq_v4f32 : vfsetcc_type<v4i32, v4f32, SETUEQ>; 162def vfsetueq_v2f64 : vfsetcc_type<v2i64, v2f64, SETUEQ>; 163def vfsetuge_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGE>; 164def vfsetuge_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGE>; 165def vfsetugt_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGT>; 166def vfsetugt_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGT>; 167def vfsetule_v4f32 : vfsetcc_type<v4i32, v4f32, SETULE>; 168def vfsetule_v2f64 : vfsetcc_type<v2i64, v2f64, SETULE>; 169def vfsetult_v4f32 : vfsetcc_type<v4i32, v4f32, SETULT>; 170def vfsetult_v2f64 : vfsetcc_type<v2i64, v2f64, SETULT>; 171def vfsetune_v4f32 : vfsetcc_type<v4i32, v4f32, SETUNE>; 172def vfsetune_v2f64 : vfsetcc_type<v2i64, v2f64, SETUNE>; 173// ISD::SETTRUE cannot occur 174// ISD::SETFALSE2 cannot occur 175// ISD::SETTRUE2 cannot occur 176 177class vsetcc_type<ValueType ResTy, CondCode CC> : 178 PatFrag<(ops node:$lhs, node:$rhs), 179 (ResTy (vsetcc node:$lhs, node:$rhs, CC))>; 180 181def vseteq_v16i8 : vsetcc_type<v16i8, SETEQ>; 182def vseteq_v8i16 : vsetcc_type<v8i16, SETEQ>; 183def vseteq_v4i32 : vsetcc_type<v4i32, SETEQ>; 184def vseteq_v2i64 : vsetcc_type<v2i64, SETEQ>; 185def vsetle_v16i8 : vsetcc_type<v16i8, SETLE>; 186def vsetle_v8i16 : vsetcc_type<v8i16, SETLE>; 187def vsetle_v4i32 : vsetcc_type<v4i32, SETLE>; 188def vsetle_v2i64 : vsetcc_type<v2i64, SETLE>; 189def vsetlt_v16i8 : vsetcc_type<v16i8, SETLT>; 190def vsetlt_v8i16 : vsetcc_type<v8i16, SETLT>; 191def vsetlt_v4i32 : vsetcc_type<v4i32, SETLT>; 192def vsetlt_v2i64 : vsetcc_type<v2i64, SETLT>; 193def vsetule_v16i8 : vsetcc_type<v16i8, SETULE>; 194def vsetule_v8i16 : vsetcc_type<v8i16, SETULE>; 195def vsetule_v4i32 : vsetcc_type<v4i32, SETULE>; 196def vsetule_v2i64 : vsetcc_type<v2i64, SETULE>; 197def vsetult_v16i8 : vsetcc_type<v16i8, SETULT>; 198def vsetult_v8i16 : vsetcc_type<v8i16, SETULT>; 199def vsetult_v4i32 : vsetcc_type<v4i32, SETULT>; 200def vsetult_v2i64 : vsetcc_type<v2i64, SETULT>; 201 202def vsplati8 : PatFrag<(ops node:$e0), 203 (v16i8 (build_vector node:$e0, node:$e0, 204 node:$e0, node:$e0, 205 node:$e0, node:$e0, 206 node:$e0, node:$e0, 207 node:$e0, node:$e0, 208 node:$e0, node:$e0, 209 node:$e0, node:$e0, 210 node:$e0, node:$e0))>; 211def vsplati16 : PatFrag<(ops node:$e0), 212 (v8i16 (build_vector node:$e0, node:$e0, 213 node:$e0, node:$e0, 214 node:$e0, node:$e0, 215 node:$e0, node:$e0))>; 216def vsplati32 : PatFrag<(ops node:$e0), 217 (v4i32 (build_vector node:$e0, node:$e0, 218 node:$e0, node:$e0))>; 219def vsplati64 : PatFrag<(ops node:$e0), 220 (v2i64 (build_vector:$v0 node:$e0, node:$e0))>; 221def vsplatf32 : PatFrag<(ops node:$e0), 222 (v4f32 (build_vector node:$e0, node:$e0, 223 node:$e0, node:$e0))>; 224def vsplatf64 : PatFrag<(ops node:$e0), 225 (v2f64 (build_vector node:$e0, node:$e0))>; 226 227class SplatPatLeaf<Operand opclass, dag frag, code pred = [{}], 228 SDNodeXForm xform = NOOP_SDNodeXForm> 229 : PatLeaf<frag, pred, xform> { 230 Operand OpClass = opclass; 231} 232 233class SplatComplexPattern<Operand opclass, ValueType ty, int numops, string fn, 234 list<SDNode> roots = [], 235 list<SDNodeProperty> props = []> : 236 ComplexPattern<ty, numops, fn, roots, props> { 237 Operand OpClass = opclass; 238} 239 240def vsplati8_uimm3 : SplatComplexPattern<vsplat_uimm3, v16i8, 1, 241 "selectVSplatUimm3", 242 [build_vector, bitconvert]>; 243 244def vsplati8_uimm4 : SplatComplexPattern<vsplat_uimm4, v16i8, 1, 245 "selectVSplatUimm4", 246 [build_vector, bitconvert]>; 247 248def vsplati8_uimm5 : SplatComplexPattern<vsplat_uimm5, v16i8, 1, 249 "selectVSplatUimm5", 250 [build_vector, bitconvert]>; 251 252def vsplati8_uimm8 : SplatComplexPattern<vsplat_uimm8, v16i8, 1, 253 "selectVSplatUimm8", 254 [build_vector, bitconvert]>; 255 256def vsplati8_simm5 : SplatComplexPattern<vsplat_simm5, v16i8, 1, 257 "selectVSplatSimm5", 258 [build_vector, bitconvert]>; 259 260def vsplati16_uimm3 : SplatComplexPattern<vsplat_uimm3, v8i16, 1, 261 "selectVSplatUimm3", 262 [build_vector, bitconvert]>; 263 264def vsplati16_uimm4 : SplatComplexPattern<vsplat_uimm4, v8i16, 1, 265 "selectVSplatUimm4", 266 [build_vector, bitconvert]>; 267 268def vsplati16_uimm5 : SplatComplexPattern<vsplat_uimm5, v8i16, 1, 269 "selectVSplatUimm5", 270 [build_vector, bitconvert]>; 271 272def vsplati16_simm5 : SplatComplexPattern<vsplat_simm5, v8i16, 1, 273 "selectVSplatSimm5", 274 [build_vector, bitconvert]>; 275 276def vsplati32_uimm2 : SplatComplexPattern<vsplat_uimm2, v4i32, 1, 277 "selectVSplatUimm2", 278 [build_vector, bitconvert]>; 279 280def vsplati32_uimm5 : SplatComplexPattern<vsplat_uimm5, v4i32, 1, 281 "selectVSplatUimm5", 282 [build_vector, bitconvert]>; 283 284def vsplati32_simm5 : SplatComplexPattern<vsplat_simm5, v4i32, 1, 285 "selectVSplatSimm5", 286 [build_vector, bitconvert]>; 287 288def vsplati64_uimm1 : SplatComplexPattern<vsplat_uimm1, v2i64, 1, 289 "selectVSplatUimm1", 290 [build_vector, bitconvert]>; 291 292def vsplati64_uimm5 : SplatComplexPattern<vsplat_uimm5, v2i64, 1, 293 "selectVSplatUimm5", 294 [build_vector, bitconvert]>; 295 296def vsplati64_uimm6 : SplatComplexPattern<vsplat_uimm6, v2i64, 1, 297 "selectVSplatUimm6", 298 [build_vector, bitconvert]>; 299 300def vsplati64_simm5 : SplatComplexPattern<vsplat_simm5, v2i64, 1, 301 "selectVSplatSimm5", 302 [build_vector, bitconvert]>; 303 304// Any build_vector that is a constant splat with a value that is an exact 305// power of 2 306def vsplat_uimm_pow2 : ComplexPattern<vAny, 1, "selectVSplatUimmPow2", 307 [build_vector, bitconvert]>; 308 309def fms : PatFrag<(ops node:$wd, node:$ws, node:$wt), 310 (fsub node:$wd, (fmul node:$ws, node:$wt))>; 311 312def muladd : PatFrag<(ops node:$wd, node:$ws, node:$wt), 313 (add node:$wd, (mul node:$ws, node:$wt))>; 314 315def mulsub : PatFrag<(ops node:$wd, node:$ws, node:$wt), 316 (sub node:$wd, (mul node:$ws, node:$wt))>; 317 318// Immediates 319def immSExt5 : ImmLeaf<i32, [{return isInt<5>(Imm);}]>; 320def immSExt10: ImmLeaf<i32, [{return isInt<10>(Imm);}]>; 321 322// Instruction encoding. 323class ADD_A_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010000>; 324class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>; 325class ADD_A_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010000>; 326class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>; 327 328class ADDS_A_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010000>; 329class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>; 330class ADDS_A_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010000>; 331class ADDS_A_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010000>; 332 333class ADDS_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010000>; 334class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>; 335class ADDS_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010000>; 336class ADDS_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010000>; 337 338class ADDS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010000>; 339class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>; 340class ADDS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010000>; 341class ADDS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010000>; 342 343class ADDV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001110>; 344class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>; 345class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>; 346class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>; 347 348class ADDVI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000110>; 349class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>; 350class ADDVI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000110>; 351class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>; 352 353class AND_V_ENC : MSA_VEC_FMT<0b00000, 0b011110>; 354 355class ANDI_B_ENC : MSA_I8_FMT<0b00, 0b000000>; 356 357class ASUB_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010001>; 358class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>; 359class ASUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010001>; 360class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>; 361 362class ASUB_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010001>; 363class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>; 364class ASUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010001>; 365class ASUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010001>; 366 367class AVE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010000>; 368class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>; 369class AVE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010000>; 370class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>; 371 372class AVE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010000>; 373class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>; 374class AVE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010000>; 375class AVE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010000>; 376 377class AVER_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010000>; 378class AVER_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010000>; 379class AVER_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010000>; 380class AVER_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010000>; 381 382class AVER_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010000>; 383class AVER_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010000>; 384class AVER_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010000>; 385class AVER_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010000>; 386 387class BCLR_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001101>; 388class BCLR_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001101>; 389class BCLR_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001101>; 390class BCLR_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001101>; 391 392class BCLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001001>; 393class BCLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001001>; 394class BCLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001001>; 395class BCLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001001>; 396 397class BINSL_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001101>; 398class BINSL_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001101>; 399class BINSL_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001101>; 400class BINSL_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001101>; 401 402class BINSLI_B_ENC : MSA_BIT_B_FMT<0b110, 0b001001>; 403class BINSLI_H_ENC : MSA_BIT_H_FMT<0b110, 0b001001>; 404class BINSLI_W_ENC : MSA_BIT_W_FMT<0b110, 0b001001>; 405class BINSLI_D_ENC : MSA_BIT_D_FMT<0b110, 0b001001>; 406 407class BINSR_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001101>; 408class BINSR_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001101>; 409class BINSR_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001101>; 410class BINSR_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001101>; 411 412class BINSRI_B_ENC : MSA_BIT_B_FMT<0b111, 0b001001>; 413class BINSRI_H_ENC : MSA_BIT_H_FMT<0b111, 0b001001>; 414class BINSRI_W_ENC : MSA_BIT_W_FMT<0b111, 0b001001>; 415class BINSRI_D_ENC : MSA_BIT_D_FMT<0b111, 0b001001>; 416 417class BMNZ_V_ENC : MSA_VEC_FMT<0b00100, 0b011110>; 418 419class BMNZI_B_ENC : MSA_I8_FMT<0b00, 0b000001>; 420 421class BMZ_V_ENC : MSA_VEC_FMT<0b00101, 0b011110>; 422 423class BMZI_B_ENC : MSA_I8_FMT<0b01, 0b000001>; 424 425class BNEG_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001101>; 426class BNEG_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001101>; 427class BNEG_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001101>; 428class BNEG_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001101>; 429 430class BNEGI_B_ENC : MSA_BIT_B_FMT<0b101, 0b001001>; 431class BNEGI_H_ENC : MSA_BIT_H_FMT<0b101, 0b001001>; 432class BNEGI_W_ENC : MSA_BIT_W_FMT<0b101, 0b001001>; 433class BNEGI_D_ENC : MSA_BIT_D_FMT<0b101, 0b001001>; 434 435class BNZ_B_ENC : MSA_I10_FMT<0b000, 0b00, 0b001100>; 436class BNZ_H_ENC : MSA_I10_FMT<0b000, 0b01, 0b001100>; 437class BNZ_W_ENC : MSA_I10_FMT<0b000, 0b10, 0b001100>; 438class BNZ_D_ENC : MSA_I10_FMT<0b000, 0b11, 0b001100>; 439 440class BNZ_V_ENC : MSA_VEC_FMT<0b01000, 0b011110>; 441 442class BSEL_V_ENC : MSA_VEC_FMT<0b00110, 0b011110>; 443 444class BSELI_B_ENC : MSA_I8_FMT<0b10, 0b000001>; 445 446class BSET_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001101>; 447class BSET_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001101>; 448class BSET_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001101>; 449class BSET_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001101>; 450 451class BSETI_B_ENC : MSA_BIT_B_FMT<0b100, 0b001001>; 452class BSETI_H_ENC : MSA_BIT_H_FMT<0b100, 0b001001>; 453class BSETI_W_ENC : MSA_BIT_W_FMT<0b100, 0b001001>; 454class BSETI_D_ENC : MSA_BIT_D_FMT<0b100, 0b001001>; 455 456class BZ_B_ENC : MSA_I10_FMT<0b001, 0b00, 0b001100>; 457class BZ_H_ENC : MSA_I10_FMT<0b001, 0b01, 0b001100>; 458class BZ_W_ENC : MSA_I10_FMT<0b001, 0b10, 0b001100>; 459class BZ_D_ENC : MSA_I10_FMT<0b001, 0b11, 0b001100>; 460 461class BZ_V_ENC : MSA_VECS10_FMT<0b01001, 0b011110>; 462 463class CEQ_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001111>; 464class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>; 465class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>; 466class CEQ_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001111>; 467 468class CEQI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000111>; 469class CEQI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000111>; 470class CEQI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000111>; 471class CEQI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000111>; 472 473class CFCMSA_ENC : MSA_ELM_FMT<0b0001111110, 0b011001>; 474 475class CLE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001111>; 476class CLE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001111>; 477class CLE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001111>; 478class CLE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001111>; 479 480class CLE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001111>; 481class CLE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001111>; 482class CLE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001111>; 483class CLE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001111>; 484 485class CLEI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000111>; 486class CLEI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000111>; 487class CLEI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000111>; 488class CLEI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000111>; 489 490class CLEI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000111>; 491class CLEI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000111>; 492class CLEI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000111>; 493class CLEI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000111>; 494 495class CLT_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001111>; 496class CLT_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001111>; 497class CLT_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001111>; 498class CLT_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001111>; 499 500class CLT_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001111>; 501class CLT_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001111>; 502class CLT_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001111>; 503class CLT_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001111>; 504 505class CLTI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000111>; 506class CLTI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000111>; 507class CLTI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000111>; 508class CLTI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000111>; 509 510class CLTI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000111>; 511class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>; 512class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>; 513class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>; 514 515class COPY_S_B_ENC : MSA_ELM_COPY_B_FMT<0b0010, 0b011001>; 516class COPY_S_H_ENC : MSA_ELM_COPY_H_FMT<0b0010, 0b011001>; 517class COPY_S_W_ENC : MSA_ELM_COPY_W_FMT<0b0010, 0b011001>; 518 519class COPY_U_B_ENC : MSA_ELM_COPY_B_FMT<0b0011, 0b011001>; 520class COPY_U_H_ENC : MSA_ELM_COPY_H_FMT<0b0011, 0b011001>; 521class COPY_U_W_ENC : MSA_ELM_COPY_W_FMT<0b0011, 0b011001>; 522 523class CTCMSA_ENC : MSA_ELM_FMT<0b0000111110, 0b011001>; 524 525class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>; 526class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>; 527class DIV_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010010>; 528class DIV_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010010>; 529 530class DIV_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010010>; 531class DIV_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010010>; 532class DIV_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010010>; 533class DIV_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010010>; 534 535class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>; 536class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>; 537class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>; 538 539class DOTP_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010011>; 540class DOTP_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010011>; 541class DOTP_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010011>; 542 543class DPADD_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010011>; 544class DPADD_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010011>; 545class DPADD_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010011>; 546 547class DPADD_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010011>; 548class DPADD_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010011>; 549class DPADD_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010011>; 550 551class DPSUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010011>; 552class DPSUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010011>; 553class DPSUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010011>; 554 555class DPSUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010011>; 556class DPSUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010011>; 557class DPSUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010011>; 558 559class FADD_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011011>; 560class FADD_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011011>; 561 562class FCAF_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011010>; 563class FCAF_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011010>; 564 565class FCEQ_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011010>; 566class FCEQ_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011010>; 567 568class FCLASS_W_ENC : MSA_2RF_FMT<0b110010000, 0b0, 0b011110>; 569class FCLASS_D_ENC : MSA_2RF_FMT<0b110010000, 0b1, 0b011110>; 570 571class FCLE_W_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011010>; 572class FCLE_D_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011010>; 573 574class FCLT_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011010>; 575class FCLT_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011010>; 576 577class FCNE_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011100>; 578class FCNE_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011100>; 579 580class FCOR_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011100>; 581class FCOR_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011100>; 582 583class FCUEQ_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011010>; 584class FCUEQ_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011010>; 585 586class FCULE_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011010>; 587class FCULE_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011010>; 588 589class FCULT_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011010>; 590class FCULT_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011010>; 591 592class FCUN_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011010>; 593class FCUN_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011010>; 594 595class FCUNE_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011100>; 596class FCUNE_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011100>; 597 598class FDIV_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011011>; 599class FDIV_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011011>; 600 601class FEXDO_H_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011011>; 602class FEXDO_W_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011011>; 603 604class FEXP2_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011011>; 605class FEXP2_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011011>; 606 607class FEXUPL_W_ENC : MSA_2RF_FMT<0b110011000, 0b0, 0b011110>; 608class FEXUPL_D_ENC : MSA_2RF_FMT<0b110011000, 0b1, 0b011110>; 609 610class FEXUPR_W_ENC : MSA_2RF_FMT<0b110011001, 0b0, 0b011110>; 611class FEXUPR_D_ENC : MSA_2RF_FMT<0b110011001, 0b1, 0b011110>; 612 613class FFINT_S_W_ENC : MSA_2RF_FMT<0b110011110, 0b0, 0b011110>; 614class FFINT_S_D_ENC : MSA_2RF_FMT<0b110011110, 0b1, 0b011110>; 615 616class FFINT_U_W_ENC : MSA_2RF_FMT<0b110011111, 0b0, 0b011110>; 617class FFINT_U_D_ENC : MSA_2RF_FMT<0b110011111, 0b1, 0b011110>; 618 619class FFQL_W_ENC : MSA_2RF_FMT<0b110011010, 0b0, 0b011110>; 620class FFQL_D_ENC : MSA_2RF_FMT<0b110011010, 0b1, 0b011110>; 621 622class FFQR_W_ENC : MSA_2RF_FMT<0b110011011, 0b0, 0b011110>; 623class FFQR_D_ENC : MSA_2RF_FMT<0b110011011, 0b1, 0b011110>; 624 625class FILL_B_ENC : MSA_2R_FILL_FMT<0b11000000, 0b00, 0b011110>; 626class FILL_H_ENC : MSA_2R_FILL_FMT<0b11000000, 0b01, 0b011110>; 627class FILL_W_ENC : MSA_2R_FILL_FMT<0b11000000, 0b10, 0b011110>; 628 629class FLOG2_W_ENC : MSA_2RF_FMT<0b110010111, 0b0, 0b011110>; 630class FLOG2_D_ENC : MSA_2RF_FMT<0b110010111, 0b1, 0b011110>; 631 632class FMADD_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011011>; 633class FMADD_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011011>; 634 635class FMAX_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011011>; 636class FMAX_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011011>; 637 638class FMAX_A_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011011>; 639class FMAX_A_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011011>; 640 641class FMIN_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011011>; 642class FMIN_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011011>; 643 644class FMIN_A_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011011>; 645class FMIN_A_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011011>; 646 647class FMSUB_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011011>; 648class FMSUB_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011011>; 649 650class FMUL_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011011>; 651class FMUL_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011011>; 652 653class FRINT_W_ENC : MSA_2RF_FMT<0b110010110, 0b0, 0b011110>; 654class FRINT_D_ENC : MSA_2RF_FMT<0b110010110, 0b1, 0b011110>; 655 656class FRCP_W_ENC : MSA_2RF_FMT<0b110010101, 0b0, 0b011110>; 657class FRCP_D_ENC : MSA_2RF_FMT<0b110010101, 0b1, 0b011110>; 658 659class FRSQRT_W_ENC : MSA_2RF_FMT<0b110010100, 0b0, 0b011110>; 660class FRSQRT_D_ENC : MSA_2RF_FMT<0b110010100, 0b1, 0b011110>; 661 662class FSAF_W_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011010>; 663class FSAF_D_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011010>; 664 665class FSEQ_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011010>; 666class FSEQ_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011010>; 667 668class FSLE_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011010>; 669class FSLE_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011010>; 670 671class FSLT_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011010>; 672class FSLT_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011010>; 673 674class FSNE_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011100>; 675class FSNE_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011100>; 676 677class FSOR_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011100>; 678class FSOR_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011100>; 679 680class FSQRT_W_ENC : MSA_2RF_FMT<0b110010011, 0b0, 0b011110>; 681class FSQRT_D_ENC : MSA_2RF_FMT<0b110010011, 0b1, 0b011110>; 682 683class FSUB_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011011>; 684class FSUB_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011011>; 685 686class FSUEQ_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011010>; 687class FSUEQ_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011010>; 688 689class FSULE_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011010>; 690class FSULE_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011010>; 691 692class FSULT_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011010>; 693class FSULT_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011010>; 694 695class FSUN_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011010>; 696class FSUN_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011010>; 697 698class FSUNE_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011100>; 699class FSUNE_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011100>; 700 701class FTINT_S_W_ENC : MSA_2RF_FMT<0b110011100, 0b0, 0b011110>; 702class FTINT_S_D_ENC : MSA_2RF_FMT<0b110011100, 0b1, 0b011110>; 703 704class FTINT_U_W_ENC : MSA_2RF_FMT<0b110011101, 0b0, 0b011110>; 705class FTINT_U_D_ENC : MSA_2RF_FMT<0b110011101, 0b1, 0b011110>; 706 707class FTQ_H_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011011>; 708class FTQ_W_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011011>; 709 710class FTRUNC_S_W_ENC : MSA_2RF_FMT<0b110010001, 0b0, 0b011110>; 711class FTRUNC_S_D_ENC : MSA_2RF_FMT<0b110010001, 0b1, 0b011110>; 712 713class FTRUNC_U_W_ENC : MSA_2RF_FMT<0b110010010, 0b0, 0b011110>; 714class FTRUNC_U_D_ENC : MSA_2RF_FMT<0b110010010, 0b1, 0b011110>; 715 716class HADD_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010101>; 717class HADD_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010101>; 718class HADD_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010101>; 719 720class HADD_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010101>; 721class HADD_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010101>; 722class HADD_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010101>; 723 724class HSUB_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010101>; 725class HSUB_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010101>; 726class HSUB_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010101>; 727 728class HSUB_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010101>; 729class HSUB_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010101>; 730class HSUB_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010101>; 731 732class ILVEV_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010100>; 733class ILVEV_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010100>; 734class ILVEV_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010100>; 735class ILVEV_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010100>; 736 737class ILVL_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010100>; 738class ILVL_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010100>; 739class ILVL_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010100>; 740class ILVL_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010100>; 741 742class ILVOD_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010100>; 743class ILVOD_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010100>; 744class ILVOD_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010100>; 745class ILVOD_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010100>; 746 747class ILVR_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010100>; 748class ILVR_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010100>; 749class ILVR_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010100>; 750class ILVR_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010100>; 751 752class INSERT_B_ENC : MSA_ELM_INSERT_B_FMT<0b0100, 0b011001>; 753class INSERT_H_ENC : MSA_ELM_INSERT_H_FMT<0b0100, 0b011001>; 754class INSERT_W_ENC : MSA_ELM_INSERT_W_FMT<0b0100, 0b011001>; 755 756class INSVE_B_ENC : MSA_ELM_B_FMT<0b0101, 0b011001>; 757class INSVE_H_ENC : MSA_ELM_H_FMT<0b0101, 0b011001>; 758class INSVE_W_ENC : MSA_ELM_W_FMT<0b0101, 0b011001>; 759class INSVE_D_ENC : MSA_ELM_D_FMT<0b0101, 0b011001>; 760 761class LD_B_ENC : MSA_I5_FMT<0b110, 0b00, 0b000111>; 762class LD_H_ENC : MSA_I5_FMT<0b110, 0b01, 0b000111>; 763class LD_W_ENC : MSA_I5_FMT<0b110, 0b10, 0b000111>; 764class LD_D_ENC : MSA_I5_FMT<0b110, 0b11, 0b000111>; 765 766class LDI_B_ENC : MSA_I10_FMT<0b010, 0b00, 0b001100>; 767class LDI_H_ENC : MSA_I10_FMT<0b010, 0b01, 0b001100>; 768class LDI_W_ENC : MSA_I10_FMT<0b010, 0b10, 0b001100>; 769class LDI_D_ENC : MSA_I10_FMT<0b010, 0b11, 0b001100>; 770 771class LSA_ENC : SPECIAL_LSA_FMT; 772 773class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>; 774class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>; 775 776class MADDR_Q_H_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011100>; 777class MADDR_Q_W_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011100>; 778 779class MADDV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010010>; 780class MADDV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010010>; 781class MADDV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010010>; 782class MADDV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010010>; 783 784class MAX_A_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001110>; 785class MAX_A_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001110>; 786class MAX_A_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001110>; 787class MAX_A_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001110>; 788 789class MAX_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001110>; 790class MAX_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001110>; 791class MAX_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001110>; 792class MAX_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001110>; 793 794class MAX_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001110>; 795class MAX_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001110>; 796class MAX_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001110>; 797class MAX_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001110>; 798 799class MAXI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000110>; 800class MAXI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000110>; 801class MAXI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000110>; 802class MAXI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000110>; 803 804class MAXI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000110>; 805class MAXI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000110>; 806class MAXI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000110>; 807class MAXI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000110>; 808 809class MIN_A_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001110>; 810class MIN_A_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001110>; 811class MIN_A_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001110>; 812class MIN_A_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001110>; 813 814class MIN_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001110>; 815class MIN_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001110>; 816class MIN_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001110>; 817class MIN_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001110>; 818 819class MIN_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001110>; 820class MIN_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001110>; 821class MIN_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001110>; 822class MIN_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001110>; 823 824class MINI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000110>; 825class MINI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000110>; 826class MINI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000110>; 827class MINI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000110>; 828 829class MINI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000110>; 830class MINI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000110>; 831class MINI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000110>; 832class MINI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000110>; 833 834class MOD_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010010>; 835class MOD_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010010>; 836class MOD_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010010>; 837class MOD_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010010>; 838 839class MOD_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010010>; 840class MOD_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010010>; 841class MOD_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010010>; 842class MOD_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010010>; 843 844class MOVE_V_ENC : MSA_ELM_FMT<0b0010111110, 0b011001>; 845 846class MSUB_Q_H_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011100>; 847class MSUB_Q_W_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011100>; 848 849class MSUBR_Q_H_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011100>; 850class MSUBR_Q_W_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011100>; 851 852class MSUBV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010010>; 853class MSUBV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010010>; 854class MSUBV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010010>; 855class MSUBV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010010>; 856 857class MUL_Q_H_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011100>; 858class MUL_Q_W_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011100>; 859 860class MULR_Q_H_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011100>; 861class MULR_Q_W_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011100>; 862 863class MULV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010010>; 864class MULV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010010>; 865class MULV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010010>; 866class MULV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010010>; 867 868class NLOC_B_ENC : MSA_2R_FMT<0b11000010, 0b00, 0b011110>; 869class NLOC_H_ENC : MSA_2R_FMT<0b11000010, 0b01, 0b011110>; 870class NLOC_W_ENC : MSA_2R_FMT<0b11000010, 0b10, 0b011110>; 871class NLOC_D_ENC : MSA_2R_FMT<0b11000010, 0b11, 0b011110>; 872 873class NLZC_B_ENC : MSA_2R_FMT<0b11000011, 0b00, 0b011110>; 874class NLZC_H_ENC : MSA_2R_FMT<0b11000011, 0b01, 0b011110>; 875class NLZC_W_ENC : MSA_2R_FMT<0b11000011, 0b10, 0b011110>; 876class NLZC_D_ENC : MSA_2R_FMT<0b11000011, 0b11, 0b011110>; 877 878class NOR_V_ENC : MSA_VEC_FMT<0b00010, 0b011110>; 879 880class NORI_B_ENC : MSA_I8_FMT<0b10, 0b000000>; 881 882class OR_V_ENC : MSA_VEC_FMT<0b00001, 0b011110>; 883 884class ORI_B_ENC : MSA_I8_FMT<0b01, 0b000000>; 885 886class PCKEV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010100>; 887class PCKEV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010100>; 888class PCKEV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010100>; 889class PCKEV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010100>; 890 891class PCKOD_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010100>; 892class PCKOD_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010100>; 893class PCKOD_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010100>; 894class PCKOD_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010100>; 895 896class PCNT_B_ENC : MSA_2R_FMT<0b11000001, 0b00, 0b011110>; 897class PCNT_H_ENC : MSA_2R_FMT<0b11000001, 0b01, 0b011110>; 898class PCNT_W_ENC : MSA_2R_FMT<0b11000001, 0b10, 0b011110>; 899class PCNT_D_ENC : MSA_2R_FMT<0b11000001, 0b11, 0b011110>; 900 901class SAT_S_B_ENC : MSA_BIT_B_FMT<0b000, 0b001010>; 902class SAT_S_H_ENC : MSA_BIT_H_FMT<0b000, 0b001010>; 903class SAT_S_W_ENC : MSA_BIT_W_FMT<0b000, 0b001010>; 904class SAT_S_D_ENC : MSA_BIT_D_FMT<0b000, 0b001010>; 905 906class SAT_U_B_ENC : MSA_BIT_B_FMT<0b001, 0b001010>; 907class SAT_U_H_ENC : MSA_BIT_H_FMT<0b001, 0b001010>; 908class SAT_U_W_ENC : MSA_BIT_W_FMT<0b001, 0b001010>; 909class SAT_U_D_ENC : MSA_BIT_D_FMT<0b001, 0b001010>; 910 911class SHF_B_ENC : MSA_I8_FMT<0b00, 0b000010>; 912class SHF_H_ENC : MSA_I8_FMT<0b01, 0b000010>; 913class SHF_W_ENC : MSA_I8_FMT<0b10, 0b000010>; 914 915class SLD_B_ENC : MSA_3R_INDEX_FMT<0b000, 0b00, 0b010100>; 916class SLD_H_ENC : MSA_3R_INDEX_FMT<0b000, 0b01, 0b010100>; 917class SLD_W_ENC : MSA_3R_INDEX_FMT<0b000, 0b10, 0b010100>; 918class SLD_D_ENC : MSA_3R_INDEX_FMT<0b000, 0b11, 0b010100>; 919 920class SLDI_B_ENC : MSA_ELM_B_FMT<0b0000, 0b011001>; 921class SLDI_H_ENC : MSA_ELM_H_FMT<0b0000, 0b011001>; 922class SLDI_W_ENC : MSA_ELM_W_FMT<0b0000, 0b011001>; 923class SLDI_D_ENC : MSA_ELM_D_FMT<0b0000, 0b011001>; 924 925class SLL_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001101>; 926class SLL_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001101>; 927class SLL_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001101>; 928class SLL_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001101>; 929 930class SLLI_B_ENC : MSA_BIT_B_FMT<0b000, 0b001001>; 931class SLLI_H_ENC : MSA_BIT_H_FMT<0b000, 0b001001>; 932class SLLI_W_ENC : MSA_BIT_W_FMT<0b000, 0b001001>; 933class SLLI_D_ENC : MSA_BIT_D_FMT<0b000, 0b001001>; 934 935class SPLAT_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010100>; 936class SPLAT_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010100>; 937class SPLAT_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010100>; 938class SPLAT_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010100>; 939 940class SPLATI_B_ENC : MSA_ELM_B_FMT<0b0001, 0b011001>; 941class SPLATI_H_ENC : MSA_ELM_H_FMT<0b0001, 0b011001>; 942class SPLATI_W_ENC : MSA_ELM_W_FMT<0b0001, 0b011001>; 943class SPLATI_D_ENC : MSA_ELM_D_FMT<0b0001, 0b011001>; 944 945class SRA_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001101>; 946class SRA_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001101>; 947class SRA_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001101>; 948class SRA_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001101>; 949 950class SRAI_B_ENC : MSA_BIT_B_FMT<0b001, 0b001001>; 951class SRAI_H_ENC : MSA_BIT_H_FMT<0b001, 0b001001>; 952class SRAI_W_ENC : MSA_BIT_W_FMT<0b001, 0b001001>; 953class SRAI_D_ENC : MSA_BIT_D_FMT<0b001, 0b001001>; 954 955class SRAR_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010101>; 956class SRAR_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010101>; 957class SRAR_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010101>; 958class SRAR_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010101>; 959 960class SRARI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001010>; 961class SRARI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001010>; 962class SRARI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001010>; 963class SRARI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001010>; 964 965class SRL_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001101>; 966class SRL_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001101>; 967class SRL_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001101>; 968class SRL_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001101>; 969 970class SRLI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001001>; 971class SRLI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001001>; 972class SRLI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001001>; 973class SRLI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001001>; 974 975class SRLR_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010101>; 976class SRLR_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010101>; 977class SRLR_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010101>; 978class SRLR_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010101>; 979 980class SRLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001010>; 981class SRLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001010>; 982class SRLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001010>; 983class SRLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001010>; 984 985class ST_B_ENC : MSA_I5_FMT<0b111, 0b00, 0b000111>; 986class ST_H_ENC : MSA_I5_FMT<0b111, 0b01, 0b000111>; 987class ST_W_ENC : MSA_I5_FMT<0b111, 0b10, 0b000111>; 988class ST_D_ENC : MSA_I5_FMT<0b111, 0b11, 0b000111>; 989 990class SUBS_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010001>; 991class SUBS_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010001>; 992class SUBS_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010001>; 993class SUBS_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010001>; 994 995class SUBS_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010001>; 996class SUBS_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010001>; 997class SUBS_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010001>; 998class SUBS_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010001>; 999 1000class SUBSUS_U_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010001>; 1001class SUBSUS_U_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010001>; 1002class SUBSUS_U_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010001>; 1003class SUBSUS_U_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010001>; 1004 1005class SUBSUU_S_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010001>; 1006class SUBSUU_S_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010001>; 1007class SUBSUU_S_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010001>; 1008class SUBSUU_S_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010001>; 1009 1010class SUBV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001110>; 1011class SUBV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001110>; 1012class SUBV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001110>; 1013class SUBV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001110>; 1014 1015class SUBVI_B_ENC : MSA_I5_FMT<0b001, 0b00, 0b000110>; 1016class SUBVI_H_ENC : MSA_I5_FMT<0b001, 0b01, 0b000110>; 1017class SUBVI_W_ENC : MSA_I5_FMT<0b001, 0b10, 0b000110>; 1018class SUBVI_D_ENC : MSA_I5_FMT<0b001, 0b11, 0b000110>; 1019 1020class VSHF_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010101>; 1021class VSHF_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010101>; 1022class VSHF_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010101>; 1023class VSHF_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010101>; 1024 1025class XOR_V_ENC : MSA_VEC_FMT<0b00011, 0b011110>; 1026 1027class XORI_B_ENC : MSA_I8_FMT<0b11, 0b000000>; 1028 1029// Instruction desc. 1030class MSA_BIT_B_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1031 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1032 InstrItinClass itin = NoItinerary> { 1033 dag OutOperandList = (outs ROWD:$wd); 1034 dag InOperandList = (ins ROWS:$ws, uimm3:$m); 1035 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1036 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt3:$m))]; 1037 InstrItinClass Itinerary = itin; 1038} 1039 1040class MSA_BIT_H_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1041 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1042 InstrItinClass itin = NoItinerary> { 1043 dag OutOperandList = (outs ROWD:$wd); 1044 dag InOperandList = (ins ROWS:$ws, uimm4:$m); 1045 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1046 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt4:$m))]; 1047 InstrItinClass Itinerary = itin; 1048} 1049 1050class MSA_BIT_W_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1051 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1052 InstrItinClass itin = NoItinerary> { 1053 dag OutOperandList = (outs ROWD:$wd); 1054 dag InOperandList = (ins ROWS:$ws, uimm5:$m); 1055 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1056 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt5:$m))]; 1057 InstrItinClass Itinerary = itin; 1058} 1059 1060class MSA_BIT_D_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1061 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1062 InstrItinClass itin = NoItinerary> { 1063 dag OutOperandList = (outs ROWD:$wd); 1064 dag InOperandList = (ins ROWS:$ws, uimm6:$m); 1065 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1066 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt6:$m))]; 1067 InstrItinClass Itinerary = itin; 1068} 1069 1070class MSA_BIT_SPLAT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1071 SplatComplexPattern SplatImm, 1072 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1073 InstrItinClass itin = NoItinerary> { 1074 dag OutOperandList = (outs ROWD:$wd); 1075 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$m); 1076 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1077 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$m))]; 1078 InstrItinClass Itinerary = itin; 1079} 1080 1081class MSA_COPY_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1082 ValueType VecTy, RegisterOperand ROD, 1083 RegisterOperand ROWS, 1084 InstrItinClass itin = NoItinerary> { 1085 dag OutOperandList = (outs ROD:$rd); 1086 dag InOperandList = (ins ROWS:$ws, uimm4:$n); 1087 string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]"); 1088 list<dag> Pattern = [(set ROD:$rd, (OpNode (VecTy ROWS:$ws), immZExt4:$n))]; 1089 InstrItinClass Itinerary = itin; 1090} 1091 1092class MSA_ELM_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1093 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1094 InstrItinClass itin = NoItinerary> { 1095 dag OutOperandList = (outs ROWD:$wd); 1096 dag InOperandList = (ins ROWS:$ws, uimm4:$n); 1097 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$n]"); 1098 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt4:$n))]; 1099 InstrItinClass Itinerary = itin; 1100} 1101 1102class MSA_COPY_PSEUDO_BASE<SDPatternOperator OpNode, ValueType VecTy, 1103 RegisterClass RCD, RegisterClass RCWS> : 1104 MipsPseudo<(outs RCD:$wd), (ins RCWS:$ws, uimm4:$n), 1105 [(set RCD:$wd, (OpNode (VecTy RCWS:$ws), immZExt4:$n))]> { 1106 bit usesCustomInserter = 1; 1107} 1108 1109class MSA_I5_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1110 SplatComplexPattern SplatImm, RegisterOperand ROWD, 1111 RegisterOperand ROWS = ROWD, 1112 InstrItinClass itin = NoItinerary> { 1113 dag OutOperandList = (outs ROWD:$wd); 1114 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$imm); 1115 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $imm"); 1116 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$imm))]; 1117 InstrItinClass Itinerary = itin; 1118} 1119 1120class MSA_I8_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1121 SplatComplexPattern SplatImm, RegisterOperand ROWD, 1122 RegisterOperand ROWS = ROWD, 1123 InstrItinClass itin = NoItinerary> { 1124 dag OutOperandList = (outs ROWD:$wd); 1125 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$u8); 1126 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1127 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$u8))]; 1128 InstrItinClass Itinerary = itin; 1129} 1130 1131// This class is deprecated and will be removed in the next few patches 1132class MSA_I8_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1133 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1134 InstrItinClass itin = NoItinerary> { 1135 dag OutOperandList = (outs ROWD:$wd); 1136 dag InOperandList = (ins ROWS:$ws, uimm8:$u8); 1137 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1138 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt8:$u8))]; 1139 InstrItinClass Itinerary = itin; 1140} 1141 1142class MSA_I8_SHF_DESC_BASE<string instr_asm, RegisterOperand ROWD, 1143 RegisterOperand ROWS = ROWD, 1144 InstrItinClass itin = NoItinerary> { 1145 dag OutOperandList = (outs ROWD:$wd); 1146 dag InOperandList = (ins ROWS:$ws, uimm8:$u8); 1147 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1148 list<dag> Pattern = [(set ROWD:$wd, (MipsSHF immZExt8:$u8, ROWS:$ws))]; 1149 InstrItinClass Itinerary = itin; 1150} 1151 1152class MSA_I10_LDI_DESC_BASE<string instr_asm, RegisterClass RCWD, 1153 InstrItinClass itin = NoItinerary> { 1154 dag OutOperandList = (outs RCWD:$wd); 1155 dag InOperandList = (ins vsplat_simm10:$i10); 1156 string AsmString = !strconcat(instr_asm, "\t$wd, $i10"); 1157 // LDI is matched using custom matching code in MipsSEISelDAGToDAG.cpp 1158 list<dag> Pattern = []; 1159 bit hasSideEffects = 0; 1160 InstrItinClass Itinerary = itin; 1161} 1162 1163class MSA_2R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1164 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1165 InstrItinClass itin = NoItinerary> { 1166 dag OutOperandList = (outs ROWD:$wd); 1167 dag InOperandList = (ins ROWS:$ws); 1168 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 1169 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))]; 1170 InstrItinClass Itinerary = itin; 1171} 1172 1173class MSA_2R_FILL_DESC_BASE<string instr_asm, ValueType VT, 1174 SDPatternOperator OpNode, RegisterOperand ROWD, 1175 RegisterOperand ROS = ROWD, 1176 InstrItinClass itin = NoItinerary> { 1177 dag OutOperandList = (outs ROWD:$wd); 1178 dag InOperandList = (ins ROS:$rs); 1179 string AsmString = !strconcat(instr_asm, "\t$wd, $rs"); 1180 list<dag> Pattern = [(set ROWD:$wd, (VT (OpNode ROS:$rs)))]; 1181 InstrItinClass Itinerary = itin; 1182} 1183 1184class MSA_2R_FILL_PSEUDO_BASE<ValueType VT, SDPatternOperator OpNode, 1185 RegisterClass RCWD, RegisterClass RCWS = RCWD> : 1186 MipsPseudo<(outs RCWD:$wd), (ins RCWS:$fs), 1187 [(set RCWD:$wd, (OpNode RCWS:$fs))]> { 1188 let usesCustomInserter = 1; 1189} 1190 1191class MSA_2RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1192 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1193 InstrItinClass itin = NoItinerary> { 1194 dag OutOperandList = (outs ROWD:$wd); 1195 dag InOperandList = (ins ROWS:$ws); 1196 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 1197 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))]; 1198 InstrItinClass Itinerary = itin; 1199} 1200 1201class MSA_3R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1202 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1203 RegisterOperand ROWT = ROWD, 1204 InstrItinClass itin = NoItinerary> { 1205 dag OutOperandList = (outs ROWD:$wd); 1206 dag InOperandList = (ins ROWS:$ws, ROWT:$wt); 1207 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1208 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))]; 1209 InstrItinClass Itinerary = itin; 1210} 1211 1212class MSA_3R_VSHF_DESC_BASE<string instr_asm, RegisterOperand ROWD, 1213 RegisterOperand ROWS = ROWD, 1214 RegisterOperand ROWT = ROWD, 1215 InstrItinClass itin = NoItinerary> { 1216 dag OutOperandList = (outs ROWD:$wd); 1217 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt); 1218 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1219 list<dag> Pattern = [(set ROWD:$wd, (MipsVSHF ROWD:$wd_in, ROWS:$ws, 1220 ROWT:$wt))]; 1221 string Constraints = "$wd = $wd_in"; 1222 InstrItinClass Itinerary = itin; 1223} 1224 1225class MSA_3R_INDEX_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1226 RegisterOperand ROWD, RegisterOperand ROWS, 1227 RegisterOperand RORT, 1228 InstrItinClass itin = NoItinerary> { 1229 dag OutOperandList = (outs ROWD:$wd); 1230 dag InOperandList = (ins ROWS:$ws, RORT:$rt); 1231 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$rt]"); 1232 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, RORT:$rt))]; 1233 InstrItinClass Itinerary = itin; 1234} 1235 1236class MSA_3R_4R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1237 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1238 RegisterOperand ROWT = ROWD, 1239 InstrItinClass itin = NoItinerary> { 1240 dag OutOperandList = (outs ROWD:$wd); 1241 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt); 1242 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1243 list<dag> Pattern = [(set ROWD:$wd, 1244 (OpNode ROWD:$wd_in, ROWS:$ws, ROWT:$wt))]; 1245 InstrItinClass Itinerary = itin; 1246 string Constraints = "$wd = $wd_in"; 1247} 1248 1249class MSA_3RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1250 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1251 RegisterOperand ROWT = ROWD, 1252 InstrItinClass itin = NoItinerary> : 1253 MSA_3R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>; 1254 1255class MSA_3RF_4RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1256 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1257 RegisterOperand ROWT = ROWD, 1258 InstrItinClass itin = NoItinerary> : 1259 MSA_3R_4R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>; 1260 1261class MSA_CBRANCH_DESC_BASE<string instr_asm, RegisterClass RCWD> { 1262 dag OutOperandList = (outs); 1263 dag InOperandList = (ins RCWD:$wd, brtarget:$offset); 1264 string AsmString = !strconcat(instr_asm, "\t$wd, $offset"); 1265 list<dag> Pattern = []; 1266 InstrItinClass Itinerary = IIBranch; 1267 bit isBranch = 1; 1268 bit isTerminator = 1; 1269 bit hasDelaySlot = 1; 1270 list<Register> Defs = [AT]; 1271} 1272 1273class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1274 RegisterOperand ROWD, RegisterOperand ROS, 1275 InstrItinClass itin = NoItinerary> { 1276 dag OutOperandList = (outs ROWD:$wd); 1277 dag InOperandList = (ins ROWD:$wd_in, ROS:$rs, uimm6:$n); 1278 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $rs"); 1279 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in, 1280 ROS:$rs, 1281 immZExt6:$n))]; 1282 InstrItinClass Itinerary = itin; 1283 string Constraints = "$wd = $wd_in"; 1284} 1285 1286class MSA_INSERT_PSEUDO_BASE<SDPatternOperator OpNode, ValueType Ty, 1287 RegisterOperand ROWD, RegisterOperand ROFS> : 1288 MipsPseudo<(outs ROWD:$wd), (ins ROWD:$wd_in, uimm6:$n, ROFS:$fs), 1289 [(set ROWD:$wd, (OpNode (Ty ROWD:$wd_in), ROFS:$fs, 1290 immZExt6:$n))]> { 1291 bit usesCustomInserter = 1; 1292 string Constraints = "$wd = $wd_in"; 1293} 1294 1295class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1296 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1297 InstrItinClass itin = NoItinerary> { 1298 dag OutOperandList = (outs ROWD:$wd); 1299 dag InOperandList = (ins ROWD:$wd_in, uimm6:$n, ROWS:$ws); 1300 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[0]"); 1301 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in, 1302 immZExt6:$n, 1303 ROWS:$ws))]; 1304 InstrItinClass Itinerary = itin; 1305 string Constraints = "$wd = $wd_in"; 1306} 1307 1308class MSA_VEC_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1309 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1310 RegisterOperand ROWT = ROWD, 1311 InstrItinClass itin = NoItinerary> { 1312 dag OutOperandList = (outs ROWD:$wd); 1313 dag InOperandList = (ins ROWS:$ws, ROWT:$wt); 1314 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1315 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))]; 1316 InstrItinClass Itinerary = itin; 1317} 1318 1319class MSA_ELM_SPLAT_DESC_BASE<string instr_asm, SplatComplexPattern SplatImm, 1320 RegisterOperand ROWD, 1321 RegisterOperand ROWS = ROWD, 1322 InstrItinClass itin = NoItinerary> { 1323 dag OutOperandList = (outs ROWD:$wd); 1324 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$n); 1325 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$n]"); 1326 list<dag> Pattern = [(set ROWD:$wd, (MipsVSHF SplatImm:$n, ROWS:$ws, 1327 ROWS:$ws))]; 1328 InstrItinClass Itinerary = itin; 1329} 1330 1331class MSA_VEC_PSEUDO_BASE<SDPatternOperator OpNode, RegisterOperand ROWD, 1332 RegisterOperand ROWS = ROWD, 1333 RegisterOperand ROWT = ROWD> : 1334 MipsPseudo<(outs ROWD:$wd), (ins ROWS:$ws, ROWT:$wt), 1335 [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))]>; 1336 1337class ADD_A_B_DESC : MSA_3R_DESC_BASE<"add_a.b", int_mips_add_a_b, MSA128BOpnd>, 1338 IsCommutable; 1339class ADD_A_H_DESC : MSA_3R_DESC_BASE<"add_a.h", int_mips_add_a_h, MSA128HOpnd>, 1340 IsCommutable; 1341class ADD_A_W_DESC : MSA_3R_DESC_BASE<"add_a.w", int_mips_add_a_w, MSA128WOpnd>, 1342 IsCommutable; 1343class ADD_A_D_DESC : MSA_3R_DESC_BASE<"add_a.d", int_mips_add_a_d, MSA128DOpnd>, 1344 IsCommutable; 1345 1346class ADDS_A_B_DESC : MSA_3R_DESC_BASE<"adds_a.b", int_mips_adds_a_b, 1347 MSA128BOpnd>, IsCommutable; 1348class ADDS_A_H_DESC : MSA_3R_DESC_BASE<"adds_a.h", int_mips_adds_a_h, 1349 MSA128HOpnd>, IsCommutable; 1350class ADDS_A_W_DESC : MSA_3R_DESC_BASE<"adds_a.w", int_mips_adds_a_w, 1351 MSA128WOpnd>, IsCommutable; 1352class ADDS_A_D_DESC : MSA_3R_DESC_BASE<"adds_a.d", int_mips_adds_a_d, 1353 MSA128DOpnd>, IsCommutable; 1354 1355class ADDS_S_B_DESC : MSA_3R_DESC_BASE<"adds_s.b", int_mips_adds_s_b, 1356 MSA128BOpnd>, IsCommutable; 1357class ADDS_S_H_DESC : MSA_3R_DESC_BASE<"adds_s.h", int_mips_adds_s_h, 1358 MSA128HOpnd>, IsCommutable; 1359class ADDS_S_W_DESC : MSA_3R_DESC_BASE<"adds_s.w", int_mips_adds_s_w, 1360 MSA128WOpnd>, IsCommutable; 1361class ADDS_S_D_DESC : MSA_3R_DESC_BASE<"adds_s.d", int_mips_adds_s_d, 1362 MSA128DOpnd>, IsCommutable; 1363 1364class ADDS_U_B_DESC : MSA_3R_DESC_BASE<"adds_u.b", int_mips_adds_u_b, 1365 MSA128BOpnd>, IsCommutable; 1366class ADDS_U_H_DESC : MSA_3R_DESC_BASE<"adds_u.h", int_mips_adds_u_h, 1367 MSA128HOpnd>, IsCommutable; 1368class ADDS_U_W_DESC : MSA_3R_DESC_BASE<"adds_u.w", int_mips_adds_u_w, 1369 MSA128WOpnd>, IsCommutable; 1370class ADDS_U_D_DESC : MSA_3R_DESC_BASE<"adds_u.d", int_mips_adds_u_d, 1371 MSA128DOpnd>, IsCommutable; 1372 1373class ADDV_B_DESC : MSA_3R_DESC_BASE<"addv.b", add, MSA128BOpnd>, IsCommutable; 1374class ADDV_H_DESC : MSA_3R_DESC_BASE<"addv.h", add, MSA128HOpnd>, IsCommutable; 1375class ADDV_W_DESC : MSA_3R_DESC_BASE<"addv.w", add, MSA128WOpnd>, IsCommutable; 1376class ADDV_D_DESC : MSA_3R_DESC_BASE<"addv.d", add, MSA128DOpnd>, IsCommutable; 1377 1378class ADDVI_B_DESC : MSA_I5_DESC_BASE<"addvi.b", add, vsplati8_uimm5, 1379 MSA128BOpnd>; 1380class ADDVI_H_DESC : MSA_I5_DESC_BASE<"addvi.h", add, vsplati16_uimm5, 1381 MSA128HOpnd>; 1382class ADDVI_W_DESC : MSA_I5_DESC_BASE<"addvi.w", add, vsplati32_uimm5, 1383 MSA128WOpnd>; 1384class ADDVI_D_DESC : MSA_I5_DESC_BASE<"addvi.d", add, vsplati64_uimm5, 1385 MSA128DOpnd>; 1386 1387class AND_V_DESC : MSA_VEC_DESC_BASE<"and.v", and, MSA128BOpnd>; 1388class AND_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128HOpnd>; 1389class AND_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128WOpnd>; 1390class AND_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128DOpnd>; 1391 1392class ANDI_B_DESC : MSA_I8_DESC_BASE<"andi.b", and, vsplati8_uimm8, 1393 MSA128BOpnd>; 1394 1395class ASUB_S_B_DESC : MSA_3R_DESC_BASE<"asub_s.b", int_mips_asub_s_b, 1396 MSA128BOpnd>; 1397class ASUB_S_H_DESC : MSA_3R_DESC_BASE<"asub_s.h", int_mips_asub_s_h, 1398 MSA128HOpnd>; 1399class ASUB_S_W_DESC : MSA_3R_DESC_BASE<"asub_s.w", int_mips_asub_s_w, 1400 MSA128WOpnd>; 1401class ASUB_S_D_DESC : MSA_3R_DESC_BASE<"asub_s.d", int_mips_asub_s_d, 1402 MSA128DOpnd>; 1403 1404class ASUB_U_B_DESC : MSA_3R_DESC_BASE<"asub_u.b", int_mips_asub_u_b, 1405 MSA128BOpnd>; 1406class ASUB_U_H_DESC : MSA_3R_DESC_BASE<"asub_u.h", int_mips_asub_u_h, 1407 MSA128HOpnd>; 1408class ASUB_U_W_DESC : MSA_3R_DESC_BASE<"asub_u.w", int_mips_asub_u_w, 1409 MSA128WOpnd>; 1410class ASUB_U_D_DESC : MSA_3R_DESC_BASE<"asub_u.d", int_mips_asub_u_d, 1411 MSA128DOpnd>; 1412 1413class AVE_S_B_DESC : MSA_3R_DESC_BASE<"ave_s.b", int_mips_ave_s_b, MSA128BOpnd>, 1414 IsCommutable; 1415class AVE_S_H_DESC : MSA_3R_DESC_BASE<"ave_s.h", int_mips_ave_s_h, MSA128HOpnd>, 1416 IsCommutable; 1417class AVE_S_W_DESC : MSA_3R_DESC_BASE<"ave_s.w", int_mips_ave_s_w, MSA128WOpnd>, 1418 IsCommutable; 1419class AVE_S_D_DESC : MSA_3R_DESC_BASE<"ave_s.d", int_mips_ave_s_d, MSA128DOpnd>, 1420 IsCommutable; 1421 1422class AVE_U_B_DESC : MSA_3R_DESC_BASE<"ave_u.b", int_mips_ave_u_b, MSA128BOpnd>, 1423 IsCommutable; 1424class AVE_U_H_DESC : MSA_3R_DESC_BASE<"ave_u.h", int_mips_ave_u_h, MSA128HOpnd>, 1425 IsCommutable; 1426class AVE_U_W_DESC : MSA_3R_DESC_BASE<"ave_u.w", int_mips_ave_u_w, MSA128WOpnd>, 1427 IsCommutable; 1428class AVE_U_D_DESC : MSA_3R_DESC_BASE<"ave_u.d", int_mips_ave_u_d, MSA128DOpnd>, 1429 IsCommutable; 1430 1431class AVER_S_B_DESC : MSA_3R_DESC_BASE<"aver_s.b", int_mips_aver_s_b, 1432 MSA128BOpnd>, IsCommutable; 1433class AVER_S_H_DESC : MSA_3R_DESC_BASE<"aver_s.h", int_mips_aver_s_h, 1434 MSA128HOpnd>, IsCommutable; 1435class AVER_S_W_DESC : MSA_3R_DESC_BASE<"aver_s.w", int_mips_aver_s_w, 1436 MSA128WOpnd>, IsCommutable; 1437class AVER_S_D_DESC : MSA_3R_DESC_BASE<"aver_s.d", int_mips_aver_s_d, 1438 MSA128DOpnd>, IsCommutable; 1439 1440class AVER_U_B_DESC : MSA_3R_DESC_BASE<"aver_u.b", int_mips_aver_u_b, 1441 MSA128BOpnd>, IsCommutable; 1442class AVER_U_H_DESC : MSA_3R_DESC_BASE<"aver_u.h", int_mips_aver_u_h, 1443 MSA128HOpnd>, IsCommutable; 1444class AVER_U_W_DESC : MSA_3R_DESC_BASE<"aver_u.w", int_mips_aver_u_w, 1445 MSA128WOpnd>, IsCommutable; 1446class AVER_U_D_DESC : MSA_3R_DESC_BASE<"aver_u.d", int_mips_aver_u_d, 1447 MSA128DOpnd>, IsCommutable; 1448 1449class BCLR_B_DESC : MSA_3R_DESC_BASE<"bclr.b", int_mips_bclr_b, MSA128BOpnd>; 1450class BCLR_H_DESC : MSA_3R_DESC_BASE<"bclr.h", int_mips_bclr_h, MSA128HOpnd>; 1451class BCLR_W_DESC : MSA_3R_DESC_BASE<"bclr.w", int_mips_bclr_w, MSA128WOpnd>; 1452class BCLR_D_DESC : MSA_3R_DESC_BASE<"bclr.d", int_mips_bclr_d, MSA128DOpnd>; 1453 1454class BCLRI_B_DESC : MSA_BIT_B_DESC_BASE<"bclri.b", int_mips_bclri_b, 1455 MSA128BOpnd>; 1456class BCLRI_H_DESC : MSA_BIT_H_DESC_BASE<"bclri.h", int_mips_bclri_h, 1457 MSA128HOpnd>; 1458class BCLRI_W_DESC : MSA_BIT_W_DESC_BASE<"bclri.w", int_mips_bclri_w, 1459 MSA128WOpnd>; 1460class BCLRI_D_DESC : MSA_BIT_D_DESC_BASE<"bclri.d", int_mips_bclri_d, 1461 MSA128DOpnd>; 1462 1463class BINSL_B_DESC : MSA_3R_DESC_BASE<"binsl.b", int_mips_binsl_b, MSA128BOpnd>; 1464class BINSL_H_DESC : MSA_3R_DESC_BASE<"binsl.h", int_mips_binsl_h, MSA128HOpnd>; 1465class BINSL_W_DESC : MSA_3R_DESC_BASE<"binsl.w", int_mips_binsl_w, MSA128WOpnd>; 1466class BINSL_D_DESC : MSA_3R_DESC_BASE<"binsl.d", int_mips_binsl_d, MSA128DOpnd>; 1467 1468class BINSLI_B_DESC : MSA_BIT_B_DESC_BASE<"binsli.b", int_mips_binsli_b, 1469 MSA128BOpnd>; 1470class BINSLI_H_DESC : MSA_BIT_H_DESC_BASE<"binsli.h", int_mips_binsli_h, 1471 MSA128HOpnd>; 1472class BINSLI_W_DESC : MSA_BIT_W_DESC_BASE<"binsli.w", int_mips_binsli_w, 1473 MSA128WOpnd>; 1474class BINSLI_D_DESC : MSA_BIT_D_DESC_BASE<"binsli.d", int_mips_binsli_d, 1475 MSA128DOpnd>; 1476 1477class BINSR_B_DESC : MSA_3R_DESC_BASE<"binsr.b", int_mips_binsr_b, MSA128BOpnd>; 1478class BINSR_H_DESC : MSA_3R_DESC_BASE<"binsr.h", int_mips_binsr_h, MSA128HOpnd>; 1479class BINSR_W_DESC : MSA_3R_DESC_BASE<"binsr.w", int_mips_binsr_w, MSA128WOpnd>; 1480class BINSR_D_DESC : MSA_3R_DESC_BASE<"binsr.d", int_mips_binsr_d, MSA128DOpnd>; 1481 1482class BINSRI_B_DESC : MSA_BIT_B_DESC_BASE<"binsri.b", int_mips_binsri_b, 1483 MSA128BOpnd>; 1484class BINSRI_H_DESC : MSA_BIT_H_DESC_BASE<"binsri.h", int_mips_binsri_h, 1485 MSA128HOpnd>; 1486class BINSRI_W_DESC : MSA_BIT_W_DESC_BASE<"binsri.w", int_mips_binsri_w, 1487 MSA128WOpnd>; 1488class BINSRI_D_DESC : MSA_BIT_D_DESC_BASE<"binsri.d", int_mips_binsri_d, 1489 MSA128DOpnd>; 1490 1491class BMNZ_V_DESC : MSA_VEC_DESC_BASE<"bmnz.v", int_mips_bmnz_v, MSA128BOpnd>; 1492 1493class BMNZI_B_DESC : MSA_I8_X_DESC_BASE<"bmnzi.b", int_mips_bmnzi_b, 1494 MSA128BOpnd>; 1495 1496class BMZ_V_DESC : MSA_VEC_DESC_BASE<"bmz.v", int_mips_bmz_v, MSA128BOpnd>; 1497 1498class BMZI_B_DESC : MSA_I8_X_DESC_BASE<"bmzi.b", int_mips_bmzi_b, MSA128BOpnd>; 1499 1500class BNEG_B_DESC : MSA_3R_DESC_BASE<"bneg.b", int_mips_bneg_b, MSA128BOpnd>; 1501class BNEG_H_DESC : MSA_3R_DESC_BASE<"bneg.h", int_mips_bneg_h, MSA128HOpnd>; 1502class BNEG_W_DESC : MSA_3R_DESC_BASE<"bneg.w", int_mips_bneg_w, MSA128WOpnd>; 1503class BNEG_D_DESC : MSA_3R_DESC_BASE<"bneg.d", int_mips_bneg_d, MSA128DOpnd>; 1504 1505class BNEGI_B_DESC : MSA_BIT_B_DESC_BASE<"bnegi.b", int_mips_bnegi_b, 1506 MSA128BOpnd>; 1507class BNEGI_H_DESC : MSA_BIT_H_DESC_BASE<"bnegi.h", int_mips_bnegi_h, 1508 MSA128HOpnd>; 1509class BNEGI_W_DESC : MSA_BIT_W_DESC_BASE<"bnegi.w", int_mips_bnegi_w, 1510 MSA128WOpnd>; 1511class BNEGI_D_DESC : MSA_BIT_D_DESC_BASE<"bnegi.d", int_mips_bnegi_d, 1512 MSA128DOpnd>; 1513 1514class BNZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bnz.b", MSA128B>; 1515class BNZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bnz.h", MSA128H>; 1516class BNZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bnz.w", MSA128W>; 1517class BNZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bnz.d", MSA128D>; 1518 1519class BNZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bnz.v", MSA128B>; 1520 1521class BSEL_V_DESC { 1522 dag OutOperandList = (outs MSA128BOpnd:$wd); 1523 dag InOperandList = (ins MSA128BOpnd:$wd_in, MSA128BOpnd:$ws, 1524 MSA128BOpnd:$wt); 1525 string AsmString = "bsel.v\t$wd, $ws, $wt"; 1526 list<dag> Pattern = [(set MSA128BOpnd:$wd, 1527 (vselect MSA128BOpnd:$wd_in, MSA128BOpnd:$ws, 1528 MSA128BOpnd:$wt))]; 1529 InstrItinClass Itinerary = NoItinerary; 1530 string Constraints = "$wd = $wd_in"; 1531} 1532 1533class BSELI_B_DESC { 1534 dag OutOperandList = (outs MSA128BOpnd:$wd); 1535 dag InOperandList = (ins MSA128BOpnd:$wd_in, MSA128BOpnd:$ws, 1536 vsplat_uimm8:$u8); 1537 string AsmString = "bseli.b\t$wd, $ws, $u8"; 1538 list<dag> Pattern = [(set MSA128BOpnd:$wd, (vselect MSA128BOpnd:$wd_in, 1539 MSA128BOpnd:$ws, 1540 vsplati8_uimm8:$u8))]; 1541 InstrItinClass Itinerary = NoItinerary; 1542 string Constraints = "$wd = $wd_in"; 1543} 1544 1545class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", int_mips_bset_b, MSA128BOpnd>; 1546class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", int_mips_bset_h, MSA128HOpnd>; 1547class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", int_mips_bset_w, MSA128WOpnd>; 1548class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", int_mips_bset_d, MSA128DOpnd>; 1549 1550class BSETI_B_DESC : MSA_BIT_B_DESC_BASE<"bseti.b", int_mips_bseti_b, 1551 MSA128BOpnd>; 1552class BSETI_H_DESC : MSA_BIT_H_DESC_BASE<"bseti.h", int_mips_bseti_h, 1553 MSA128HOpnd>; 1554class BSETI_W_DESC : MSA_BIT_W_DESC_BASE<"bseti.w", int_mips_bseti_w, 1555 MSA128WOpnd>; 1556class BSETI_D_DESC : MSA_BIT_D_DESC_BASE<"bseti.d", int_mips_bseti_d, 1557 MSA128DOpnd>; 1558 1559class BZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bz.b", MSA128B>; 1560class BZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bz.h", MSA128H>; 1561class BZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bz.w", MSA128W>; 1562class BZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bz.d", MSA128D>; 1563 1564class BZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bz.v", MSA128B>; 1565 1566class CEQ_B_DESC : MSA_3R_DESC_BASE<"ceq.b", vseteq_v16i8, MSA128BOpnd>, 1567 IsCommutable; 1568class CEQ_H_DESC : MSA_3R_DESC_BASE<"ceq.h", vseteq_v8i16, MSA128HOpnd>, 1569 IsCommutable; 1570class CEQ_W_DESC : MSA_3R_DESC_BASE<"ceq.w", vseteq_v4i32, MSA128WOpnd>, 1571 IsCommutable; 1572class CEQ_D_DESC : MSA_3R_DESC_BASE<"ceq.d", vseteq_v2i64, MSA128DOpnd>, 1573 IsCommutable; 1574 1575class CEQI_B_DESC : MSA_I5_DESC_BASE<"ceqi.b", vseteq_v16i8, vsplati8_simm5, 1576 MSA128BOpnd>; 1577class CEQI_H_DESC : MSA_I5_DESC_BASE<"ceqi.h", vseteq_v8i16, vsplati16_simm5, 1578 MSA128HOpnd>; 1579class CEQI_W_DESC : MSA_I5_DESC_BASE<"ceqi.w", vseteq_v4i32, vsplati32_simm5, 1580 MSA128WOpnd>; 1581class CEQI_D_DESC : MSA_I5_DESC_BASE<"ceqi.d", vseteq_v2i64, vsplati64_simm5, 1582 MSA128DOpnd>; 1583 1584class CFCMSA_DESC { 1585 dag OutOperandList = (outs GPR32:$rd); 1586 dag InOperandList = (ins MSACtrl:$cs); 1587 string AsmString = "cfcmsa\t$rd, $cs"; 1588 InstrItinClass Itinerary = NoItinerary; 1589 bit hasSideEffects = 1; 1590} 1591 1592class CLE_S_B_DESC : MSA_3R_DESC_BASE<"cle_s.b", vsetle_v16i8, MSA128BOpnd>; 1593class CLE_S_H_DESC : MSA_3R_DESC_BASE<"cle_s.h", vsetle_v8i16, MSA128HOpnd>; 1594class CLE_S_W_DESC : MSA_3R_DESC_BASE<"cle_s.w", vsetle_v4i32, MSA128WOpnd>; 1595class CLE_S_D_DESC : MSA_3R_DESC_BASE<"cle_s.d", vsetle_v2i64, MSA128DOpnd>; 1596 1597class CLE_U_B_DESC : MSA_3R_DESC_BASE<"cle_u.b", vsetule_v16i8, MSA128BOpnd>; 1598class CLE_U_H_DESC : MSA_3R_DESC_BASE<"cle_u.h", vsetule_v8i16, MSA128HOpnd>; 1599class CLE_U_W_DESC : MSA_3R_DESC_BASE<"cle_u.w", vsetule_v4i32, MSA128WOpnd>; 1600class CLE_U_D_DESC : MSA_3R_DESC_BASE<"cle_u.d", vsetule_v2i64, MSA128DOpnd>; 1601 1602class CLEI_S_B_DESC : MSA_I5_DESC_BASE<"clei_s.b", vsetle_v16i8, 1603 vsplati8_simm5, MSA128BOpnd>; 1604class CLEI_S_H_DESC : MSA_I5_DESC_BASE<"clei_s.h", vsetle_v8i16, 1605 vsplati16_simm5, MSA128HOpnd>; 1606class CLEI_S_W_DESC : MSA_I5_DESC_BASE<"clei_s.w", vsetle_v4i32, 1607 vsplati32_simm5, MSA128WOpnd>; 1608class CLEI_S_D_DESC : MSA_I5_DESC_BASE<"clei_s.d", vsetle_v2i64, 1609 vsplati64_simm5, MSA128DOpnd>; 1610 1611class CLEI_U_B_DESC : MSA_I5_DESC_BASE<"clei_u.b", vsetule_v16i8, 1612 vsplati8_uimm5, MSA128BOpnd>; 1613class CLEI_U_H_DESC : MSA_I5_DESC_BASE<"clei_u.h", vsetule_v8i16, 1614 vsplati16_uimm5, MSA128HOpnd>; 1615class CLEI_U_W_DESC : MSA_I5_DESC_BASE<"clei_u.w", vsetule_v4i32, 1616 vsplati32_uimm5, MSA128WOpnd>; 1617class CLEI_U_D_DESC : MSA_I5_DESC_BASE<"clei_u.d", vsetule_v2i64, 1618 vsplati64_uimm5, MSA128DOpnd>; 1619 1620class CLT_S_B_DESC : MSA_3R_DESC_BASE<"clt_s.b", vsetlt_v16i8, MSA128BOpnd>; 1621class CLT_S_H_DESC : MSA_3R_DESC_BASE<"clt_s.h", vsetlt_v8i16, MSA128HOpnd>; 1622class CLT_S_W_DESC : MSA_3R_DESC_BASE<"clt_s.w", vsetlt_v4i32, MSA128WOpnd>; 1623class CLT_S_D_DESC : MSA_3R_DESC_BASE<"clt_s.d", vsetlt_v2i64, MSA128DOpnd>; 1624 1625class CLT_U_B_DESC : MSA_3R_DESC_BASE<"clt_u.b", vsetult_v16i8, MSA128BOpnd>; 1626class CLT_U_H_DESC : MSA_3R_DESC_BASE<"clt_u.h", vsetult_v8i16, MSA128HOpnd>; 1627class CLT_U_W_DESC : MSA_3R_DESC_BASE<"clt_u.w", vsetult_v4i32, MSA128WOpnd>; 1628class CLT_U_D_DESC : MSA_3R_DESC_BASE<"clt_u.d", vsetult_v2i64, MSA128DOpnd>; 1629 1630class CLTI_S_B_DESC : MSA_I5_DESC_BASE<"clti_s.b", vsetlt_v16i8, 1631 vsplati8_simm5, MSA128BOpnd>; 1632class CLTI_S_H_DESC : MSA_I5_DESC_BASE<"clti_s.h", vsetlt_v8i16, 1633 vsplati16_simm5, MSA128HOpnd>; 1634class CLTI_S_W_DESC : MSA_I5_DESC_BASE<"clti_s.w", vsetlt_v4i32, 1635 vsplati32_simm5, MSA128WOpnd>; 1636class CLTI_S_D_DESC : MSA_I5_DESC_BASE<"clti_s.d", vsetlt_v2i64, 1637 vsplati64_simm5, MSA128DOpnd>; 1638 1639class CLTI_U_B_DESC : MSA_I5_DESC_BASE<"clti_u.b", vsetult_v16i8, 1640 vsplati8_uimm5, MSA128BOpnd>; 1641class CLTI_U_H_DESC : MSA_I5_DESC_BASE<"clti_u.h", vsetult_v8i16, 1642 vsplati16_uimm5, MSA128HOpnd>; 1643class CLTI_U_W_DESC : MSA_I5_DESC_BASE<"clti_u.w", vsetult_v4i32, 1644 vsplati32_uimm5, MSA128WOpnd>; 1645class CLTI_U_D_DESC : MSA_I5_DESC_BASE<"clti_u.d", vsetult_v2i64, 1646 vsplati64_uimm5, MSA128DOpnd>; 1647 1648class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", vextract_sext_i8, v16i8, 1649 GPR32Opnd, MSA128BOpnd>; 1650class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", vextract_sext_i16, v8i16, 1651 GPR32Opnd, MSA128HOpnd>; 1652class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", vextract_sext_i32, v4i32, 1653 GPR32Opnd, MSA128WOpnd>; 1654 1655class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", vextract_zext_i8, v16i8, 1656 GPR32Opnd, MSA128BOpnd>; 1657class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", vextract_zext_i16, v8i16, 1658 GPR32Opnd, MSA128HOpnd>; 1659class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", vextract_zext_i32, v4i32, 1660 GPR32Opnd, MSA128WOpnd>; 1661 1662class COPY_FW_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v4f32, FGR32, 1663 MSA128W>; 1664class COPY_FD_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v2f64, FGR64, 1665 MSA128D>; 1666 1667class CTCMSA_DESC { 1668 dag OutOperandList = (outs); 1669 dag InOperandList = (ins MSACtrl:$cd, GPR32:$rs); 1670 string AsmString = "ctcmsa\t$cd, $rs"; 1671 InstrItinClass Itinerary = NoItinerary; 1672 bit hasSideEffects = 1; 1673} 1674 1675class DIV_S_B_DESC : MSA_3R_DESC_BASE<"div_s.b", sdiv, MSA128BOpnd>; 1676class DIV_S_H_DESC : MSA_3R_DESC_BASE<"div_s.h", sdiv, MSA128HOpnd>; 1677class DIV_S_W_DESC : MSA_3R_DESC_BASE<"div_s.w", sdiv, MSA128WOpnd>; 1678class DIV_S_D_DESC : MSA_3R_DESC_BASE<"div_s.d", sdiv, MSA128DOpnd>; 1679 1680class DIV_U_B_DESC : MSA_3R_DESC_BASE<"div_u.b", udiv, MSA128BOpnd>; 1681class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", udiv, MSA128HOpnd>; 1682class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", udiv, MSA128WOpnd>; 1683class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", udiv, MSA128DOpnd>; 1684 1685class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h, 1686 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>, 1687 IsCommutable; 1688class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w, 1689 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>, 1690 IsCommutable; 1691class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d, 1692 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>, 1693 IsCommutable; 1694 1695class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h, 1696 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>, 1697 IsCommutable; 1698class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w, 1699 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>, 1700 IsCommutable; 1701class DOTP_U_D_DESC : MSA_3R_DESC_BASE<"dotp_u.d", int_mips_dotp_u_d, 1702 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>, 1703 IsCommutable; 1704 1705class DPADD_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.h", int_mips_dpadd_s_h, 1706 MSA128HOpnd, MSA128BOpnd, 1707 MSA128BOpnd>, IsCommutable; 1708class DPADD_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.w", int_mips_dpadd_s_w, 1709 MSA128WOpnd, MSA128HOpnd, 1710 MSA128HOpnd>, IsCommutable; 1711class DPADD_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.d", int_mips_dpadd_s_d, 1712 MSA128DOpnd, MSA128WOpnd, 1713 MSA128WOpnd>, IsCommutable; 1714 1715class DPADD_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.h", int_mips_dpadd_u_h, 1716 MSA128HOpnd, MSA128BOpnd, 1717 MSA128BOpnd>, IsCommutable; 1718class DPADD_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.w", int_mips_dpadd_u_w, 1719 MSA128WOpnd, MSA128HOpnd, 1720 MSA128HOpnd>, IsCommutable; 1721class DPADD_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.d", int_mips_dpadd_u_d, 1722 MSA128DOpnd, MSA128WOpnd, 1723 MSA128WOpnd>, IsCommutable; 1724 1725class DPSUB_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.h", int_mips_dpsub_s_h, 1726 MSA128HOpnd, MSA128BOpnd, 1727 MSA128BOpnd>; 1728class DPSUB_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.w", int_mips_dpsub_s_w, 1729 MSA128WOpnd, MSA128HOpnd, 1730 MSA128HOpnd>; 1731class DPSUB_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.d", int_mips_dpsub_s_d, 1732 MSA128DOpnd, MSA128WOpnd, 1733 MSA128WOpnd>; 1734 1735class DPSUB_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.h", int_mips_dpsub_u_h, 1736 MSA128HOpnd, MSA128BOpnd, 1737 MSA128BOpnd>; 1738class DPSUB_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.w", int_mips_dpsub_u_w, 1739 MSA128WOpnd, MSA128HOpnd, 1740 MSA128HOpnd>; 1741class DPSUB_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.d", int_mips_dpsub_u_d, 1742 MSA128DOpnd, MSA128WOpnd, 1743 MSA128WOpnd>; 1744 1745class FADD_W_DESC : MSA_3RF_DESC_BASE<"fadd.w", fadd, MSA128WOpnd>, 1746 IsCommutable; 1747class FADD_D_DESC : MSA_3RF_DESC_BASE<"fadd.d", fadd, MSA128DOpnd>, 1748 IsCommutable; 1749 1750class FCAF_W_DESC : MSA_3RF_DESC_BASE<"fcaf.w", int_mips_fcaf_w, MSA128WOpnd>, 1751 IsCommutable; 1752class FCAF_D_DESC : MSA_3RF_DESC_BASE<"fcaf.d", int_mips_fcaf_d, MSA128DOpnd>, 1753 IsCommutable; 1754 1755class FCEQ_W_DESC : MSA_3RF_DESC_BASE<"fceq.w", vfsetoeq_v4f32, MSA128WOpnd>, 1756 IsCommutable; 1757class FCEQ_D_DESC : MSA_3RF_DESC_BASE<"fceq.d", vfsetoeq_v2f64, MSA128DOpnd>, 1758 IsCommutable; 1759 1760class FCLASS_W_DESC : MSA_2RF_DESC_BASE<"fclass.w", int_mips_fclass_w, 1761 MSA128WOpnd>; 1762class FCLASS_D_DESC : MSA_2RF_DESC_BASE<"fclass.d", int_mips_fclass_d, 1763 MSA128DOpnd>; 1764 1765class FCLE_W_DESC : MSA_3RF_DESC_BASE<"fcle.w", vfsetole_v4f32, MSA128WOpnd>; 1766class FCLE_D_DESC : MSA_3RF_DESC_BASE<"fcle.d", vfsetole_v2f64, MSA128DOpnd>; 1767 1768class FCLT_W_DESC : MSA_3RF_DESC_BASE<"fclt.w", vfsetolt_v4f32, MSA128WOpnd>; 1769class FCLT_D_DESC : MSA_3RF_DESC_BASE<"fclt.d", vfsetolt_v2f64, MSA128DOpnd>; 1770 1771class FCNE_W_DESC : MSA_3RF_DESC_BASE<"fcne.w", vfsetone_v4f32, MSA128WOpnd>, 1772 IsCommutable; 1773class FCNE_D_DESC : MSA_3RF_DESC_BASE<"fcne.d", vfsetone_v2f64, MSA128DOpnd>, 1774 IsCommutable; 1775 1776class FCOR_W_DESC : MSA_3RF_DESC_BASE<"fcor.w", vfsetord_v4f32, MSA128WOpnd>, 1777 IsCommutable; 1778class FCOR_D_DESC : MSA_3RF_DESC_BASE<"fcor.d", vfsetord_v2f64, MSA128DOpnd>, 1779 IsCommutable; 1780 1781class FCUEQ_W_DESC : MSA_3RF_DESC_BASE<"fcueq.w", vfsetueq_v4f32, MSA128WOpnd>, 1782 IsCommutable; 1783class FCUEQ_D_DESC : MSA_3RF_DESC_BASE<"fcueq.d", vfsetueq_v2f64, MSA128DOpnd>, 1784 IsCommutable; 1785 1786class FCULE_W_DESC : MSA_3RF_DESC_BASE<"fcule.w", vfsetule_v4f32, MSA128WOpnd>, 1787 IsCommutable; 1788class FCULE_D_DESC : MSA_3RF_DESC_BASE<"fcule.d", vfsetule_v2f64, MSA128DOpnd>, 1789 IsCommutable; 1790 1791class FCULT_W_DESC : MSA_3RF_DESC_BASE<"fcult.w", vfsetult_v4f32, MSA128WOpnd>, 1792 IsCommutable; 1793class FCULT_D_DESC : MSA_3RF_DESC_BASE<"fcult.d", vfsetult_v2f64, MSA128DOpnd>, 1794 IsCommutable; 1795 1796class FCUN_W_DESC : MSA_3RF_DESC_BASE<"fcun.w", vfsetun_v4f32, MSA128WOpnd>, 1797 IsCommutable; 1798class FCUN_D_DESC : MSA_3RF_DESC_BASE<"fcun.d", vfsetun_v2f64, MSA128DOpnd>, 1799 IsCommutable; 1800 1801class FCUNE_W_DESC : MSA_3RF_DESC_BASE<"fcune.w", vfsetune_v4f32, MSA128WOpnd>, 1802 IsCommutable; 1803class FCUNE_D_DESC : MSA_3RF_DESC_BASE<"fcune.d", vfsetune_v2f64, MSA128DOpnd>, 1804 IsCommutable; 1805 1806class FDIV_W_DESC : MSA_3RF_DESC_BASE<"fdiv.w", fdiv, MSA128WOpnd>; 1807class FDIV_D_DESC : MSA_3RF_DESC_BASE<"fdiv.d", fdiv, MSA128DOpnd>; 1808 1809class FEXDO_H_DESC : MSA_3RF_DESC_BASE<"fexdo.h", int_mips_fexdo_h, 1810 MSA128HOpnd, MSA128WOpnd, MSA128WOpnd>; 1811class FEXDO_W_DESC : MSA_3RF_DESC_BASE<"fexdo.w", int_mips_fexdo_w, 1812 MSA128WOpnd, MSA128DOpnd, MSA128DOpnd>; 1813 1814class FEXP2_W_DESC : MSA_3RF_DESC_BASE<"fexp2.w", int_mips_fexp2_w, 1815 MSA128WOpnd>; 1816class FEXP2_D_DESC : MSA_3RF_DESC_BASE<"fexp2.d", int_mips_fexp2_d, 1817 MSA128DOpnd>; 1818 1819class FEXUPL_W_DESC : MSA_2RF_DESC_BASE<"fexupl.w", int_mips_fexupl_w, 1820 MSA128WOpnd, MSA128HOpnd>; 1821class FEXUPL_D_DESC : MSA_2RF_DESC_BASE<"fexupl.d", int_mips_fexupl_d, 1822 MSA128DOpnd, MSA128WOpnd>; 1823 1824class FEXUPR_W_DESC : MSA_2RF_DESC_BASE<"fexupr.w", int_mips_fexupr_w, 1825 MSA128WOpnd, MSA128HOpnd>; 1826class FEXUPR_D_DESC : MSA_2RF_DESC_BASE<"fexupr.d", int_mips_fexupr_d, 1827 MSA128DOpnd, MSA128WOpnd>; 1828 1829class FFINT_S_W_DESC : MSA_2RF_DESC_BASE<"ffint_s.w", sint_to_fp, MSA128WOpnd>; 1830class FFINT_S_D_DESC : MSA_2RF_DESC_BASE<"ffint_s.d", sint_to_fp, MSA128DOpnd>; 1831 1832class FFINT_U_W_DESC : MSA_2RF_DESC_BASE<"ffint_u.w", uint_to_fp, MSA128WOpnd>; 1833class FFINT_U_D_DESC : MSA_2RF_DESC_BASE<"ffint_u.d", uint_to_fp, MSA128DOpnd>; 1834 1835class FFQL_W_DESC : MSA_2RF_DESC_BASE<"ffql.w", int_mips_ffql_w, 1836 MSA128WOpnd, MSA128HOpnd>; 1837class FFQL_D_DESC : MSA_2RF_DESC_BASE<"ffql.d", int_mips_ffql_d, 1838 MSA128DOpnd, MSA128WOpnd>; 1839 1840class FFQR_W_DESC : MSA_2RF_DESC_BASE<"ffqr.w", int_mips_ffqr_w, 1841 MSA128WOpnd, MSA128HOpnd>; 1842class FFQR_D_DESC : MSA_2RF_DESC_BASE<"ffqr.d", int_mips_ffqr_d, 1843 MSA128DOpnd, MSA128WOpnd>; 1844 1845class FILL_B_DESC : MSA_2R_FILL_DESC_BASE<"fill.b", v16i8, vsplati8, 1846 MSA128BOpnd, GPR32Opnd>; 1847class FILL_H_DESC : MSA_2R_FILL_DESC_BASE<"fill.h", v8i16, vsplati16, 1848 MSA128HOpnd, GPR32Opnd>; 1849class FILL_W_DESC : MSA_2R_FILL_DESC_BASE<"fill.w", v4i32, vsplati32, 1850 MSA128WOpnd, GPR32Opnd>; 1851 1852class FILL_FW_PSEUDO_DESC : MSA_2R_FILL_PSEUDO_BASE<v4f32, vsplatf32, MSA128W, 1853 FGR32>; 1854class FILL_FD_PSEUDO_DESC : MSA_2R_FILL_PSEUDO_BASE<v2f64, vsplatf64, MSA128D, 1855 FGR64>; 1856 1857class FLOG2_W_DESC : MSA_2RF_DESC_BASE<"flog2.w", flog2, MSA128WOpnd>; 1858class FLOG2_D_DESC : MSA_2RF_DESC_BASE<"flog2.d", flog2, MSA128DOpnd>; 1859 1860class FMADD_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.w", fma, MSA128WOpnd>; 1861class FMADD_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.d", fma, MSA128DOpnd>; 1862 1863class FMAX_W_DESC : MSA_3RF_DESC_BASE<"fmax.w", int_mips_fmax_w, MSA128WOpnd>; 1864class FMAX_D_DESC : MSA_3RF_DESC_BASE<"fmax.d", int_mips_fmax_d, MSA128DOpnd>; 1865 1866class FMAX_A_W_DESC : MSA_3RF_DESC_BASE<"fmax_a.w", int_mips_fmax_a_w, 1867 MSA128WOpnd>; 1868class FMAX_A_D_DESC : MSA_3RF_DESC_BASE<"fmax_a.d", int_mips_fmax_a_d, 1869 MSA128DOpnd>; 1870 1871class FMIN_W_DESC : MSA_3RF_DESC_BASE<"fmin.w", int_mips_fmin_w, MSA128WOpnd>; 1872class FMIN_D_DESC : MSA_3RF_DESC_BASE<"fmin.d", int_mips_fmin_d, MSA128DOpnd>; 1873 1874class FMIN_A_W_DESC : MSA_3RF_DESC_BASE<"fmin_a.w", int_mips_fmin_a_w, 1875 MSA128WOpnd>; 1876class FMIN_A_D_DESC : MSA_3RF_DESC_BASE<"fmin_a.d", int_mips_fmin_a_d, 1877 MSA128DOpnd>; 1878 1879class FMSUB_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.w", fms, MSA128WOpnd>; 1880class FMSUB_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.d", fms, MSA128DOpnd>; 1881 1882class FMUL_W_DESC : MSA_3RF_DESC_BASE<"fmul.w", fmul, MSA128WOpnd>; 1883class FMUL_D_DESC : MSA_3RF_DESC_BASE<"fmul.d", fmul, MSA128DOpnd>; 1884 1885class FRINT_W_DESC : MSA_2RF_DESC_BASE<"frint.w", frint, MSA128WOpnd>; 1886class FRINT_D_DESC : MSA_2RF_DESC_BASE<"frint.d", frint, MSA128DOpnd>; 1887 1888class FRCP_W_DESC : MSA_2RF_DESC_BASE<"frcp.w", int_mips_frcp_w, MSA128WOpnd>; 1889class FRCP_D_DESC : MSA_2RF_DESC_BASE<"frcp.d", int_mips_frcp_d, MSA128DOpnd>; 1890 1891class FRSQRT_W_DESC : MSA_2RF_DESC_BASE<"frsqrt.w", int_mips_frsqrt_w, 1892 MSA128WOpnd>; 1893class FRSQRT_D_DESC : MSA_2RF_DESC_BASE<"frsqrt.d", int_mips_frsqrt_d, 1894 MSA128DOpnd>; 1895 1896class FSAF_W_DESC : MSA_3RF_DESC_BASE<"fsaf.w", int_mips_fsaf_w, MSA128WOpnd>; 1897class FSAF_D_DESC : MSA_3RF_DESC_BASE<"fsaf.d", int_mips_fsaf_d, MSA128DOpnd>; 1898 1899class FSEQ_W_DESC : MSA_3RF_DESC_BASE<"fseq.w", int_mips_fseq_w, MSA128WOpnd>; 1900class FSEQ_D_DESC : MSA_3RF_DESC_BASE<"fseq.d", int_mips_fseq_d, MSA128DOpnd>; 1901 1902class FSLE_W_DESC : MSA_3RF_DESC_BASE<"fsle.w", int_mips_fsle_w, MSA128WOpnd>; 1903class FSLE_D_DESC : MSA_3RF_DESC_BASE<"fsle.d", int_mips_fsle_d, MSA128DOpnd>; 1904 1905class FSLT_W_DESC : MSA_3RF_DESC_BASE<"fslt.w", int_mips_fslt_w, MSA128WOpnd>; 1906class FSLT_D_DESC : MSA_3RF_DESC_BASE<"fslt.d", int_mips_fslt_d, MSA128DOpnd>; 1907 1908class FSNE_W_DESC : MSA_3RF_DESC_BASE<"fsne.w", int_mips_fsne_w, MSA128WOpnd>; 1909class FSNE_D_DESC : MSA_3RF_DESC_BASE<"fsne.d", int_mips_fsne_d, MSA128DOpnd>; 1910 1911class FSOR_W_DESC : MSA_3RF_DESC_BASE<"fsor.w", int_mips_fsor_w, MSA128WOpnd>; 1912class FSOR_D_DESC : MSA_3RF_DESC_BASE<"fsor.d", int_mips_fsor_d, MSA128DOpnd>; 1913 1914class FSQRT_W_DESC : MSA_2RF_DESC_BASE<"fsqrt.w", fsqrt, MSA128WOpnd>; 1915class FSQRT_D_DESC : MSA_2RF_DESC_BASE<"fsqrt.d", fsqrt, MSA128DOpnd>; 1916 1917class FSUB_W_DESC : MSA_3RF_DESC_BASE<"fsub.w", fsub, MSA128WOpnd>; 1918class FSUB_D_DESC : MSA_3RF_DESC_BASE<"fsub.d", fsub, MSA128DOpnd>; 1919 1920class FSUEQ_W_DESC : MSA_3RF_DESC_BASE<"fsueq.w", int_mips_fsueq_w, 1921 MSA128WOpnd>; 1922class FSUEQ_D_DESC : MSA_3RF_DESC_BASE<"fsueq.d", int_mips_fsueq_d, 1923 MSA128DOpnd>; 1924 1925class FSULE_W_DESC : MSA_3RF_DESC_BASE<"fsule.w", int_mips_fsule_w, 1926 MSA128WOpnd>; 1927class FSULE_D_DESC : MSA_3RF_DESC_BASE<"fsule.d", int_mips_fsule_d, 1928 MSA128DOpnd>; 1929 1930class FSULT_W_DESC : MSA_3RF_DESC_BASE<"fsult.w", int_mips_fsult_w, 1931 MSA128WOpnd>; 1932class FSULT_D_DESC : MSA_3RF_DESC_BASE<"fsult.d", int_mips_fsult_d, 1933 MSA128DOpnd>; 1934 1935class FSUN_W_DESC : MSA_3RF_DESC_BASE<"fsun.w", int_mips_fsun_w, 1936 MSA128WOpnd>; 1937class FSUN_D_DESC : MSA_3RF_DESC_BASE<"fsun.d", int_mips_fsun_d, 1938 MSA128DOpnd>; 1939 1940class FSUNE_W_DESC : MSA_3RF_DESC_BASE<"fsune.w", int_mips_fsune_w, 1941 MSA128WOpnd>; 1942class FSUNE_D_DESC : MSA_3RF_DESC_BASE<"fsune.d", int_mips_fsune_d, 1943 MSA128DOpnd>; 1944 1945class FTINT_S_W_DESC : MSA_2RF_DESC_BASE<"ftint_s.w", int_mips_ftint_s_w, 1946 MSA128WOpnd>; 1947class FTINT_S_D_DESC : MSA_2RF_DESC_BASE<"ftint_s.d", int_mips_ftint_s_d, 1948 MSA128DOpnd>; 1949 1950class FTINT_U_W_DESC : MSA_2RF_DESC_BASE<"ftint_u.w", int_mips_ftint_u_w, 1951 MSA128WOpnd>; 1952class FTINT_U_D_DESC : MSA_2RF_DESC_BASE<"ftint_u.d", int_mips_ftint_u_d, 1953 MSA128DOpnd>; 1954 1955class FTQ_H_DESC : MSA_3RF_DESC_BASE<"ftq.h", int_mips_ftq_h, 1956 MSA128HOpnd, MSA128WOpnd, MSA128WOpnd>; 1957class FTQ_W_DESC : MSA_3RF_DESC_BASE<"ftq.w", int_mips_ftq_w, 1958 MSA128WOpnd, MSA128DOpnd, MSA128DOpnd>; 1959 1960class FTRUNC_S_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.w", fp_to_sint, 1961 MSA128WOpnd>; 1962class FTRUNC_S_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.d", fp_to_sint, 1963 MSA128DOpnd>; 1964 1965class FTRUNC_U_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.w", fp_to_uint, 1966 MSA128WOpnd>; 1967class FTRUNC_U_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.d", fp_to_uint, 1968 MSA128DOpnd>; 1969 1970class HADD_S_H_DESC : MSA_3R_DESC_BASE<"hadd_s.h", int_mips_hadd_s_h, 1971 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1972class HADD_S_W_DESC : MSA_3R_DESC_BASE<"hadd_s.w", int_mips_hadd_s_w, 1973 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 1974class HADD_S_D_DESC : MSA_3R_DESC_BASE<"hadd_s.d", int_mips_hadd_s_d, 1975 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 1976 1977class HADD_U_H_DESC : MSA_3R_DESC_BASE<"hadd_u.h", int_mips_hadd_u_h, 1978 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1979class HADD_U_W_DESC : MSA_3R_DESC_BASE<"hadd_u.w", int_mips_hadd_u_w, 1980 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 1981class HADD_U_D_DESC : MSA_3R_DESC_BASE<"hadd_u.d", int_mips_hadd_u_d, 1982 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 1983 1984class HSUB_S_H_DESC : MSA_3R_DESC_BASE<"hsub_s.h", int_mips_hsub_s_h, 1985 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1986class HSUB_S_W_DESC : MSA_3R_DESC_BASE<"hsub_s.w", int_mips_hsub_s_w, 1987 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 1988class HSUB_S_D_DESC : MSA_3R_DESC_BASE<"hsub_s.d", int_mips_hsub_s_d, 1989 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 1990 1991class HSUB_U_H_DESC : MSA_3R_DESC_BASE<"hsub_u.h", int_mips_hsub_u_h, 1992 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1993class HSUB_U_W_DESC : MSA_3R_DESC_BASE<"hsub_u.w", int_mips_hsub_u_w, 1994 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 1995class HSUB_U_D_DESC : MSA_3R_DESC_BASE<"hsub_u.d", int_mips_hsub_u_d, 1996 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 1997 1998class ILVEV_B_DESC : MSA_3R_DESC_BASE<"ilvev.b", MipsILVEV, MSA128BOpnd>; 1999class ILVEV_H_DESC : MSA_3R_DESC_BASE<"ilvev.h", MipsILVEV, MSA128HOpnd>; 2000class ILVEV_W_DESC : MSA_3R_DESC_BASE<"ilvev.w", MipsILVEV, MSA128WOpnd>; 2001class ILVEV_D_DESC : MSA_3R_DESC_BASE<"ilvev.d", MipsILVEV, MSA128DOpnd>; 2002 2003class ILVL_B_DESC : MSA_3R_DESC_BASE<"ilvl.b", MipsILVL, MSA128BOpnd>; 2004class ILVL_H_DESC : MSA_3R_DESC_BASE<"ilvl.h", MipsILVL, MSA128HOpnd>; 2005class ILVL_W_DESC : MSA_3R_DESC_BASE<"ilvl.w", MipsILVL, MSA128WOpnd>; 2006class ILVL_D_DESC : MSA_3R_DESC_BASE<"ilvl.d", MipsILVL, MSA128DOpnd>; 2007 2008class ILVOD_B_DESC : MSA_3R_DESC_BASE<"ilvod.b", MipsILVOD, MSA128BOpnd>; 2009class ILVOD_H_DESC : MSA_3R_DESC_BASE<"ilvod.h", MipsILVOD, MSA128HOpnd>; 2010class ILVOD_W_DESC : MSA_3R_DESC_BASE<"ilvod.w", MipsILVOD, MSA128WOpnd>; 2011class ILVOD_D_DESC : MSA_3R_DESC_BASE<"ilvod.d", MipsILVOD, MSA128DOpnd>; 2012 2013class ILVR_B_DESC : MSA_3R_DESC_BASE<"ilvr.b", MipsILVR, MSA128BOpnd>; 2014class ILVR_H_DESC : MSA_3R_DESC_BASE<"ilvr.h", MipsILVR, MSA128HOpnd>; 2015class ILVR_W_DESC : MSA_3R_DESC_BASE<"ilvr.w", MipsILVR, MSA128WOpnd>; 2016class ILVR_D_DESC : MSA_3R_DESC_BASE<"ilvr.d", MipsILVR, MSA128DOpnd>; 2017 2018class INSERT_B_DESC : MSA_INSERT_DESC_BASE<"insert.b", vinsert_v16i8, 2019 MSA128BOpnd, GPR32Opnd>; 2020class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", vinsert_v8i16, 2021 MSA128HOpnd, GPR32Opnd>; 2022class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", vinsert_v4i32, 2023 MSA128WOpnd, GPR32Opnd>; 2024 2025class INSERT_FW_PSEUDO_DESC : MSA_INSERT_PSEUDO_BASE<vector_insert, v4f32, 2026 MSA128WOpnd, FGR32Opnd>; 2027class INSERT_FD_PSEUDO_DESC : MSA_INSERT_PSEUDO_BASE<vector_insert, v2f64, 2028 MSA128DOpnd, FGR64Opnd>; 2029 2030class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b, 2031 MSA128BOpnd>; 2032class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h, 2033 MSA128HOpnd>; 2034class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w, 2035 MSA128WOpnd>; 2036class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d, 2037 MSA128DOpnd>; 2038 2039class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2040 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem, 2041 ComplexPattern Addr = addrRegImm, 2042 InstrItinClass itin = NoItinerary> { 2043 dag OutOperandList = (outs RCWD:$wd); 2044 dag InOperandList = (ins MemOpnd:$addr); 2045 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2046 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))]; 2047 InstrItinClass Itinerary = itin; 2048} 2049 2050class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, MSA128B>; 2051class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, MSA128H>; 2052class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, MSA128W>; 2053class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, MSA128D>; 2054 2055class LDI_B_DESC : MSA_I10_LDI_DESC_BASE<"ldi.b", MSA128B>; 2056class LDI_H_DESC : MSA_I10_LDI_DESC_BASE<"ldi.h", MSA128H>; 2057class LDI_W_DESC : MSA_I10_LDI_DESC_BASE<"ldi.w", MSA128W>; 2058class LDI_D_DESC : MSA_I10_LDI_DESC_BASE<"ldi.d", MSA128D>; 2059 2060class LSA_DESC { 2061 dag OutOperandList = (outs GPR32:$rd); 2062 dag InOperandList = (ins GPR32:$rs, GPR32:$rt, uimm2:$sa); 2063 string AsmString = "lsa\t$rd, $rs, $rt, $sa"; 2064 list<dag> Pattern = [(set GPR32:$rd, (add GPR32:$rs, (shl GPR32:$rt, 2065 immZExt2Lsa:$sa)))]; 2066 InstrItinClass Itinerary = NoItinerary; 2067} 2068 2069class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h, 2070 MSA128HOpnd>; 2071class MADD_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.w", int_mips_madd_q_w, 2072 MSA128WOpnd>; 2073 2074class MADDR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.h", int_mips_maddr_q_h, 2075 MSA128HOpnd>; 2076class MADDR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.w", int_mips_maddr_q_w, 2077 MSA128WOpnd>; 2078 2079class MADDV_B_DESC : MSA_3R_4R_DESC_BASE<"maddv.b", muladd, MSA128BOpnd>; 2080class MADDV_H_DESC : MSA_3R_4R_DESC_BASE<"maddv.h", muladd, MSA128HOpnd>; 2081class MADDV_W_DESC : MSA_3R_4R_DESC_BASE<"maddv.w", muladd, MSA128WOpnd>; 2082class MADDV_D_DESC : MSA_3R_4R_DESC_BASE<"maddv.d", muladd, MSA128DOpnd>; 2083 2084class MAX_A_B_DESC : MSA_3R_DESC_BASE<"max_a.b", int_mips_max_a_b, MSA128BOpnd>; 2085class MAX_A_H_DESC : MSA_3R_DESC_BASE<"max_a.h", int_mips_max_a_h, MSA128HOpnd>; 2086class MAX_A_W_DESC : MSA_3R_DESC_BASE<"max_a.w", int_mips_max_a_w, MSA128WOpnd>; 2087class MAX_A_D_DESC : MSA_3R_DESC_BASE<"max_a.d", int_mips_max_a_d, MSA128DOpnd>; 2088 2089class MAX_S_B_DESC : MSA_3R_DESC_BASE<"max_s.b", MipsVSMax, MSA128BOpnd>; 2090class MAX_S_H_DESC : MSA_3R_DESC_BASE<"max_s.h", MipsVSMax, MSA128HOpnd>; 2091class MAX_S_W_DESC : MSA_3R_DESC_BASE<"max_s.w", MipsVSMax, MSA128WOpnd>; 2092class MAX_S_D_DESC : MSA_3R_DESC_BASE<"max_s.d", MipsVSMax, MSA128DOpnd>; 2093 2094class MAX_U_B_DESC : MSA_3R_DESC_BASE<"max_u.b", MipsVUMax, MSA128BOpnd>; 2095class MAX_U_H_DESC : MSA_3R_DESC_BASE<"max_u.h", MipsVUMax, MSA128HOpnd>; 2096class MAX_U_W_DESC : MSA_3R_DESC_BASE<"max_u.w", MipsVUMax, MSA128WOpnd>; 2097class MAX_U_D_DESC : MSA_3R_DESC_BASE<"max_u.d", MipsVUMax, MSA128DOpnd>; 2098 2099class MAXI_S_B_DESC : MSA_I5_DESC_BASE<"maxi_s.b", MipsVSMax, vsplati8_simm5, 2100 MSA128BOpnd>; 2101class MAXI_S_H_DESC : MSA_I5_DESC_BASE<"maxi_s.h", MipsVSMax, vsplati16_simm5, 2102 MSA128HOpnd>; 2103class MAXI_S_W_DESC : MSA_I5_DESC_BASE<"maxi_s.w", MipsVSMax, vsplati32_simm5, 2104 MSA128WOpnd>; 2105class MAXI_S_D_DESC : MSA_I5_DESC_BASE<"maxi_s.d", MipsVSMax, vsplati64_simm5, 2106 MSA128DOpnd>; 2107 2108class MAXI_U_B_DESC : MSA_I5_DESC_BASE<"maxi_u.b", MipsVUMax, vsplati8_uimm5, 2109 MSA128BOpnd>; 2110class MAXI_U_H_DESC : MSA_I5_DESC_BASE<"maxi_u.h", MipsVUMax, vsplati16_uimm5, 2111 MSA128HOpnd>; 2112class MAXI_U_W_DESC : MSA_I5_DESC_BASE<"maxi_u.w", MipsVUMax, vsplati32_uimm5, 2113 MSA128WOpnd>; 2114class MAXI_U_D_DESC : MSA_I5_DESC_BASE<"maxi_u.d", MipsVUMax, vsplati64_uimm5, 2115 MSA128DOpnd>; 2116 2117class MIN_A_B_DESC : MSA_3R_DESC_BASE<"min_a.b", int_mips_min_a_b, MSA128BOpnd>; 2118class MIN_A_H_DESC : MSA_3R_DESC_BASE<"min_a.h", int_mips_min_a_h, MSA128HOpnd>; 2119class MIN_A_W_DESC : MSA_3R_DESC_BASE<"min_a.w", int_mips_min_a_w, MSA128WOpnd>; 2120class MIN_A_D_DESC : MSA_3R_DESC_BASE<"min_a.d", int_mips_min_a_d, MSA128DOpnd>; 2121 2122class MIN_S_B_DESC : MSA_3R_DESC_BASE<"min_s.b", MipsVSMin, MSA128BOpnd>; 2123class MIN_S_H_DESC : MSA_3R_DESC_BASE<"min_s.h", MipsVSMin, MSA128HOpnd>; 2124class MIN_S_W_DESC : MSA_3R_DESC_BASE<"min_s.w", MipsVSMin, MSA128WOpnd>; 2125class MIN_S_D_DESC : MSA_3R_DESC_BASE<"min_s.d", MipsVSMin, MSA128DOpnd>; 2126 2127class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", MipsVUMin, MSA128BOpnd>; 2128class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", MipsVUMin, MSA128HOpnd>; 2129class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", MipsVUMin, MSA128WOpnd>; 2130class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", MipsVUMin, MSA128DOpnd>; 2131 2132class MINI_S_B_DESC : MSA_I5_DESC_BASE<"mini_s.b", MipsVSMin, vsplati8_simm5, 2133 MSA128BOpnd>; 2134class MINI_S_H_DESC : MSA_I5_DESC_BASE<"mini_s.h", MipsVSMin, vsplati16_simm5, 2135 MSA128HOpnd>; 2136class MINI_S_W_DESC : MSA_I5_DESC_BASE<"mini_s.w", MipsVSMin, vsplati32_simm5, 2137 MSA128WOpnd>; 2138class MINI_S_D_DESC : MSA_I5_DESC_BASE<"mini_s.d", MipsVSMin, vsplati64_simm5, 2139 MSA128DOpnd>; 2140 2141class MINI_U_B_DESC : MSA_I5_DESC_BASE<"mini_u.b", MipsVUMin, vsplati8_uimm5, 2142 MSA128BOpnd>; 2143class MINI_U_H_DESC : MSA_I5_DESC_BASE<"mini_u.h", MipsVUMin, vsplati16_uimm5, 2144 MSA128HOpnd>; 2145class MINI_U_W_DESC : MSA_I5_DESC_BASE<"mini_u.w", MipsVUMin, vsplati32_uimm5, 2146 MSA128WOpnd>; 2147class MINI_U_D_DESC : MSA_I5_DESC_BASE<"mini_u.d", MipsVUMin, vsplati64_uimm5, 2148 MSA128DOpnd>; 2149 2150class MOD_S_B_DESC : MSA_3R_DESC_BASE<"mod_s.b", srem, MSA128BOpnd>; 2151class MOD_S_H_DESC : MSA_3R_DESC_BASE<"mod_s.h", srem, MSA128HOpnd>; 2152class MOD_S_W_DESC : MSA_3R_DESC_BASE<"mod_s.w", srem, MSA128WOpnd>; 2153class MOD_S_D_DESC : MSA_3R_DESC_BASE<"mod_s.d", srem, MSA128DOpnd>; 2154 2155class MOD_U_B_DESC : MSA_3R_DESC_BASE<"mod_u.b", urem, MSA128BOpnd>; 2156class MOD_U_H_DESC : MSA_3R_DESC_BASE<"mod_u.h", urem, MSA128HOpnd>; 2157class MOD_U_W_DESC : MSA_3R_DESC_BASE<"mod_u.w", urem, MSA128WOpnd>; 2158class MOD_U_D_DESC : MSA_3R_DESC_BASE<"mod_u.d", urem, MSA128DOpnd>; 2159 2160class MOVE_V_DESC { 2161 dag OutOperandList = (outs MSA128B:$wd); 2162 dag InOperandList = (ins MSA128B:$ws); 2163 string AsmString = "move.v\t$wd, $ws"; 2164 list<dag> Pattern = []; 2165 InstrItinClass Itinerary = NoItinerary; 2166} 2167 2168class MSUB_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.h", int_mips_msub_q_h, 2169 MSA128HOpnd>; 2170class MSUB_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.w", int_mips_msub_q_w, 2171 MSA128WOpnd>; 2172 2173class MSUBR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.h", int_mips_msubr_q_h, 2174 MSA128HOpnd>; 2175class MSUBR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.w", int_mips_msubr_q_w, 2176 MSA128WOpnd>; 2177 2178class MSUBV_B_DESC : MSA_3R_4R_DESC_BASE<"msubv.b", mulsub, MSA128BOpnd>; 2179class MSUBV_H_DESC : MSA_3R_4R_DESC_BASE<"msubv.h", mulsub, MSA128HOpnd>; 2180class MSUBV_W_DESC : MSA_3R_4R_DESC_BASE<"msubv.w", mulsub, MSA128WOpnd>; 2181class MSUBV_D_DESC : MSA_3R_4R_DESC_BASE<"msubv.d", mulsub, MSA128DOpnd>; 2182 2183class MUL_Q_H_DESC : MSA_3RF_DESC_BASE<"mul_q.h", int_mips_mul_q_h, 2184 MSA128HOpnd>; 2185class MUL_Q_W_DESC : MSA_3RF_DESC_BASE<"mul_q.w", int_mips_mul_q_w, 2186 MSA128WOpnd>; 2187 2188class MULR_Q_H_DESC : MSA_3RF_DESC_BASE<"mulr_q.h", int_mips_mulr_q_h, 2189 MSA128HOpnd>; 2190class MULR_Q_W_DESC : MSA_3RF_DESC_BASE<"mulr_q.w", int_mips_mulr_q_w, 2191 MSA128WOpnd>; 2192 2193class MULV_B_DESC : MSA_3R_DESC_BASE<"mulv.b", mul, MSA128BOpnd>; 2194class MULV_H_DESC : MSA_3R_DESC_BASE<"mulv.h", mul, MSA128HOpnd>; 2195class MULV_W_DESC : MSA_3R_DESC_BASE<"mulv.w", mul, MSA128WOpnd>; 2196class MULV_D_DESC : MSA_3R_DESC_BASE<"mulv.d", mul, MSA128DOpnd>; 2197 2198class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b, MSA128BOpnd>; 2199class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h, MSA128HOpnd>; 2200class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w, MSA128WOpnd>; 2201class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d, MSA128DOpnd>; 2202 2203class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", ctlz, MSA128BOpnd>; 2204class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", ctlz, MSA128HOpnd>; 2205class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", ctlz, MSA128WOpnd>; 2206class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", ctlz, MSA128DOpnd>; 2207 2208class NOR_V_DESC : MSA_VEC_DESC_BASE<"nor.v", MipsVNOR, MSA128BOpnd>; 2209class NOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128HOpnd>; 2210class NOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128WOpnd>; 2211class NOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128DOpnd>; 2212 2213class NORI_B_DESC : MSA_I8_DESC_BASE<"nori.b", MipsVNOR, vsplati8_uimm8, 2214 MSA128BOpnd>; 2215 2216class OR_V_DESC : MSA_VEC_DESC_BASE<"or.v", or, MSA128BOpnd>; 2217class OR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128HOpnd>; 2218class OR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128WOpnd>; 2219class OR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128DOpnd>; 2220 2221class ORI_B_DESC : MSA_I8_DESC_BASE<"ori.b", or, vsplati8_uimm8, MSA128BOpnd>; 2222 2223class PCKEV_B_DESC : MSA_3R_DESC_BASE<"pckev.b", MipsPCKEV, MSA128BOpnd>; 2224class PCKEV_H_DESC : MSA_3R_DESC_BASE<"pckev.h", MipsPCKEV, MSA128HOpnd>; 2225class PCKEV_W_DESC : MSA_3R_DESC_BASE<"pckev.w", MipsPCKEV, MSA128WOpnd>; 2226class PCKEV_D_DESC : MSA_3R_DESC_BASE<"pckev.d", MipsPCKEV, MSA128DOpnd>; 2227 2228class PCKOD_B_DESC : MSA_3R_DESC_BASE<"pckod.b", MipsPCKOD, MSA128BOpnd>; 2229class PCKOD_H_DESC : MSA_3R_DESC_BASE<"pckod.h", MipsPCKOD, MSA128HOpnd>; 2230class PCKOD_W_DESC : MSA_3R_DESC_BASE<"pckod.w", MipsPCKOD, MSA128WOpnd>; 2231class PCKOD_D_DESC : MSA_3R_DESC_BASE<"pckod.d", MipsPCKOD, MSA128DOpnd>; 2232 2233class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", ctpop, MSA128BOpnd>; 2234class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", ctpop, MSA128HOpnd>; 2235class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", ctpop, MSA128WOpnd>; 2236class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", ctpop, MSA128DOpnd>; 2237 2238class SAT_S_B_DESC : MSA_BIT_B_DESC_BASE<"sat_s.b", int_mips_sat_s_b, 2239 MSA128BOpnd>; 2240class SAT_S_H_DESC : MSA_BIT_H_DESC_BASE<"sat_s.h", int_mips_sat_s_h, 2241 MSA128HOpnd>; 2242class SAT_S_W_DESC : MSA_BIT_W_DESC_BASE<"sat_s.w", int_mips_sat_s_w, 2243 MSA128WOpnd>; 2244class SAT_S_D_DESC : MSA_BIT_D_DESC_BASE<"sat_s.d", int_mips_sat_s_d, 2245 MSA128DOpnd>; 2246 2247class SAT_U_B_DESC : MSA_BIT_B_DESC_BASE<"sat_u.b", int_mips_sat_u_b, 2248 MSA128BOpnd>; 2249class SAT_U_H_DESC : MSA_BIT_H_DESC_BASE<"sat_u.h", int_mips_sat_u_h, 2250 MSA128HOpnd>; 2251class SAT_U_W_DESC : MSA_BIT_W_DESC_BASE<"sat_u.w", int_mips_sat_u_w, 2252 MSA128WOpnd>; 2253class SAT_U_D_DESC : MSA_BIT_D_DESC_BASE<"sat_u.d", int_mips_sat_u_d, 2254 MSA128DOpnd>; 2255 2256class SHF_B_DESC : MSA_I8_SHF_DESC_BASE<"shf.b", MSA128BOpnd>; 2257class SHF_H_DESC : MSA_I8_SHF_DESC_BASE<"shf.h", MSA128HOpnd>; 2258class SHF_W_DESC : MSA_I8_SHF_DESC_BASE<"shf.w", MSA128WOpnd>; 2259 2260class SLD_B_DESC : MSA_3R_INDEX_DESC_BASE<"sld.b", int_mips_sld_b, MSA128BOpnd, 2261 MSA128BOpnd, GPR32Opnd>; 2262class SLD_H_DESC : MSA_3R_INDEX_DESC_BASE<"sld.h", int_mips_sld_h, MSA128HOpnd, 2263 MSA128HOpnd, GPR32Opnd>; 2264class SLD_W_DESC : MSA_3R_INDEX_DESC_BASE<"sld.w", int_mips_sld_w, MSA128WOpnd, 2265 MSA128WOpnd, GPR32Opnd>; 2266class SLD_D_DESC : MSA_3R_INDEX_DESC_BASE<"sld.d", int_mips_sld_d, MSA128DOpnd, 2267 MSA128DOpnd, GPR32Opnd>; 2268 2269class SLDI_B_DESC : MSA_ELM_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128BOpnd>; 2270class SLDI_H_DESC : MSA_ELM_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128HOpnd>; 2271class SLDI_W_DESC : MSA_ELM_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128WOpnd>; 2272class SLDI_D_DESC : MSA_ELM_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128DOpnd>; 2273 2274class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", shl, MSA128BOpnd>; 2275class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", shl, MSA128HOpnd>; 2276class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", shl, MSA128WOpnd>; 2277class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", shl, MSA128DOpnd>; 2278 2279class SLLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.b", shl, vsplati8_uimm3, 2280 MSA128BOpnd>; 2281class SLLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.h", shl, vsplati16_uimm4, 2282 MSA128HOpnd>; 2283class SLLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.w", shl, vsplati32_uimm5, 2284 MSA128WOpnd>; 2285class SLLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.d", shl, vsplati64_uimm6, 2286 MSA128DOpnd>; 2287 2288class SPLAT_B_DESC : MSA_3R_DESC_BASE<"splat.b", int_mips_splat_b, MSA128BOpnd, 2289 MSA128BOpnd, GPR32Opnd>; 2290class SPLAT_H_DESC : MSA_3R_DESC_BASE<"splat.h", int_mips_splat_h, MSA128HOpnd, 2291 MSA128HOpnd, GPR32Opnd>; 2292class SPLAT_W_DESC : MSA_3R_DESC_BASE<"splat.w", int_mips_splat_w, MSA128WOpnd, 2293 MSA128WOpnd, GPR32Opnd>; 2294class SPLAT_D_DESC : MSA_3R_DESC_BASE<"splat.d", int_mips_splat_d, MSA128DOpnd, 2295 MSA128DOpnd, GPR32Opnd>; 2296 2297class SPLATI_B_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.b", vsplati8_uimm4, 2298 MSA128BOpnd>; 2299class SPLATI_H_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.h", vsplati16_uimm3, 2300 MSA128HOpnd>; 2301class SPLATI_W_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.w", vsplati32_uimm2, 2302 MSA128WOpnd>; 2303class SPLATI_D_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.d", vsplati64_uimm1, 2304 MSA128DOpnd>; 2305 2306class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", sra, MSA128BOpnd>; 2307class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", sra, MSA128HOpnd>; 2308class SRA_W_DESC : MSA_3R_DESC_BASE<"sra.w", sra, MSA128WOpnd>; 2309class SRA_D_DESC : MSA_3R_DESC_BASE<"sra.d", sra, MSA128DOpnd>; 2310 2311class SRAI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.b", sra, vsplati8_uimm3, 2312 MSA128BOpnd>; 2313class SRAI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.h", sra, vsplati16_uimm4, 2314 MSA128HOpnd>; 2315class SRAI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.w", sra, vsplati32_uimm5, 2316 MSA128WOpnd>; 2317class SRAI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.d", sra, vsplati64_uimm6, 2318 MSA128DOpnd>; 2319 2320class SRAR_B_DESC : MSA_3R_DESC_BASE<"srar.b", int_mips_srar_b, MSA128BOpnd>; 2321class SRAR_H_DESC : MSA_3R_DESC_BASE<"srar.h", int_mips_srar_h, MSA128HOpnd>; 2322class SRAR_W_DESC : MSA_3R_DESC_BASE<"srar.w", int_mips_srar_w, MSA128WOpnd>; 2323class SRAR_D_DESC : MSA_3R_DESC_BASE<"srar.d", int_mips_srar_d, MSA128DOpnd>; 2324 2325class SRARI_B_DESC : MSA_BIT_B_DESC_BASE<"srari.b", int_mips_srari_b, 2326 MSA128BOpnd>; 2327class SRARI_H_DESC : MSA_BIT_H_DESC_BASE<"srari.h", int_mips_srari_h, 2328 MSA128HOpnd>; 2329class SRARI_W_DESC : MSA_BIT_W_DESC_BASE<"srari.w", int_mips_srari_w, 2330 MSA128WOpnd>; 2331class SRARI_D_DESC : MSA_BIT_D_DESC_BASE<"srari.d", int_mips_srari_d, 2332 MSA128DOpnd>; 2333 2334class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", srl, MSA128BOpnd>; 2335class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", srl, MSA128HOpnd>; 2336class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", srl, MSA128WOpnd>; 2337class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", srl, MSA128DOpnd>; 2338 2339class SRLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.b", srl, vsplati8_uimm3, 2340 MSA128BOpnd>; 2341class SRLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.h", srl, vsplati16_uimm4, 2342 MSA128HOpnd>; 2343class SRLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.w", srl, vsplati32_uimm5, 2344 MSA128WOpnd>; 2345class SRLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.d", srl, vsplati64_uimm6, 2346 MSA128DOpnd>; 2347 2348class SRLR_B_DESC : MSA_3R_DESC_BASE<"srlr.b", int_mips_srlr_b, MSA128BOpnd>; 2349class SRLR_H_DESC : MSA_3R_DESC_BASE<"srlr.h", int_mips_srlr_h, MSA128HOpnd>; 2350class SRLR_W_DESC : MSA_3R_DESC_BASE<"srlr.w", int_mips_srlr_w, MSA128WOpnd>; 2351class SRLR_D_DESC : MSA_3R_DESC_BASE<"srlr.d", int_mips_srlr_d, MSA128DOpnd>; 2352 2353class SRLRI_B_DESC : MSA_BIT_B_DESC_BASE<"srlri.b", int_mips_srlri_b, 2354 MSA128BOpnd>; 2355class SRLRI_H_DESC : MSA_BIT_H_DESC_BASE<"srlri.h", int_mips_srlri_h, 2356 MSA128HOpnd>; 2357class SRLRI_W_DESC : MSA_BIT_W_DESC_BASE<"srlri.w", int_mips_srlri_w, 2358 MSA128WOpnd>; 2359class SRLRI_D_DESC : MSA_BIT_D_DESC_BASE<"srlri.d", int_mips_srlri_d, 2360 MSA128DOpnd>; 2361 2362class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2363 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem, 2364 ComplexPattern Addr = addrRegImm, 2365 InstrItinClass itin = NoItinerary> { 2366 dag OutOperandList = (outs); 2367 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr); 2368 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2369 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)]; 2370 InstrItinClass Itinerary = itin; 2371} 2372 2373class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, MSA128B>; 2374class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, MSA128H>; 2375class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, MSA128W>; 2376class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, MSA128D>; 2377 2378class SUBS_S_B_DESC : MSA_3R_DESC_BASE<"subs_s.b", int_mips_subs_s_b, 2379 MSA128BOpnd>; 2380class SUBS_S_H_DESC : MSA_3R_DESC_BASE<"subs_s.h", int_mips_subs_s_h, 2381 MSA128HOpnd>; 2382class SUBS_S_W_DESC : MSA_3R_DESC_BASE<"subs_s.w", int_mips_subs_s_w, 2383 MSA128WOpnd>; 2384class SUBS_S_D_DESC : MSA_3R_DESC_BASE<"subs_s.d", int_mips_subs_s_d, 2385 MSA128DOpnd>; 2386 2387class SUBS_U_B_DESC : MSA_3R_DESC_BASE<"subs_u.b", int_mips_subs_u_b, 2388 MSA128BOpnd>; 2389class SUBS_U_H_DESC : MSA_3R_DESC_BASE<"subs_u.h", int_mips_subs_u_h, 2390 MSA128HOpnd>; 2391class SUBS_U_W_DESC : MSA_3R_DESC_BASE<"subs_u.w", int_mips_subs_u_w, 2392 MSA128WOpnd>; 2393class SUBS_U_D_DESC : MSA_3R_DESC_BASE<"subs_u.d", int_mips_subs_u_d, 2394 MSA128DOpnd>; 2395 2396class SUBSUS_U_B_DESC : MSA_3R_DESC_BASE<"subsus_u.b", int_mips_subsus_u_b, 2397 MSA128BOpnd>; 2398class SUBSUS_U_H_DESC : MSA_3R_DESC_BASE<"subsus_u.h", int_mips_subsus_u_h, 2399 MSA128HOpnd>; 2400class SUBSUS_U_W_DESC : MSA_3R_DESC_BASE<"subsus_u.w", int_mips_subsus_u_w, 2401 MSA128WOpnd>; 2402class SUBSUS_U_D_DESC : MSA_3R_DESC_BASE<"subsus_u.d", int_mips_subsus_u_d, 2403 MSA128DOpnd>; 2404 2405class SUBSUU_S_B_DESC : MSA_3R_DESC_BASE<"subsuu_s.b", int_mips_subsuu_s_b, 2406 MSA128BOpnd>; 2407class SUBSUU_S_H_DESC : MSA_3R_DESC_BASE<"subsuu_s.h", int_mips_subsuu_s_h, 2408 MSA128HOpnd>; 2409class SUBSUU_S_W_DESC : MSA_3R_DESC_BASE<"subsuu_s.w", int_mips_subsuu_s_w, 2410 MSA128WOpnd>; 2411class SUBSUU_S_D_DESC : MSA_3R_DESC_BASE<"subsuu_s.d", int_mips_subsuu_s_d, 2412 MSA128DOpnd>; 2413 2414class SUBV_B_DESC : MSA_3R_DESC_BASE<"subv.b", sub, MSA128BOpnd>; 2415class SUBV_H_DESC : MSA_3R_DESC_BASE<"subv.h", sub, MSA128HOpnd>; 2416class SUBV_W_DESC : MSA_3R_DESC_BASE<"subv.w", sub, MSA128WOpnd>; 2417class SUBV_D_DESC : MSA_3R_DESC_BASE<"subv.d", sub, MSA128DOpnd>; 2418 2419class SUBVI_B_DESC : MSA_I5_DESC_BASE<"subvi.b", sub, vsplati8_uimm5, 2420 MSA128BOpnd>; 2421class SUBVI_H_DESC : MSA_I5_DESC_BASE<"subvi.h", sub, vsplati16_uimm5, 2422 MSA128HOpnd>; 2423class SUBVI_W_DESC : MSA_I5_DESC_BASE<"subvi.w", sub, vsplati32_uimm5, 2424 MSA128WOpnd>; 2425class SUBVI_D_DESC : MSA_I5_DESC_BASE<"subvi.d", sub, vsplati64_uimm5, 2426 MSA128DOpnd>; 2427 2428class VSHF_B_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.b", MSA128BOpnd>; 2429class VSHF_H_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.h", MSA128HOpnd>; 2430class VSHF_W_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.w", MSA128WOpnd>; 2431class VSHF_D_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.d", MSA128DOpnd>; 2432 2433class XOR_V_DESC : MSA_VEC_DESC_BASE<"xor.v", xor, MSA128BOpnd>; 2434class XOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128HOpnd>; 2435class XOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128WOpnd>; 2436class XOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128DOpnd>; 2437 2438class XORI_B_DESC : MSA_I8_DESC_BASE<"xori.b", xor, vsplati8_uimm8, 2439 MSA128BOpnd>; 2440 2441// Instruction defs. 2442def ADD_A_B : ADD_A_B_ENC, ADD_A_B_DESC; 2443def ADD_A_H : ADD_A_H_ENC, ADD_A_H_DESC; 2444def ADD_A_W : ADD_A_W_ENC, ADD_A_W_DESC; 2445def ADD_A_D : ADD_A_D_ENC, ADD_A_D_DESC; 2446 2447def ADDS_A_B : ADDS_A_B_ENC, ADDS_A_B_DESC; 2448def ADDS_A_H : ADDS_A_H_ENC, ADDS_A_H_DESC; 2449def ADDS_A_W : ADDS_A_W_ENC, ADDS_A_W_DESC; 2450def ADDS_A_D : ADDS_A_D_ENC, ADDS_A_D_DESC; 2451 2452def ADDS_S_B : ADDS_S_B_ENC, ADDS_S_B_DESC; 2453def ADDS_S_H : ADDS_S_H_ENC, ADDS_S_H_DESC; 2454def ADDS_S_W : ADDS_S_W_ENC, ADDS_S_W_DESC; 2455def ADDS_S_D : ADDS_S_D_ENC, ADDS_S_D_DESC; 2456 2457def ADDS_U_B : ADDS_U_B_ENC, ADDS_U_B_DESC; 2458def ADDS_U_H : ADDS_U_H_ENC, ADDS_U_H_DESC; 2459def ADDS_U_W : ADDS_U_W_ENC, ADDS_U_W_DESC; 2460def ADDS_U_D : ADDS_U_D_ENC, ADDS_U_D_DESC; 2461 2462def ADDV_B : ADDV_B_ENC, ADDV_B_DESC; 2463def ADDV_H : ADDV_H_ENC, ADDV_H_DESC; 2464def ADDV_W : ADDV_W_ENC, ADDV_W_DESC; 2465def ADDV_D : ADDV_D_ENC, ADDV_D_DESC; 2466 2467def ADDVI_B : ADDVI_B_ENC, ADDVI_B_DESC; 2468def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC; 2469def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC; 2470def ADDVI_D : ADDVI_D_ENC, ADDVI_D_DESC; 2471 2472def AND_V : AND_V_ENC, AND_V_DESC; 2473def AND_V_H_PSEUDO : AND_V_H_PSEUDO_DESC, 2474 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd, 2475 MSA128BOpnd:$ws, 2476 MSA128BOpnd:$wt)>; 2477def AND_V_W_PSEUDO : AND_V_W_PSEUDO_DESC, 2478 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd, 2479 MSA128BOpnd:$ws, 2480 MSA128BOpnd:$wt)>; 2481def AND_V_D_PSEUDO : AND_V_D_PSEUDO_DESC, 2482 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd, 2483 MSA128BOpnd:$ws, 2484 MSA128BOpnd:$wt)>; 2485 2486def ANDI_B : ANDI_B_ENC, ANDI_B_DESC; 2487 2488def ASUB_S_B : ASUB_S_B_ENC, ASUB_S_B_DESC; 2489def ASUB_S_H : ASUB_S_H_ENC, ASUB_S_H_DESC; 2490def ASUB_S_W : ASUB_S_W_ENC, ASUB_S_W_DESC; 2491def ASUB_S_D : ASUB_S_D_ENC, ASUB_S_D_DESC; 2492 2493def ASUB_U_B : ASUB_U_B_ENC, ASUB_U_B_DESC; 2494def ASUB_U_H : ASUB_U_H_ENC, ASUB_U_H_DESC; 2495def ASUB_U_W : ASUB_U_W_ENC, ASUB_U_W_DESC; 2496def ASUB_U_D : ASUB_U_D_ENC, ASUB_U_D_DESC; 2497 2498def AVE_S_B : AVE_S_B_ENC, AVE_S_B_DESC; 2499def AVE_S_H : AVE_S_H_ENC, AVE_S_H_DESC; 2500def AVE_S_W : AVE_S_W_ENC, AVE_S_W_DESC; 2501def AVE_S_D : AVE_S_D_ENC, AVE_S_D_DESC; 2502 2503def AVE_U_B : AVE_U_B_ENC, AVE_U_B_DESC; 2504def AVE_U_H : AVE_U_H_ENC, AVE_U_H_DESC; 2505def AVE_U_W : AVE_U_W_ENC, AVE_U_W_DESC; 2506def AVE_U_D : AVE_U_D_ENC, AVE_U_D_DESC; 2507 2508def AVER_S_B : AVER_S_B_ENC, AVER_S_B_DESC; 2509def AVER_S_H : AVER_S_H_ENC, AVER_S_H_DESC; 2510def AVER_S_W : AVER_S_W_ENC, AVER_S_W_DESC; 2511def AVER_S_D : AVER_S_D_ENC, AVER_S_D_DESC; 2512 2513def AVER_U_B : AVER_U_B_ENC, AVER_U_B_DESC; 2514def AVER_U_H : AVER_U_H_ENC, AVER_U_H_DESC; 2515def AVER_U_W : AVER_U_W_ENC, AVER_U_W_DESC; 2516def AVER_U_D : AVER_U_D_ENC, AVER_U_D_DESC; 2517 2518def BCLR_B : BCLR_B_ENC, BCLR_B_DESC; 2519def BCLR_H : BCLR_H_ENC, BCLR_H_DESC; 2520def BCLR_W : BCLR_W_ENC, BCLR_W_DESC; 2521def BCLR_D : BCLR_D_ENC, BCLR_D_DESC; 2522 2523def BCLRI_B : BCLRI_B_ENC, BCLRI_B_DESC; 2524def BCLRI_H : BCLRI_H_ENC, BCLRI_H_DESC; 2525def BCLRI_W : BCLRI_W_ENC, BCLRI_W_DESC; 2526def BCLRI_D : BCLRI_D_ENC, BCLRI_D_DESC; 2527 2528def BINSL_B : BINSL_B_ENC, BINSL_B_DESC; 2529def BINSL_H : BINSL_H_ENC, BINSL_H_DESC; 2530def BINSL_W : BINSL_W_ENC, BINSL_W_DESC; 2531def BINSL_D : BINSL_D_ENC, BINSL_D_DESC; 2532 2533def BINSLI_B : BINSLI_B_ENC, BINSLI_B_DESC; 2534def BINSLI_H : BINSLI_H_ENC, BINSLI_H_DESC; 2535def BINSLI_W : BINSLI_W_ENC, BINSLI_W_DESC; 2536def BINSLI_D : BINSLI_D_ENC, BINSLI_D_DESC; 2537 2538def BINSR_B : BINSR_B_ENC, BINSR_B_DESC; 2539def BINSR_H : BINSR_H_ENC, BINSR_H_DESC; 2540def BINSR_W : BINSR_W_ENC, BINSR_W_DESC; 2541def BINSR_D : BINSR_D_ENC, BINSR_D_DESC; 2542 2543def BINSRI_B : BINSRI_B_ENC, BINSRI_B_DESC; 2544def BINSRI_H : BINSRI_H_ENC, BINSRI_H_DESC; 2545def BINSRI_W : BINSRI_W_ENC, BINSRI_W_DESC; 2546def BINSRI_D : BINSRI_D_ENC, BINSRI_D_DESC; 2547 2548def BMNZ_V : BMNZ_V_ENC, BMNZ_V_DESC; 2549 2550def BMNZI_B : BMNZI_B_ENC, BMNZI_B_DESC; 2551 2552def BMZ_V : BMZ_V_ENC, BMZ_V_DESC; 2553 2554def BMZI_B : BMZI_B_ENC, BMZI_B_DESC; 2555 2556def BNEG_B : BNEG_B_ENC, BNEG_B_DESC; 2557def BNEG_H : BNEG_H_ENC, BNEG_H_DESC; 2558def BNEG_W : BNEG_W_ENC, BNEG_W_DESC; 2559def BNEG_D : BNEG_D_ENC, BNEG_D_DESC; 2560 2561def BNEGI_B : BNEGI_B_ENC, BNEGI_B_DESC; 2562def BNEGI_H : BNEGI_H_ENC, BNEGI_H_DESC; 2563def BNEGI_W : BNEGI_W_ENC, BNEGI_W_DESC; 2564def BNEGI_D : BNEGI_D_ENC, BNEGI_D_DESC; 2565 2566def BNZ_B : BNZ_B_ENC, BNZ_B_DESC; 2567def BNZ_H : BNZ_H_ENC, BNZ_H_DESC; 2568def BNZ_W : BNZ_W_ENC, BNZ_W_DESC; 2569def BNZ_D : BNZ_D_ENC, BNZ_D_DESC; 2570 2571def BNZ_V : BNZ_V_ENC, BNZ_V_DESC; 2572 2573def BSEL_V : BSEL_V_ENC, BSEL_V_DESC; 2574 2575class MSA_BSEL_PSEUDO_BASE<RegisterOperand RO, ValueType Ty> : 2576 MipsPseudo<(outs RO:$wd), (ins RO:$wd_in, RO:$ws, RO:$wt), 2577 [(set RO:$wd, (Ty (vselect RO:$wd_in, RO:$ws, RO:$wt)))]>, 2578 PseudoInstExpansion<(BSEL_V MSA128BOpnd:$wd, MSA128BOpnd:$wd_in, 2579 MSA128BOpnd:$ws, MSA128BOpnd:$wt)> { 2580 let Constraints = "$wd_in = $wd"; 2581} 2582 2583def BSEL_H_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128HOpnd, v8i16>; 2584def BSEL_W_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128WOpnd, v4i32>; 2585def BSEL_D_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128DOpnd, v2i64>; 2586def BSEL_FW_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128WOpnd, v4f32>; 2587def BSEL_FD_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128DOpnd, v2f64>; 2588 2589def BSELI_B : BSELI_B_ENC, BSELI_B_DESC; 2590 2591def BSET_B : BSET_B_ENC, BSET_B_DESC; 2592def BSET_H : BSET_H_ENC, BSET_H_DESC; 2593def BSET_W : BSET_W_ENC, BSET_W_DESC; 2594def BSET_D : BSET_D_ENC, BSET_D_DESC; 2595 2596def BSETI_B : BSETI_B_ENC, BSETI_B_DESC; 2597def BSETI_H : BSETI_H_ENC, BSETI_H_DESC; 2598def BSETI_W : BSETI_W_ENC, BSETI_W_DESC; 2599def BSETI_D : BSETI_D_ENC, BSETI_D_DESC; 2600 2601def BZ_B : BZ_B_ENC, BZ_B_DESC; 2602def BZ_H : BZ_H_ENC, BZ_H_DESC; 2603def BZ_W : BZ_W_ENC, BZ_W_DESC; 2604def BZ_D : BZ_D_ENC, BZ_D_DESC; 2605 2606def BZ_V : BZ_V_ENC, BZ_V_DESC; 2607 2608def CEQ_B : CEQ_B_ENC, CEQ_B_DESC; 2609def CEQ_H : CEQ_H_ENC, CEQ_H_DESC; 2610def CEQ_W : CEQ_W_ENC, CEQ_W_DESC; 2611def CEQ_D : CEQ_D_ENC, CEQ_D_DESC; 2612 2613def CEQI_B : CEQI_B_ENC, CEQI_B_DESC; 2614def CEQI_H : CEQI_H_ENC, CEQI_H_DESC; 2615def CEQI_W : CEQI_W_ENC, CEQI_W_DESC; 2616def CEQI_D : CEQI_D_ENC, CEQI_D_DESC; 2617 2618def CFCMSA : CFCMSA_ENC, CFCMSA_DESC; 2619 2620def CLE_S_B : CLE_S_B_ENC, CLE_S_B_DESC; 2621def CLE_S_H : CLE_S_H_ENC, CLE_S_H_DESC; 2622def CLE_S_W : CLE_S_W_ENC, CLE_S_W_DESC; 2623def CLE_S_D : CLE_S_D_ENC, CLE_S_D_DESC; 2624 2625def CLE_U_B : CLE_U_B_ENC, CLE_U_B_DESC; 2626def CLE_U_H : CLE_U_H_ENC, CLE_U_H_DESC; 2627def CLE_U_W : CLE_U_W_ENC, CLE_U_W_DESC; 2628def CLE_U_D : CLE_U_D_ENC, CLE_U_D_DESC; 2629 2630def CLEI_S_B : CLEI_S_B_ENC, CLEI_S_B_DESC; 2631def CLEI_S_H : CLEI_S_H_ENC, CLEI_S_H_DESC; 2632def CLEI_S_W : CLEI_S_W_ENC, CLEI_S_W_DESC; 2633def CLEI_S_D : CLEI_S_D_ENC, CLEI_S_D_DESC; 2634 2635def CLEI_U_B : CLEI_U_B_ENC, CLEI_U_B_DESC; 2636def CLEI_U_H : CLEI_U_H_ENC, CLEI_U_H_DESC; 2637def CLEI_U_W : CLEI_U_W_ENC, CLEI_U_W_DESC; 2638def CLEI_U_D : CLEI_U_D_ENC, CLEI_U_D_DESC; 2639 2640def CLT_S_B : CLT_S_B_ENC, CLT_S_B_DESC; 2641def CLT_S_H : CLT_S_H_ENC, CLT_S_H_DESC; 2642def CLT_S_W : CLT_S_W_ENC, CLT_S_W_DESC; 2643def CLT_S_D : CLT_S_D_ENC, CLT_S_D_DESC; 2644 2645def CLT_U_B : CLT_U_B_ENC, CLT_U_B_DESC; 2646def CLT_U_H : CLT_U_H_ENC, CLT_U_H_DESC; 2647def CLT_U_W : CLT_U_W_ENC, CLT_U_W_DESC; 2648def CLT_U_D : CLT_U_D_ENC, CLT_U_D_DESC; 2649 2650def CLTI_S_B : CLTI_S_B_ENC, CLTI_S_B_DESC; 2651def CLTI_S_H : CLTI_S_H_ENC, CLTI_S_H_DESC; 2652def CLTI_S_W : CLTI_S_W_ENC, CLTI_S_W_DESC; 2653def CLTI_S_D : CLTI_S_D_ENC, CLTI_S_D_DESC; 2654 2655def CLTI_U_B : CLTI_U_B_ENC, CLTI_U_B_DESC; 2656def CLTI_U_H : CLTI_U_H_ENC, CLTI_U_H_DESC; 2657def CLTI_U_W : CLTI_U_W_ENC, CLTI_U_W_DESC; 2658def CLTI_U_D : CLTI_U_D_ENC, CLTI_U_D_DESC; 2659 2660def COPY_S_B : COPY_S_B_ENC, COPY_S_B_DESC; 2661def COPY_S_H : COPY_S_H_ENC, COPY_S_H_DESC; 2662def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC; 2663 2664def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC; 2665def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC; 2666def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC; 2667 2668def COPY_FW_PSEUDO : COPY_FW_PSEUDO_DESC; 2669def COPY_FD_PSEUDO : COPY_FD_PSEUDO_DESC; 2670 2671def CTCMSA : CTCMSA_ENC, CTCMSA_DESC; 2672 2673def DIV_S_B : DIV_S_B_ENC, DIV_S_B_DESC; 2674def DIV_S_H : DIV_S_H_ENC, DIV_S_H_DESC; 2675def DIV_S_W : DIV_S_W_ENC, DIV_S_W_DESC; 2676def DIV_S_D : DIV_S_D_ENC, DIV_S_D_DESC; 2677 2678def DIV_U_B : DIV_U_B_ENC, DIV_U_B_DESC; 2679def DIV_U_H : DIV_U_H_ENC, DIV_U_H_DESC; 2680def DIV_U_W : DIV_U_W_ENC, DIV_U_W_DESC; 2681def DIV_U_D : DIV_U_D_ENC, DIV_U_D_DESC; 2682 2683def DOTP_S_H : DOTP_S_H_ENC, DOTP_S_H_DESC; 2684def DOTP_S_W : DOTP_S_W_ENC, DOTP_S_W_DESC; 2685def DOTP_S_D : DOTP_S_D_ENC, DOTP_S_D_DESC; 2686 2687def DOTP_U_H : DOTP_U_H_ENC, DOTP_U_H_DESC; 2688def DOTP_U_W : DOTP_U_W_ENC, DOTP_U_W_DESC; 2689def DOTP_U_D : DOTP_U_D_ENC, DOTP_U_D_DESC; 2690 2691def DPADD_S_H : DPADD_S_H_ENC, DPADD_S_H_DESC; 2692def DPADD_S_W : DPADD_S_W_ENC, DPADD_S_W_DESC; 2693def DPADD_S_D : DPADD_S_D_ENC, DPADD_S_D_DESC; 2694 2695def DPADD_U_H : DPADD_U_H_ENC, DPADD_U_H_DESC; 2696def DPADD_U_W : DPADD_U_W_ENC, DPADD_U_W_DESC; 2697def DPADD_U_D : DPADD_U_D_ENC, DPADD_U_D_DESC; 2698 2699def DPSUB_S_H : DPSUB_S_H_ENC, DPSUB_S_H_DESC; 2700def DPSUB_S_W : DPSUB_S_W_ENC, DPSUB_S_W_DESC; 2701def DPSUB_S_D : DPSUB_S_D_ENC, DPSUB_S_D_DESC; 2702 2703def DPSUB_U_H : DPSUB_U_H_ENC, DPSUB_U_H_DESC; 2704def DPSUB_U_W : DPSUB_U_W_ENC, DPSUB_U_W_DESC; 2705def DPSUB_U_D : DPSUB_U_D_ENC, DPSUB_U_D_DESC; 2706 2707def FADD_W : FADD_W_ENC, FADD_W_DESC; 2708def FADD_D : FADD_D_ENC, FADD_D_DESC; 2709 2710def FCAF_W : FCAF_W_ENC, FCAF_W_DESC; 2711def FCAF_D : FCAF_D_ENC, FCAF_D_DESC; 2712 2713def FCEQ_W : FCEQ_W_ENC, FCEQ_W_DESC; 2714def FCEQ_D : FCEQ_D_ENC, FCEQ_D_DESC; 2715 2716def FCLE_W : FCLE_W_ENC, FCLE_W_DESC; 2717def FCLE_D : FCLE_D_ENC, FCLE_D_DESC; 2718 2719def FCLT_W : FCLT_W_ENC, FCLT_W_DESC; 2720def FCLT_D : FCLT_D_ENC, FCLT_D_DESC; 2721 2722def FCLASS_W : FCLASS_W_ENC, FCLASS_W_DESC; 2723def FCLASS_D : FCLASS_D_ENC, FCLASS_D_DESC; 2724 2725def FCNE_W : FCNE_W_ENC, FCNE_W_DESC; 2726def FCNE_D : FCNE_D_ENC, FCNE_D_DESC; 2727 2728def FCOR_W : FCOR_W_ENC, FCOR_W_DESC; 2729def FCOR_D : FCOR_D_ENC, FCOR_D_DESC; 2730 2731def FCUEQ_W : FCUEQ_W_ENC, FCUEQ_W_DESC; 2732def FCUEQ_D : FCUEQ_D_ENC, FCUEQ_D_DESC; 2733 2734def FCULE_W : FCULE_W_ENC, FCULE_W_DESC; 2735def FCULE_D : FCULE_D_ENC, FCULE_D_DESC; 2736 2737def FCULT_W : FCULT_W_ENC, FCULT_W_DESC; 2738def FCULT_D : FCULT_D_ENC, FCULT_D_DESC; 2739 2740def FCUN_W : FCUN_W_ENC, FCUN_W_DESC; 2741def FCUN_D : FCUN_D_ENC, FCUN_D_DESC; 2742 2743def FCUNE_W : FCUNE_W_ENC, FCUNE_W_DESC; 2744def FCUNE_D : FCUNE_D_ENC, FCUNE_D_DESC; 2745 2746def FDIV_W : FDIV_W_ENC, FDIV_W_DESC; 2747def FDIV_D : FDIV_D_ENC, FDIV_D_DESC; 2748 2749def FEXDO_H : FEXDO_H_ENC, FEXDO_H_DESC; 2750def FEXDO_W : FEXDO_W_ENC, FEXDO_W_DESC; 2751 2752def FEXP2_W : FEXP2_W_ENC, FEXP2_W_DESC; 2753def FEXP2_D : FEXP2_D_ENC, FEXP2_D_DESC; 2754 2755def FEXUPL_W : FEXUPL_W_ENC, FEXUPL_W_DESC; 2756def FEXUPL_D : FEXUPL_D_ENC, FEXUPL_D_DESC; 2757 2758def FEXUPR_W : FEXUPR_W_ENC, FEXUPR_W_DESC; 2759def FEXUPR_D : FEXUPR_D_ENC, FEXUPR_D_DESC; 2760 2761def FFINT_S_W : FFINT_S_W_ENC, FFINT_S_W_DESC; 2762def FFINT_S_D : FFINT_S_D_ENC, FFINT_S_D_DESC; 2763 2764def FFINT_U_W : FFINT_U_W_ENC, FFINT_U_W_DESC; 2765def FFINT_U_D : FFINT_U_D_ENC, FFINT_U_D_DESC; 2766 2767def FFQL_W : FFQL_W_ENC, FFQL_W_DESC; 2768def FFQL_D : FFQL_D_ENC, FFQL_D_DESC; 2769 2770def FFQR_W : FFQR_W_ENC, FFQR_W_DESC; 2771def FFQR_D : FFQR_D_ENC, FFQR_D_DESC; 2772 2773def FILL_B : FILL_B_ENC, FILL_B_DESC; 2774def FILL_H : FILL_H_ENC, FILL_H_DESC; 2775def FILL_W : FILL_W_ENC, FILL_W_DESC; 2776def FILL_FW_PSEUDO : FILL_FW_PSEUDO_DESC; 2777def FILL_FD_PSEUDO : FILL_FD_PSEUDO_DESC; 2778 2779def FLOG2_W : FLOG2_W_ENC, FLOG2_W_DESC; 2780def FLOG2_D : FLOG2_D_ENC, FLOG2_D_DESC; 2781 2782def FMADD_W : FMADD_W_ENC, FMADD_W_DESC; 2783def FMADD_D : FMADD_D_ENC, FMADD_D_DESC; 2784 2785def FMAX_W : FMAX_W_ENC, FMAX_W_DESC; 2786def FMAX_D : FMAX_D_ENC, FMAX_D_DESC; 2787 2788def FMAX_A_W : FMAX_A_W_ENC, FMAX_A_W_DESC; 2789def FMAX_A_D : FMAX_A_D_ENC, FMAX_A_D_DESC; 2790 2791def FMIN_W : FMIN_W_ENC, FMIN_W_DESC; 2792def FMIN_D : FMIN_D_ENC, FMIN_D_DESC; 2793 2794def FMIN_A_W : FMIN_A_W_ENC, FMIN_A_W_DESC; 2795def FMIN_A_D : FMIN_A_D_ENC, FMIN_A_D_DESC; 2796 2797def FMSUB_W : FMSUB_W_ENC, FMSUB_W_DESC; 2798def FMSUB_D : FMSUB_D_ENC, FMSUB_D_DESC; 2799 2800def FMUL_W : FMUL_W_ENC, FMUL_W_DESC; 2801def FMUL_D : FMUL_D_ENC, FMUL_D_DESC; 2802 2803def FRINT_W : FRINT_W_ENC, FRINT_W_DESC; 2804def FRINT_D : FRINT_D_ENC, FRINT_D_DESC; 2805 2806def FRCP_W : FRCP_W_ENC, FRCP_W_DESC; 2807def FRCP_D : FRCP_D_ENC, FRCP_D_DESC; 2808 2809def FRSQRT_W : FRSQRT_W_ENC, FRSQRT_W_DESC; 2810def FRSQRT_D : FRSQRT_D_ENC, FRSQRT_D_DESC; 2811 2812def FSAF_W : FSAF_W_ENC, FSAF_W_DESC; 2813def FSAF_D : FSAF_D_ENC, FSAF_D_DESC; 2814 2815def FSEQ_W : FSEQ_W_ENC, FSEQ_W_DESC; 2816def FSEQ_D : FSEQ_D_ENC, FSEQ_D_DESC; 2817 2818def FSLE_W : FSLE_W_ENC, FSLE_W_DESC; 2819def FSLE_D : FSLE_D_ENC, FSLE_D_DESC; 2820 2821def FSLT_W : FSLT_W_ENC, FSLT_W_DESC; 2822def FSLT_D : FSLT_D_ENC, FSLT_D_DESC; 2823 2824def FSNE_W : FSNE_W_ENC, FSNE_W_DESC; 2825def FSNE_D : FSNE_D_ENC, FSNE_D_DESC; 2826 2827def FSOR_W : FSOR_W_ENC, FSOR_W_DESC; 2828def FSOR_D : FSOR_D_ENC, FSOR_D_DESC; 2829 2830def FSQRT_W : FSQRT_W_ENC, FSQRT_W_DESC; 2831def FSQRT_D : FSQRT_D_ENC, FSQRT_D_DESC; 2832 2833def FSUB_W : FSUB_W_ENC, FSUB_W_DESC; 2834def FSUB_D : FSUB_D_ENC, FSUB_D_DESC; 2835 2836def FSUEQ_W : FSUEQ_W_ENC, FSUEQ_W_DESC; 2837def FSUEQ_D : FSUEQ_D_ENC, FSUEQ_D_DESC; 2838 2839def FSULE_W : FSULE_W_ENC, FSULE_W_DESC; 2840def FSULE_D : FSULE_D_ENC, FSULE_D_DESC; 2841 2842def FSULT_W : FSULT_W_ENC, FSULT_W_DESC; 2843def FSULT_D : FSULT_D_ENC, FSULT_D_DESC; 2844 2845def FSUN_W : FSUN_W_ENC, FSUN_W_DESC; 2846def FSUN_D : FSUN_D_ENC, FSUN_D_DESC; 2847 2848def FSUNE_W : FSUNE_W_ENC, FSUNE_W_DESC; 2849def FSUNE_D : FSUNE_D_ENC, FSUNE_D_DESC; 2850 2851def FTINT_S_W : FTINT_S_W_ENC, FTINT_S_W_DESC; 2852def FTINT_S_D : FTINT_S_D_ENC, FTINT_S_D_DESC; 2853 2854def FTINT_U_W : FTINT_U_W_ENC, FTINT_U_W_DESC; 2855def FTINT_U_D : FTINT_U_D_ENC, FTINT_U_D_DESC; 2856 2857def FTQ_H : FTQ_H_ENC, FTQ_H_DESC; 2858def FTQ_W : FTQ_W_ENC, FTQ_W_DESC; 2859 2860def FTRUNC_S_W : FTRUNC_S_W_ENC, FTRUNC_S_W_DESC; 2861def FTRUNC_S_D : FTRUNC_S_D_ENC, FTRUNC_S_D_DESC; 2862 2863def FTRUNC_U_W : FTRUNC_U_W_ENC, FTRUNC_U_W_DESC; 2864def FTRUNC_U_D : FTRUNC_U_D_ENC, FTRUNC_U_D_DESC; 2865 2866def HADD_S_H : HADD_S_H_ENC, HADD_S_H_DESC; 2867def HADD_S_W : HADD_S_W_ENC, HADD_S_W_DESC; 2868def HADD_S_D : HADD_S_D_ENC, HADD_S_D_DESC; 2869 2870def HADD_U_H : HADD_U_H_ENC, HADD_U_H_DESC; 2871def HADD_U_W : HADD_U_W_ENC, HADD_U_W_DESC; 2872def HADD_U_D : HADD_U_D_ENC, HADD_U_D_DESC; 2873 2874def HSUB_S_H : HSUB_S_H_ENC, HSUB_S_H_DESC; 2875def HSUB_S_W : HSUB_S_W_ENC, HSUB_S_W_DESC; 2876def HSUB_S_D : HSUB_S_D_ENC, HSUB_S_D_DESC; 2877 2878def HSUB_U_H : HSUB_U_H_ENC, HSUB_U_H_DESC; 2879def HSUB_U_W : HSUB_U_W_ENC, HSUB_U_W_DESC; 2880def HSUB_U_D : HSUB_U_D_ENC, HSUB_U_D_DESC; 2881 2882def ILVEV_B : ILVEV_B_ENC, ILVEV_B_DESC; 2883def ILVEV_H : ILVEV_H_ENC, ILVEV_H_DESC; 2884def ILVEV_W : ILVEV_W_ENC, ILVEV_W_DESC; 2885def ILVEV_D : ILVEV_D_ENC, ILVEV_D_DESC; 2886 2887def ILVL_B : ILVL_B_ENC, ILVL_B_DESC; 2888def ILVL_H : ILVL_H_ENC, ILVL_H_DESC; 2889def ILVL_W : ILVL_W_ENC, ILVL_W_DESC; 2890def ILVL_D : ILVL_D_ENC, ILVL_D_DESC; 2891 2892def ILVOD_B : ILVOD_B_ENC, ILVOD_B_DESC; 2893def ILVOD_H : ILVOD_H_ENC, ILVOD_H_DESC; 2894def ILVOD_W : ILVOD_W_ENC, ILVOD_W_DESC; 2895def ILVOD_D : ILVOD_D_ENC, ILVOD_D_DESC; 2896 2897def ILVR_B : ILVR_B_ENC, ILVR_B_DESC; 2898def ILVR_H : ILVR_H_ENC, ILVR_H_DESC; 2899def ILVR_W : ILVR_W_ENC, ILVR_W_DESC; 2900def ILVR_D : ILVR_D_ENC, ILVR_D_DESC; 2901 2902def INSERT_B : INSERT_B_ENC, INSERT_B_DESC; 2903def INSERT_H : INSERT_H_ENC, INSERT_H_DESC; 2904def INSERT_W : INSERT_W_ENC, INSERT_W_DESC; 2905 2906// INSERT_FW_PSEUDO defined after INSVE_W 2907// INSERT_FD_PSEUDO defined after INSVE_D 2908 2909def INSVE_B : INSVE_B_ENC, INSVE_B_DESC; 2910def INSVE_H : INSVE_H_ENC, INSVE_H_DESC; 2911def INSVE_W : INSVE_W_ENC, INSVE_W_DESC; 2912def INSVE_D : INSVE_D_ENC, INSVE_D_DESC; 2913 2914def INSERT_FW_PSEUDO : INSERT_FW_PSEUDO_DESC; 2915def INSERT_FD_PSEUDO : INSERT_FD_PSEUDO_DESC; 2916 2917def LD_B: LD_B_ENC, LD_B_DESC; 2918def LD_H: LD_H_ENC, LD_H_DESC; 2919def LD_W: LD_W_ENC, LD_W_DESC; 2920def LD_D: LD_D_ENC, LD_D_DESC; 2921 2922def LDI_B : LDI_B_ENC, LDI_B_DESC; 2923def LDI_H : LDI_H_ENC, LDI_H_DESC; 2924def LDI_W : LDI_W_ENC, LDI_W_DESC; 2925def LDI_D : LDI_D_ENC, LDI_D_DESC; 2926 2927def LSA : LSA_ENC, LSA_DESC; 2928 2929def MADD_Q_H : MADD_Q_H_ENC, MADD_Q_H_DESC; 2930def MADD_Q_W : MADD_Q_W_ENC, MADD_Q_W_DESC; 2931 2932def MADDR_Q_H : MADDR_Q_H_ENC, MADDR_Q_H_DESC; 2933def MADDR_Q_W : MADDR_Q_W_ENC, MADDR_Q_W_DESC; 2934 2935def MADDV_B : MADDV_B_ENC, MADDV_B_DESC; 2936def MADDV_H : MADDV_H_ENC, MADDV_H_DESC; 2937def MADDV_W : MADDV_W_ENC, MADDV_W_DESC; 2938def MADDV_D : MADDV_D_ENC, MADDV_D_DESC; 2939 2940def MAX_A_B : MAX_A_B_ENC, MAX_A_B_DESC; 2941def MAX_A_H : MAX_A_H_ENC, MAX_A_H_DESC; 2942def MAX_A_W : MAX_A_W_ENC, MAX_A_W_DESC; 2943def MAX_A_D : MAX_A_D_ENC, MAX_A_D_DESC; 2944 2945def MAX_S_B : MAX_S_B_ENC, MAX_S_B_DESC; 2946def MAX_S_H : MAX_S_H_ENC, MAX_S_H_DESC; 2947def MAX_S_W : MAX_S_W_ENC, MAX_S_W_DESC; 2948def MAX_S_D : MAX_S_D_ENC, MAX_S_D_DESC; 2949 2950def MAX_U_B : MAX_U_B_ENC, MAX_U_B_DESC; 2951def MAX_U_H : MAX_U_H_ENC, MAX_U_H_DESC; 2952def MAX_U_W : MAX_U_W_ENC, MAX_U_W_DESC; 2953def MAX_U_D : MAX_U_D_ENC, MAX_U_D_DESC; 2954 2955def MAXI_S_B : MAXI_S_B_ENC, MAXI_S_B_DESC; 2956def MAXI_S_H : MAXI_S_H_ENC, MAXI_S_H_DESC; 2957def MAXI_S_W : MAXI_S_W_ENC, MAXI_S_W_DESC; 2958def MAXI_S_D : MAXI_S_D_ENC, MAXI_S_D_DESC; 2959 2960def MAXI_U_B : MAXI_U_B_ENC, MAXI_U_B_DESC; 2961def MAXI_U_H : MAXI_U_H_ENC, MAXI_U_H_DESC; 2962def MAXI_U_W : MAXI_U_W_ENC, MAXI_U_W_DESC; 2963def MAXI_U_D : MAXI_U_D_ENC, MAXI_U_D_DESC; 2964 2965def MIN_A_B : MIN_A_B_ENC, MIN_A_B_DESC; 2966def MIN_A_H : MIN_A_H_ENC, MIN_A_H_DESC; 2967def MIN_A_W : MIN_A_W_ENC, MIN_A_W_DESC; 2968def MIN_A_D : MIN_A_D_ENC, MIN_A_D_DESC; 2969 2970def MIN_S_B : MIN_S_B_ENC, MIN_S_B_DESC; 2971def MIN_S_H : MIN_S_H_ENC, MIN_S_H_DESC; 2972def MIN_S_W : MIN_S_W_ENC, MIN_S_W_DESC; 2973def MIN_S_D : MIN_S_D_ENC, MIN_S_D_DESC; 2974 2975def MIN_U_B : MIN_U_B_ENC, MIN_U_B_DESC; 2976def MIN_U_H : MIN_U_H_ENC, MIN_U_H_DESC; 2977def MIN_U_W : MIN_U_W_ENC, MIN_U_W_DESC; 2978def MIN_U_D : MIN_U_D_ENC, MIN_U_D_DESC; 2979 2980def MINI_S_B : MINI_S_B_ENC, MINI_S_B_DESC; 2981def MINI_S_H : MINI_S_H_ENC, MINI_S_H_DESC; 2982def MINI_S_W : MINI_S_W_ENC, MINI_S_W_DESC; 2983def MINI_S_D : MINI_S_D_ENC, MINI_S_D_DESC; 2984 2985def MINI_U_B : MINI_U_B_ENC, MINI_U_B_DESC; 2986def MINI_U_H : MINI_U_H_ENC, MINI_U_H_DESC; 2987def MINI_U_W : MINI_U_W_ENC, MINI_U_W_DESC; 2988def MINI_U_D : MINI_U_D_ENC, MINI_U_D_DESC; 2989 2990def MOD_S_B : MOD_S_B_ENC, MOD_S_B_DESC; 2991def MOD_S_H : MOD_S_H_ENC, MOD_S_H_DESC; 2992def MOD_S_W : MOD_S_W_ENC, MOD_S_W_DESC; 2993def MOD_S_D : MOD_S_D_ENC, MOD_S_D_DESC; 2994 2995def MOD_U_B : MOD_U_B_ENC, MOD_U_B_DESC; 2996def MOD_U_H : MOD_U_H_ENC, MOD_U_H_DESC; 2997def MOD_U_W : MOD_U_W_ENC, MOD_U_W_DESC; 2998def MOD_U_D : MOD_U_D_ENC, MOD_U_D_DESC; 2999 3000def MOVE_V : MOVE_V_ENC, MOVE_V_DESC; 3001 3002def MSUB_Q_H : MSUB_Q_H_ENC, MSUB_Q_H_DESC; 3003def MSUB_Q_W : MSUB_Q_W_ENC, MSUB_Q_W_DESC; 3004 3005def MSUBR_Q_H : MSUBR_Q_H_ENC, MSUBR_Q_H_DESC; 3006def MSUBR_Q_W : MSUBR_Q_W_ENC, MSUBR_Q_W_DESC; 3007 3008def MSUBV_B : MSUBV_B_ENC, MSUBV_B_DESC; 3009def MSUBV_H : MSUBV_H_ENC, MSUBV_H_DESC; 3010def MSUBV_W : MSUBV_W_ENC, MSUBV_W_DESC; 3011def MSUBV_D : MSUBV_D_ENC, MSUBV_D_DESC; 3012 3013def MUL_Q_H : MUL_Q_H_ENC, MUL_Q_H_DESC; 3014def MUL_Q_W : MUL_Q_W_ENC, MUL_Q_W_DESC; 3015 3016def MULR_Q_H : MULR_Q_H_ENC, MULR_Q_H_DESC; 3017def MULR_Q_W : MULR_Q_W_ENC, MULR_Q_W_DESC; 3018 3019def MULV_B : MULV_B_ENC, MULV_B_DESC; 3020def MULV_H : MULV_H_ENC, MULV_H_DESC; 3021def MULV_W : MULV_W_ENC, MULV_W_DESC; 3022def MULV_D : MULV_D_ENC, MULV_D_DESC; 3023 3024def NLOC_B : NLOC_B_ENC, NLOC_B_DESC; 3025def NLOC_H : NLOC_H_ENC, NLOC_H_DESC; 3026def NLOC_W : NLOC_W_ENC, NLOC_W_DESC; 3027def NLOC_D : NLOC_D_ENC, NLOC_D_DESC; 3028 3029def NLZC_B : NLZC_B_ENC, NLZC_B_DESC; 3030def NLZC_H : NLZC_H_ENC, NLZC_H_DESC; 3031def NLZC_W : NLZC_W_ENC, NLZC_W_DESC; 3032def NLZC_D : NLZC_D_ENC, NLZC_D_DESC; 3033 3034def NOR_V : NOR_V_ENC, NOR_V_DESC; 3035def NOR_V_H_PSEUDO : NOR_V_H_PSEUDO_DESC, 3036 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd, 3037 MSA128BOpnd:$ws, 3038 MSA128BOpnd:$wt)>; 3039def NOR_V_W_PSEUDO : NOR_V_W_PSEUDO_DESC, 3040 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd, 3041 MSA128BOpnd:$ws, 3042 MSA128BOpnd:$wt)>; 3043def NOR_V_D_PSEUDO : NOR_V_D_PSEUDO_DESC, 3044 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd, 3045 MSA128BOpnd:$ws, 3046 MSA128BOpnd:$wt)>; 3047 3048def NORI_B : NORI_B_ENC, NORI_B_DESC; 3049 3050def OR_V : OR_V_ENC, OR_V_DESC; 3051def OR_V_H_PSEUDO : OR_V_H_PSEUDO_DESC, 3052 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd, 3053 MSA128BOpnd:$ws, 3054 MSA128BOpnd:$wt)>; 3055def OR_V_W_PSEUDO : OR_V_W_PSEUDO_DESC, 3056 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd, 3057 MSA128BOpnd:$ws, 3058 MSA128BOpnd:$wt)>; 3059def OR_V_D_PSEUDO : OR_V_D_PSEUDO_DESC, 3060 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd, 3061 MSA128BOpnd:$ws, 3062 MSA128BOpnd:$wt)>; 3063 3064def ORI_B : ORI_B_ENC, ORI_B_DESC; 3065 3066def PCKEV_B : PCKEV_B_ENC, PCKEV_B_DESC; 3067def PCKEV_H : PCKEV_H_ENC, PCKEV_H_DESC; 3068def PCKEV_W : PCKEV_W_ENC, PCKEV_W_DESC; 3069def PCKEV_D : PCKEV_D_ENC, PCKEV_D_DESC; 3070 3071def PCKOD_B : PCKOD_B_ENC, PCKOD_B_DESC; 3072def PCKOD_H : PCKOD_H_ENC, PCKOD_H_DESC; 3073def PCKOD_W : PCKOD_W_ENC, PCKOD_W_DESC; 3074def PCKOD_D : PCKOD_D_ENC, PCKOD_D_DESC; 3075 3076def PCNT_B : PCNT_B_ENC, PCNT_B_DESC; 3077def PCNT_H : PCNT_H_ENC, PCNT_H_DESC; 3078def PCNT_W : PCNT_W_ENC, PCNT_W_DESC; 3079def PCNT_D : PCNT_D_ENC, PCNT_D_DESC; 3080 3081def SAT_S_B : SAT_S_B_ENC, SAT_S_B_DESC; 3082def SAT_S_H : SAT_S_H_ENC, SAT_S_H_DESC; 3083def SAT_S_W : SAT_S_W_ENC, SAT_S_W_DESC; 3084def SAT_S_D : SAT_S_D_ENC, SAT_S_D_DESC; 3085 3086def SAT_U_B : SAT_U_B_ENC, SAT_U_B_DESC; 3087def SAT_U_H : SAT_U_H_ENC, SAT_U_H_DESC; 3088def SAT_U_W : SAT_U_W_ENC, SAT_U_W_DESC; 3089def SAT_U_D : SAT_U_D_ENC, SAT_U_D_DESC; 3090 3091def SHF_B : SHF_B_ENC, SHF_B_DESC; 3092def SHF_H : SHF_H_ENC, SHF_H_DESC; 3093def SHF_W : SHF_W_ENC, SHF_W_DESC; 3094 3095def SLD_B : SLD_B_ENC, SLD_B_DESC; 3096def SLD_H : SLD_H_ENC, SLD_H_DESC; 3097def SLD_W : SLD_W_ENC, SLD_W_DESC; 3098def SLD_D : SLD_D_ENC, SLD_D_DESC; 3099 3100def SLDI_B : SLDI_B_ENC, SLDI_B_DESC; 3101def SLDI_H : SLDI_H_ENC, SLDI_H_DESC; 3102def SLDI_W : SLDI_W_ENC, SLDI_W_DESC; 3103def SLDI_D : SLDI_D_ENC, SLDI_D_DESC; 3104 3105def SLL_B : SLL_B_ENC, SLL_B_DESC; 3106def SLL_H : SLL_H_ENC, SLL_H_DESC; 3107def SLL_W : SLL_W_ENC, SLL_W_DESC; 3108def SLL_D : SLL_D_ENC, SLL_D_DESC; 3109 3110def SLLI_B : SLLI_B_ENC, SLLI_B_DESC; 3111def SLLI_H : SLLI_H_ENC, SLLI_H_DESC; 3112def SLLI_W : SLLI_W_ENC, SLLI_W_DESC; 3113def SLLI_D : SLLI_D_ENC, SLLI_D_DESC; 3114 3115def SPLAT_B : SPLAT_B_ENC, SPLAT_B_DESC; 3116def SPLAT_H : SPLAT_H_ENC, SPLAT_H_DESC; 3117def SPLAT_W : SPLAT_W_ENC, SPLAT_W_DESC; 3118def SPLAT_D : SPLAT_D_ENC, SPLAT_D_DESC; 3119 3120def SPLATI_B : SPLATI_B_ENC, SPLATI_B_DESC; 3121def SPLATI_H : SPLATI_H_ENC, SPLATI_H_DESC; 3122def SPLATI_W : SPLATI_W_ENC, SPLATI_W_DESC; 3123def SPLATI_D : SPLATI_D_ENC, SPLATI_D_DESC; 3124 3125def SRA_B : SRA_B_ENC, SRA_B_DESC; 3126def SRA_H : SRA_H_ENC, SRA_H_DESC; 3127def SRA_W : SRA_W_ENC, SRA_W_DESC; 3128def SRA_D : SRA_D_ENC, SRA_D_DESC; 3129 3130def SRAI_B : SRAI_B_ENC, SRAI_B_DESC; 3131def SRAI_H : SRAI_H_ENC, SRAI_H_DESC; 3132def SRAI_W : SRAI_W_ENC, SRAI_W_DESC; 3133def SRAI_D : SRAI_D_ENC, SRAI_D_DESC; 3134 3135def SRAR_B : SRAR_B_ENC, SRAR_B_DESC; 3136def SRAR_H : SRAR_H_ENC, SRAR_H_DESC; 3137def SRAR_W : SRAR_W_ENC, SRAR_W_DESC; 3138def SRAR_D : SRAR_D_ENC, SRAR_D_DESC; 3139 3140def SRARI_B : SRARI_B_ENC, SRARI_B_DESC; 3141def SRARI_H : SRARI_H_ENC, SRARI_H_DESC; 3142def SRARI_W : SRARI_W_ENC, SRARI_W_DESC; 3143def SRARI_D : SRARI_D_ENC, SRARI_D_DESC; 3144 3145def SRL_B : SRL_B_ENC, SRL_B_DESC; 3146def SRL_H : SRL_H_ENC, SRL_H_DESC; 3147def SRL_W : SRL_W_ENC, SRL_W_DESC; 3148def SRL_D : SRL_D_ENC, SRL_D_DESC; 3149 3150def SRLI_B : SRLI_B_ENC, SRLI_B_DESC; 3151def SRLI_H : SRLI_H_ENC, SRLI_H_DESC; 3152def SRLI_W : SRLI_W_ENC, SRLI_W_DESC; 3153def SRLI_D : SRLI_D_ENC, SRLI_D_DESC; 3154 3155def SRLR_B : SRLR_B_ENC, SRLR_B_DESC; 3156def SRLR_H : SRLR_H_ENC, SRLR_H_DESC; 3157def SRLR_W : SRLR_W_ENC, SRLR_W_DESC; 3158def SRLR_D : SRLR_D_ENC, SRLR_D_DESC; 3159 3160def SRLRI_B : SRLRI_B_ENC, SRLRI_B_DESC; 3161def SRLRI_H : SRLRI_H_ENC, SRLRI_H_DESC; 3162def SRLRI_W : SRLRI_W_ENC, SRLRI_W_DESC; 3163def SRLRI_D : SRLRI_D_ENC, SRLRI_D_DESC; 3164 3165def ST_B: ST_B_ENC, ST_B_DESC; 3166def ST_H: ST_H_ENC, ST_H_DESC; 3167def ST_W: ST_W_ENC, ST_W_DESC; 3168def ST_D: ST_D_ENC, ST_D_DESC; 3169 3170def SUBS_S_B : SUBS_S_B_ENC, SUBS_S_B_DESC; 3171def SUBS_S_H : SUBS_S_H_ENC, SUBS_S_H_DESC; 3172def SUBS_S_W : SUBS_S_W_ENC, SUBS_S_W_DESC; 3173def SUBS_S_D : SUBS_S_D_ENC, SUBS_S_D_DESC; 3174 3175def SUBS_U_B : SUBS_U_B_ENC, SUBS_U_B_DESC; 3176def SUBS_U_H : SUBS_U_H_ENC, SUBS_U_H_DESC; 3177def SUBS_U_W : SUBS_U_W_ENC, SUBS_U_W_DESC; 3178def SUBS_U_D : SUBS_U_D_ENC, SUBS_U_D_DESC; 3179 3180def SUBSUS_U_B : SUBSUS_U_B_ENC, SUBSUS_U_B_DESC; 3181def SUBSUS_U_H : SUBSUS_U_H_ENC, SUBSUS_U_H_DESC; 3182def SUBSUS_U_W : SUBSUS_U_W_ENC, SUBSUS_U_W_DESC; 3183def SUBSUS_U_D : SUBSUS_U_D_ENC, SUBSUS_U_D_DESC; 3184 3185def SUBSUU_S_B : SUBSUU_S_B_ENC, SUBSUU_S_B_DESC; 3186def SUBSUU_S_H : SUBSUU_S_H_ENC, SUBSUU_S_H_DESC; 3187def SUBSUU_S_W : SUBSUU_S_W_ENC, SUBSUU_S_W_DESC; 3188def SUBSUU_S_D : SUBSUU_S_D_ENC, SUBSUU_S_D_DESC; 3189 3190def SUBV_B : SUBV_B_ENC, SUBV_B_DESC; 3191def SUBV_H : SUBV_H_ENC, SUBV_H_DESC; 3192def SUBV_W : SUBV_W_ENC, SUBV_W_DESC; 3193def SUBV_D : SUBV_D_ENC, SUBV_D_DESC; 3194 3195def SUBVI_B : SUBVI_B_ENC, SUBVI_B_DESC; 3196def SUBVI_H : SUBVI_H_ENC, SUBVI_H_DESC; 3197def SUBVI_W : SUBVI_W_ENC, SUBVI_W_DESC; 3198def SUBVI_D : SUBVI_D_ENC, SUBVI_D_DESC; 3199 3200def VSHF_B : VSHF_B_ENC, VSHF_B_DESC; 3201def VSHF_H : VSHF_H_ENC, VSHF_H_DESC; 3202def VSHF_W : VSHF_W_ENC, VSHF_W_DESC; 3203def VSHF_D : VSHF_D_ENC, VSHF_D_DESC; 3204 3205def XOR_V : XOR_V_ENC, XOR_V_DESC; 3206def XOR_V_H_PSEUDO : XOR_V_H_PSEUDO_DESC, 3207 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd, 3208 MSA128BOpnd:$ws, 3209 MSA128BOpnd:$wt)>; 3210def XOR_V_W_PSEUDO : XOR_V_W_PSEUDO_DESC, 3211 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd, 3212 MSA128BOpnd:$ws, 3213 MSA128BOpnd:$wt)>; 3214def XOR_V_D_PSEUDO : XOR_V_D_PSEUDO_DESC, 3215 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd, 3216 MSA128BOpnd:$ws, 3217 MSA128BOpnd:$wt)>; 3218 3219def XORI_B : XORI_B_ENC, XORI_B_DESC; 3220 3221// Patterns. 3222class MSAPat<dag pattern, dag result, list<Predicate> pred = [HasMSA]> : 3223 Pat<pattern, result>, Requires<pred>; 3224 3225def : MSAPat<(extractelt (v4i32 MSA128W:$ws), immZExt4:$idx), 3226 (COPY_S_W MSA128W:$ws, immZExt4:$idx)>; 3227 3228def : MSAPat<(v16i8 (load addr:$addr)), (LD_B addr:$addr)>; 3229def : MSAPat<(v8i16 (load addr:$addr)), (LD_H addr:$addr)>; 3230def : MSAPat<(v4i32 (load addr:$addr)), (LD_W addr:$addr)>; 3231def : MSAPat<(v2i64 (load addr:$addr)), (LD_D addr:$addr)>; 3232def : MSAPat<(v8f16 (load addr:$addr)), (LD_H addr:$addr)>; 3233def : MSAPat<(v4f32 (load addr:$addr)), (LD_W addr:$addr)>; 3234def : MSAPat<(v2f64 (load addr:$addr)), (LD_D addr:$addr)>; 3235 3236def : MSAPat<(v8f16 (load addrRegImm:$addr)), (LD_H addrRegImm:$addr)>; 3237def : MSAPat<(v4f32 (load addrRegImm:$addr)), (LD_W addrRegImm:$addr)>; 3238def : MSAPat<(v2f64 (load addrRegImm:$addr)), (LD_D addrRegImm:$addr)>; 3239 3240def : MSAPat<(store (v16i8 MSA128B:$ws), addr:$addr), 3241 (ST_B MSA128B:$ws, addr:$addr)>; 3242def : MSAPat<(store (v8i16 MSA128H:$ws), addr:$addr), 3243 (ST_H MSA128H:$ws, addr:$addr)>; 3244def : MSAPat<(store (v4i32 MSA128W:$ws), addr:$addr), 3245 (ST_W MSA128W:$ws, addr:$addr)>; 3246def : MSAPat<(store (v2i64 MSA128D:$ws), addr:$addr), 3247 (ST_D MSA128D:$ws, addr:$addr)>; 3248def : MSAPat<(store (v8f16 MSA128H:$ws), addr:$addr), 3249 (ST_H MSA128H:$ws, addr:$addr)>; 3250def : MSAPat<(store (v4f32 MSA128W:$ws), addr:$addr), 3251 (ST_W MSA128W:$ws, addr:$addr)>; 3252def : MSAPat<(store (v2f64 MSA128D:$ws), addr:$addr), 3253 (ST_D MSA128D:$ws, addr:$addr)>; 3254 3255def ST_FH : MSAPat<(store (v8f16 MSA128H:$ws), addrRegImm:$addr), 3256 (ST_H MSA128H:$ws, addrRegImm:$addr)>; 3257def ST_FW : MSAPat<(store (v4f32 MSA128W:$ws), addrRegImm:$addr), 3258 (ST_W MSA128W:$ws, addrRegImm:$addr)>; 3259def ST_FD : MSAPat<(store (v2f64 MSA128D:$ws), addrRegImm:$addr), 3260 (ST_D MSA128D:$ws, addrRegImm:$addr)>; 3261 3262class MSA_FABS_PSEUDO_DESC_BASE<RegisterOperand ROWD, 3263 RegisterOperand ROWS = ROWD, 3264 InstrItinClass itin = NoItinerary> : 3265 MipsPseudo<(outs ROWD:$wd), 3266 (ins ROWS:$ws), 3267 [(set ROWD:$wd, (fabs ROWS:$ws))]> { 3268 InstrItinClass Itinerary = itin; 3269} 3270def FABS_W : MSA_FABS_PSEUDO_DESC_BASE<MSA128WOpnd>, 3271 PseudoInstExpansion<(FMAX_A_W MSA128WOpnd:$wd, MSA128WOpnd:$ws, 3272 MSA128WOpnd:$ws)>; 3273def FABS_D : MSA_FABS_PSEUDO_DESC_BASE<MSA128DOpnd>, 3274 PseudoInstExpansion<(FMAX_A_D MSA128DOpnd:$wd, MSA128DOpnd:$ws, 3275 MSA128DOpnd:$ws)>; 3276 3277class MSABitconvertPat<ValueType DstVT, ValueType SrcVT, 3278 RegisterClass DstRC, list<Predicate> preds = [HasMSA]> : 3279 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3280 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>; 3281 3282// These are endian-independant because the element size doesnt change 3283def : MSABitconvertPat<v8i16, v8f16, MSA128H>; 3284def : MSABitconvertPat<v4i32, v4f32, MSA128W>; 3285def : MSABitconvertPat<v2i64, v2f64, MSA128D>; 3286def : MSABitconvertPat<v8f16, v8i16, MSA128H>; 3287def : MSABitconvertPat<v4f32, v4i32, MSA128W>; 3288def : MSABitconvertPat<v2f64, v2i64, MSA128D>; 3289 3290// Little endian bitcasts are always no-ops 3291def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>; 3292def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>; 3293def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>; 3294def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>; 3295def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>; 3296def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>; 3297 3298def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>; 3299def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>; 3300def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>; 3301def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>; 3302def : MSABitconvertPat<v8i16, v2f64, MSA128H, [HasMSA, IsLE]>; 3303 3304def : MSABitconvertPat<v4i32, v16i8, MSA128W, [HasMSA, IsLE]>; 3305def : MSABitconvertPat<v4i32, v8i16, MSA128W, [HasMSA, IsLE]>; 3306def : MSABitconvertPat<v4i32, v2i64, MSA128W, [HasMSA, IsLE]>; 3307def : MSABitconvertPat<v4i32, v8f16, MSA128W, [HasMSA, IsLE]>; 3308def : MSABitconvertPat<v4i32, v2f64, MSA128W, [HasMSA, IsLE]>; 3309 3310def : MSABitconvertPat<v2i64, v16i8, MSA128D, [HasMSA, IsLE]>; 3311def : MSABitconvertPat<v2i64, v8i16, MSA128D, [HasMSA, IsLE]>; 3312def : MSABitconvertPat<v2i64, v4i32, MSA128D, [HasMSA, IsLE]>; 3313def : MSABitconvertPat<v2i64, v8f16, MSA128D, [HasMSA, IsLE]>; 3314def : MSABitconvertPat<v2i64, v4f32, MSA128D, [HasMSA, IsLE]>; 3315 3316def : MSABitconvertPat<v4f32, v16i8, MSA128W, [HasMSA, IsLE]>; 3317def : MSABitconvertPat<v4f32, v8i16, MSA128W, [HasMSA, IsLE]>; 3318def : MSABitconvertPat<v4f32, v2i64, MSA128W, [HasMSA, IsLE]>; 3319def : MSABitconvertPat<v4f32, v8f16, MSA128W, [HasMSA, IsLE]>; 3320def : MSABitconvertPat<v4f32, v2f64, MSA128W, [HasMSA, IsLE]>; 3321 3322def : MSABitconvertPat<v2f64, v16i8, MSA128D, [HasMSA, IsLE]>; 3323def : MSABitconvertPat<v2f64, v8i16, MSA128D, [HasMSA, IsLE]>; 3324def : MSABitconvertPat<v2f64, v4i32, MSA128D, [HasMSA, IsLE]>; 3325def : MSABitconvertPat<v2f64, v8f16, MSA128D, [HasMSA, IsLE]>; 3326def : MSABitconvertPat<v2f64, v4f32, MSA128D, [HasMSA, IsLE]>; 3327 3328// Big endian bitcasts expand to shuffle instructions. 3329// This is because bitcast is defined to be a store/load sequence and the 3330// vector store/load instructions are mixed-endian with respect to the vector 3331// as a whole (little endian with respect to element order, but big endian 3332// elements). 3333 3334class MSABitconvertReverseQuartersPat<ValueType DstVT, ValueType SrcVT, 3335 RegisterClass DstRC, MSAInst Insn, 3336 RegisterClass ViaRC> : 3337 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3338 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 27), 3339 DstRC), 3340 [HasMSA, IsBE]>; 3341 3342class MSABitconvertReverseHalvesPat<ValueType DstVT, ValueType SrcVT, 3343 RegisterClass DstRC, MSAInst Insn, 3344 RegisterClass ViaRC> : 3345 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3346 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 177), 3347 DstRC), 3348 [HasMSA, IsBE]>; 3349 3350class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT, 3351 RegisterClass DstRC> : 3352 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 3353 3354class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT, 3355 RegisterClass DstRC> : 3356 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 3357 3358class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT, 3359 RegisterClass DstRC> : 3360 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3361 (COPY_TO_REGCLASS 3362 (SHF_W 3363 (COPY_TO_REGCLASS 3364 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27), 3365 MSA128W), 177), 3366 DstRC), 3367 [HasMSA, IsBE]>; 3368 3369class MSABitconvertReverseHInWPat<ValueType DstVT, ValueType SrcVT, 3370 RegisterClass DstRC> : 3371 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 3372 3373class MSABitconvertReverseHInDPat<ValueType DstVT, ValueType SrcVT, 3374 RegisterClass DstRC> : 3375 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 3376 3377class MSABitconvertReverseWInDPat<ValueType DstVT, ValueType SrcVT, 3378 RegisterClass DstRC> : 3379 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_W, MSA128W>; 3380 3381def : MSABitconvertReverseBInHPat<v8i16, v16i8, MSA128H>; 3382def : MSABitconvertReverseBInHPat<v8f16, v16i8, MSA128H>; 3383def : MSABitconvertReverseBInWPat<v4i32, v16i8, MSA128W>; 3384def : MSABitconvertReverseBInWPat<v4f32, v16i8, MSA128W>; 3385def : MSABitconvertReverseBInDPat<v2i64, v16i8, MSA128D>; 3386def : MSABitconvertReverseBInDPat<v2f64, v16i8, MSA128D>; 3387 3388def : MSABitconvertReverseBInHPat<v16i8, v8i16, MSA128B>; 3389def : MSABitconvertReverseHInWPat<v4i32, v8i16, MSA128W>; 3390def : MSABitconvertReverseHInWPat<v4f32, v8i16, MSA128W>; 3391def : MSABitconvertReverseHInDPat<v2i64, v8i16, MSA128D>; 3392def : MSABitconvertReverseHInDPat<v2f64, v8i16, MSA128D>; 3393 3394def : MSABitconvertReverseBInHPat<v16i8, v8f16, MSA128B>; 3395def : MSABitconvertReverseHInWPat<v4i32, v8f16, MSA128W>; 3396def : MSABitconvertReverseHInWPat<v4f32, v8f16, MSA128W>; 3397def : MSABitconvertReverseHInDPat<v2i64, v8f16, MSA128D>; 3398def : MSABitconvertReverseHInDPat<v2f64, v8f16, MSA128D>; 3399 3400def : MSABitconvertReverseBInWPat<v16i8, v4i32, MSA128B>; 3401def : MSABitconvertReverseHInWPat<v8i16, v4i32, MSA128H>; 3402def : MSABitconvertReverseHInWPat<v8f16, v4i32, MSA128H>; 3403def : MSABitconvertReverseWInDPat<v2i64, v4i32, MSA128D>; 3404def : MSABitconvertReverseWInDPat<v2f64, v4i32, MSA128D>; 3405 3406def : MSABitconvertReverseBInWPat<v16i8, v4f32, MSA128B>; 3407def : MSABitconvertReverseHInWPat<v8i16, v4f32, MSA128H>; 3408def : MSABitconvertReverseHInWPat<v8f16, v4f32, MSA128H>; 3409def : MSABitconvertReverseWInDPat<v2i64, v4f32, MSA128D>; 3410def : MSABitconvertReverseWInDPat<v2f64, v4f32, MSA128D>; 3411 3412def : MSABitconvertReverseBInDPat<v16i8, v2i64, MSA128B>; 3413def : MSABitconvertReverseHInDPat<v8i16, v2i64, MSA128H>; 3414def : MSABitconvertReverseHInDPat<v8f16, v2i64, MSA128H>; 3415def : MSABitconvertReverseWInDPat<v4i32, v2i64, MSA128W>; 3416def : MSABitconvertReverseWInDPat<v4f32, v2i64, MSA128W>; 3417 3418def : MSABitconvertReverseBInDPat<v16i8, v2f64, MSA128B>; 3419def : MSABitconvertReverseHInDPat<v8i16, v2f64, MSA128H>; 3420def : MSABitconvertReverseHInDPat<v8f16, v2f64, MSA128H>; 3421def : MSABitconvertReverseWInDPat<v4i32, v2f64, MSA128W>; 3422def : MSABitconvertReverseWInDPat<v4f32, v2f64, MSA128W>; 3423 3424// Pseudos used to implement BNZ.df, and BZ.df 3425 3426class MSA_CBRANCH_PSEUDO_DESC_BASE<SDPatternOperator OpNode, ValueType TyNode, 3427 RegisterClass RCWS, 3428 InstrItinClass itin = NoItinerary> : 3429 MipsPseudo<(outs GPR32:$dst), 3430 (ins RCWS:$ws), 3431 [(set GPR32:$dst, (OpNode (TyNode RCWS:$ws)))]> { 3432 bit usesCustomInserter = 1; 3433} 3434 3435def SNZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v16i8, 3436 MSA128B, NoItinerary>; 3437def SNZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v8i16, 3438 MSA128H, NoItinerary>; 3439def SNZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v4i32, 3440 MSA128W, NoItinerary>; 3441def SNZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v2i64, 3442 MSA128D, NoItinerary>; 3443def SNZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyNonZero, v16i8, 3444 MSA128B, NoItinerary>; 3445 3446def SZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v16i8, 3447 MSA128B, NoItinerary>; 3448def SZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v8i16, 3449 MSA128H, NoItinerary>; 3450def SZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v4i32, 3451 MSA128W, NoItinerary>; 3452def SZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v2i64, 3453 MSA128D, NoItinerary>; 3454def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8, 3455 MSA128B, NoItinerary>; 3456