MipsSEISelLowering.h revision e2a9376b1bd2204ea6f56a35b762e28e0ef4e35a 
1//===-- MipsSEISelLowering.h - MipsSE DAG Lowering Interface ----*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// Subclass of MipsTargetLowering specialized for mips32/64.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef MipsSEISELLOWERING_H
15#define MipsSEISELLOWERING_H
16
17#include "MipsISelLowering.h"
18#include "MipsRegisterInfo.h"
19
20namespace llvm {
21  class MipsSETargetLowering : public MipsTargetLowering  {
22  public:
23    explicit MipsSETargetLowering(MipsTargetMachine &TM);
24
25    void addMSAType(MVT::SimpleValueType Ty);
26
27    virtual bool allowsUnalignedMemoryAccesses(EVT VT, bool *Fast) const;
28
29    virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
30
31    virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
32
33    virtual MachineBasicBlock *
34    EmitInstrWithCustomInserter(MachineInstr *MI, MachineBasicBlock *MBB) const;
35
36    virtual bool isShuffleMaskLegal(const SmallVectorImpl<int> &Mask,
37                                    EVT VT) const {
38      return false;
39    }
40
41    virtual const TargetRegisterClass *getRepRegClassFor(MVT VT) const {
42      if (VT == MVT::Untyped)
43        return Subtarget->hasDSP() ? &Mips::ACC64DSPRegClass :
44                                     &Mips::ACC64RegClass;
45
46      return TargetLowering::getRepRegClassFor(VT);
47    }
48
49  private:
50    virtual bool
51    isEligibleForTailCallOptimization(const MipsCC &MipsCCInfo,
52                                      unsigned NextStackOffset,
53                                      const MipsFunctionInfo& FI) const;
54
55    virtual void
56    getOpndList(SmallVectorImpl<SDValue> &Ops,
57                std::deque< std::pair<unsigned, SDValue> > &RegsToPass,
58                bool IsPICCall, bool GlobalOrExternal, bool InternalLinkage,
59                CallLoweringInfo &CLI, SDValue Callee, SDValue Chain) const;
60
61    SDValue lowerMulDiv(SDValue Op, unsigned NewOpc, bool HasLo, bool HasHi,
62                        SelectionDAG &DAG) const;
63
64    SDValue lowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
65    SDValue lowerINTRINSIC_W_CHAIN(SDValue Op, SelectionDAG &DAG) const;
66
67    MachineBasicBlock *emitBPOSGE32(MachineInstr *MI,
68                                    MachineBasicBlock *BB) const;
69  };
70}
71
72#endif // MipsSEISELLOWERING_H
73