MipsSERegisterInfo.cpp revision 0b8c9a80f20772c3793201ab5b251d3520b9cea3 
1//===-- MipsSERegisterInfo.cpp - MIPS32/64 Register Information -== -------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the MIPS32/64 implementation of the TargetRegisterInfo
11// class.
12//
13//===----------------------------------------------------------------------===//
14
15#include "MipsSERegisterInfo.h"
16#include "Mips.h"
17#include "MipsAnalyzeImmediate.h"
18#include "MipsMachineFunction.h"
19#include "MipsSEInstrInfo.h"
20#include "MipsSubtarget.h"
21#include "llvm/ADT/BitVector.h"
22#include "llvm/ADT/STLExtras.h"
23#include "llvm/CodeGen/MachineFrameInfo.h"
24#include "llvm/CodeGen/MachineFunction.h"
25#include "llvm/CodeGen/MachineInstrBuilder.h"
26#include "llvm/CodeGen/MachineRegisterInfo.h"
27#include "llvm/CodeGen/ValueTypes.h"
28#include "llvm/DebugInfo.h"
29#include "llvm/IR/Constants.h"
30#include "llvm/IR/Function.h"
31#include "llvm/IR/Type.h"
32#include "llvm/Support/CommandLine.h"
33#include "llvm/Support/Debug.h"
34#include "llvm/Support/ErrorHandling.h"
35#include "llvm/Support/raw_ostream.h"
36#include "llvm/Target/TargetFrameLowering.h"
37#include "llvm/Target/TargetInstrInfo.h"
38#include "llvm/Target/TargetMachine.h"
39#include "llvm/Target/TargetOptions.h"
40
41using namespace llvm;
42
43MipsSERegisterInfo::MipsSERegisterInfo(const MipsSubtarget &ST,
44                                       const MipsSEInstrInfo &I)
45  : MipsRegisterInfo(ST), TII(I) {}
46
47bool MipsSERegisterInfo::
48requiresRegisterScavenging(const MachineFunction &MF) const {
49  return true;
50}
51
52bool MipsSERegisterInfo::
53requiresFrameIndexScavenging(const MachineFunction &MF) const {
54  return true;
55}
56
57// This function eliminate ADJCALLSTACKDOWN,
58// ADJCALLSTACKUP pseudo instructions
59void MipsSERegisterInfo::
60eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
61                              MachineBasicBlock::iterator I) const {
62  const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
63
64  if (!TFI->hasReservedCallFrame(MF)) {
65    int64_t Amount = I->getOperand(0).getImm();
66
67    if (I->getOpcode() == Mips::ADJCALLSTACKDOWN)
68      Amount = -Amount;
69
70    const MipsSEInstrInfo *II = static_cast<const MipsSEInstrInfo*>(&TII);
71    unsigned SP = Subtarget.isABI_N64() ? Mips::SP_64 : Mips::SP;
72
73    II->adjustStackPtr(SP, Amount, MBB, I);
74  }
75
76  MBB.erase(I);
77}
78
79void MipsSERegisterInfo::eliminateFI(MachineBasicBlock::iterator II,
80                                     unsigned OpNo, int FrameIndex,
81                                     uint64_t StackSize,
82                                     int64_t SPOffset) const {
83  MachineInstr &MI = *II;
84  MachineFunction &MF = *MI.getParent()->getParent();
85  MachineFrameInfo *MFI = MF.getFrameInfo();
86
87  const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
88  int MinCSFI = 0;
89  int MaxCSFI = -1;
90
91  if (CSI.size()) {
92    MinCSFI = CSI[0].getFrameIdx();
93    MaxCSFI = CSI[CSI.size() - 1].getFrameIdx();
94  }
95
96  // The following stack frame objects are always referenced relative to $sp:
97  //  1. Outgoing arguments.
98  //  2. Pointer to dynamically allocated stack space.
99  //  3. Locations for callee-saved registers.
100  // Everything else is referenced relative to whatever register
101  // getFrameRegister() returns.
102  unsigned FrameReg;
103
104  if (FrameIndex >= MinCSFI && FrameIndex <= MaxCSFI)
105    FrameReg = Subtarget.isABI_N64() ? Mips::SP_64 : Mips::SP;
106  else
107    FrameReg = getFrameRegister(MF);
108
109  // Calculate final offset.
110  // - There is no need to change the offset if the frame object is one of the
111  //   following: an outgoing argument, pointer to a dynamically allocated
112  //   stack space or a $gp restore location,
113  // - If the frame object is any of the following, its offset must be adjusted
114  //   by adding the size of the stack:
115  //   incoming argument, callee-saved register location or local variable.
116  bool IsKill = false;
117  int64_t Offset;
118
119  Offset = SPOffset + (int64_t)StackSize;
120  Offset += MI.getOperand(OpNo + 1).getImm();
121
122  DEBUG(errs() << "Offset     : " << Offset << "\n" << "<--------->\n");
123
124  // If MI is not a debug value, make sure Offset fits in the 16-bit immediate
125  // field.
126  if (!MI.isDebugValue() && !isInt<16>(Offset)) {
127    MachineBasicBlock &MBB = *MI.getParent();
128    DebugLoc DL = II->getDebugLoc();
129    unsigned ADDu = Subtarget.isABI_N64() ? Mips::DADDu : Mips::ADDu;
130    unsigned NewImm;
131
132    unsigned Reg = TII.loadImmediate(Offset, MBB, II, DL, &NewImm);
133    BuildMI(MBB, II, DL, TII.get(ADDu), Reg).addReg(FrameReg)
134      .addReg(Reg, RegState::Kill);
135
136    FrameReg = Reg;
137    Offset = SignExtend64<16>(NewImm);
138    IsKill = true;
139  }
140
141  MI.getOperand(OpNo).ChangeToRegister(FrameReg, false, false, IsKill);
142  MI.getOperand(OpNo + 1).ChangeToImmediate(Offset);
143}
144