MipsSERegisterInfo.cpp revision 700ed80d3da5e98e05ceb90e9bfb66058581a6db 
1//===-- MipsSERegisterInfo.cpp - MIPS32/64 Register Information -== -------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the MIPS32/64 implementation of the TargetRegisterInfo
11// class.
12//
13//===----------------------------------------------------------------------===//
14
15#include "MipsSERegisterInfo.h"
16#include "Mips.h"
17#include "MipsAnalyzeImmediate.h"
18#include "MipsMachineFunction.h"
19#include "MipsSEInstrInfo.h"
20#include "MipsSubtarget.h"
21#include "llvm/ADT/BitVector.h"
22#include "llvm/ADT/STLExtras.h"
23#include "llvm/CodeGen/MachineFrameInfo.h"
24#include "llvm/CodeGen/MachineFunction.h"
25#include "llvm/CodeGen/MachineInstrBuilder.h"
26#include "llvm/CodeGen/MachineRegisterInfo.h"
27#include "llvm/CodeGen/ValueTypes.h"
28#include "llvm/DebugInfo.h"
29#include "llvm/IR/Constants.h"
30#include "llvm/IR/Function.h"
31#include "llvm/IR/Type.h"
32#include "llvm/Support/CommandLine.h"
33#include "llvm/Support/Debug.h"
34#include "llvm/Support/ErrorHandling.h"
35#include "llvm/Support/raw_ostream.h"
36#include "llvm/Target/TargetFrameLowering.h"
37#include "llvm/Target/TargetInstrInfo.h"
38#include "llvm/Target/TargetMachine.h"
39#include "llvm/Target/TargetOptions.h"
40
41using namespace llvm;
42
43MipsSERegisterInfo::MipsSERegisterInfo(const MipsSubtarget &ST,
44                                       const MipsSEInstrInfo &I)
45  : MipsRegisterInfo(ST), TII(I) {}
46
47bool MipsSERegisterInfo::
48requiresRegisterScavenging(const MachineFunction &MF) const {
49  return true;
50}
51
52bool MipsSERegisterInfo::
53requiresFrameIndexScavenging(const MachineFunction &MF) const {
54  return true;
55}
56
57void MipsSERegisterInfo::eliminateFI(MachineBasicBlock::iterator II,
58                                     unsigned OpNo, int FrameIndex,
59                                     uint64_t StackSize,
60                                     int64_t SPOffset) const {
61  MachineInstr &MI = *II;
62  MachineFunction &MF = *MI.getParent()->getParent();
63  MachineFrameInfo *MFI = MF.getFrameInfo();
64  MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>();
65
66  const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
67  int MinCSFI = 0;
68  int MaxCSFI = -1;
69
70  if (CSI.size()) {
71    MinCSFI = CSI[0].getFrameIdx();
72    MaxCSFI = CSI[CSI.size() - 1].getFrameIdx();
73  }
74
75  bool EhDataRegFI = MipsFI->isEhDataRegFI(FrameIndex);
76
77  // The following stack frame objects are always referenced relative to $sp:
78  //  1. Outgoing arguments.
79  //  2. Pointer to dynamically allocated stack space.
80  //  3. Locations for callee-saved registers.
81  //  4. Locations for eh data registers.
82  // Everything else is referenced relative to whatever register
83  // getFrameRegister() returns.
84  unsigned FrameReg;
85
86  if ((FrameIndex >= MinCSFI && FrameIndex <= MaxCSFI) || EhDataRegFI)
87    FrameReg = Subtarget.isABI_N64() ? Mips::SP_64 : Mips::SP;
88  else
89    FrameReg = getFrameRegister(MF);
90
91  // Calculate final offset.
92  // - There is no need to change the offset if the frame object is one of the
93  //   following: an outgoing argument, pointer to a dynamically allocated
94  //   stack space or a $gp restore location,
95  // - If the frame object is any of the following, its offset must be adjusted
96  //   by adding the size of the stack:
97  //   incoming argument, callee-saved register location or local variable.
98  bool IsKill = false;
99  int64_t Offset;
100
101  Offset = SPOffset + (int64_t)StackSize;
102  Offset += MI.getOperand(OpNo + 1).getImm();
103
104  DEBUG(errs() << "Offset     : " << Offset << "\n" << "<--------->\n");
105
106  // If MI is not a debug value, make sure Offset fits in the 16-bit immediate
107  // field.
108  if (!MI.isDebugValue() && !isInt<16>(Offset)) {
109    MachineBasicBlock &MBB = *MI.getParent();
110    DebugLoc DL = II->getDebugLoc();
111    unsigned ADDu = Subtarget.isABI_N64() ? Mips::DADDu : Mips::ADDu;
112    unsigned NewImm;
113
114    unsigned Reg = TII.loadImmediate(Offset, MBB, II, DL, &NewImm);
115    BuildMI(MBB, II, DL, TII.get(ADDu), Reg).addReg(FrameReg)
116      .addReg(Reg, RegState::Kill);
117
118    FrameReg = Reg;
119    Offset = SignExtend64<16>(NewImm);
120    IsKill = true;
121  }
122
123  MI.getOperand(OpNo).ChangeToRegister(FrameReg, false, false, IsKill);
124  MI.getOperand(OpNo + 1).ChangeToImmediate(Offset);
125}
126