MipsSERegisterInfo.cpp revision 71746220d3d1c3e8efba35038ac2ff14b4a4d3ae 
1//===-- MipsSERegisterInfo.cpp - MIPS32/64 Register Information -== -------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the MIPS32/64 implementation of the TargetRegisterInfo
11// class.
12//
13//===----------------------------------------------------------------------===//
14
15#include "MipsSERegisterInfo.h"
16#include "Mips.h"
17#include "MipsAnalyzeImmediate.h"
18#include "MipsSEInstrInfo.h"
19#include "MipsSubtarget.h"
20#include "MipsMachineFunction.h"
21#include "llvm/Constants.h"
22#include "llvm/DebugInfo.h"
23#include "llvm/Type.h"
24#include "llvm/Function.h"
25#include "llvm/CodeGen/ValueTypes.h"
26#include "llvm/CodeGen/MachineInstrBuilder.h"
27#include "llvm/CodeGen/MachineFunction.h"
28#include "llvm/CodeGen/MachineFrameInfo.h"
29#include "llvm/Target/TargetFrameLowering.h"
30#include "llvm/Target/TargetMachine.h"
31#include "llvm/Target/TargetOptions.h"
32#include "llvm/Target/TargetInstrInfo.h"
33#include "llvm/Support/CommandLine.h"
34#include "llvm/Support/Debug.h"
35#include "llvm/Support/ErrorHandling.h"
36#include "llvm/Support/raw_ostream.h"
37#include "llvm/ADT/BitVector.h"
38#include "llvm/ADT/STLExtras.h"
39
40using namespace llvm;
41
42MipsSERegisterInfo::MipsSERegisterInfo(const MipsSubtarget &ST,
43                                       const TargetInstrInfo &TII)
44  : MipsRegisterInfo(ST, TII) {}
45
46// This function eliminate ADJCALLSTACKDOWN,
47// ADJCALLSTACKUP pseudo instructions
48void MipsSERegisterInfo::
49eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
50                              MachineBasicBlock::iterator I) const {
51  const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
52
53  if (!TFI->hasReservedCallFrame(MF)) {
54    DebugLoc DL = I->getDebugLoc();
55    int64_t Amount = I->getOperand(0).getImm();
56
57    if (I->getOpcode() == Mips::ADJCALLSTACKDOWN)
58      Amount = -Amount;
59
60    const MipsSEInstrInfo *II = static_cast<const MipsSEInstrInfo*>(&TII);
61    unsigned SP = Subtarget.isABI_N64() ? Mips::SP_64 : Mips::SP;
62
63    II->adjustStackPtr(SP, Amount, MBB, I);
64  }
65
66  MBB.erase(I);
67}
68
69void MipsSERegisterInfo::eliminateFI(MachineBasicBlock::iterator II,
70                                     unsigned OpNo, int FrameIndex,
71                                     uint64_t StackSize,
72                                     int64_t SPOffset) const {
73  MachineInstr &MI = *II;
74  MachineFunction &MF = *MI.getParent()->getParent();
75  MachineFrameInfo *MFI = MF.getFrameInfo();
76  MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>();
77
78  const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
79  int MinCSFI = 0;
80  int MaxCSFI = -1;
81
82  if (CSI.size()) {
83    MinCSFI = CSI[0].getFrameIdx();
84    MaxCSFI = CSI[CSI.size() - 1].getFrameIdx();
85  }
86
87  // The following stack frame objects are always referenced relative to $sp:
88  //  1. Outgoing arguments.
89  //  2. Pointer to dynamically allocated stack space.
90  //  3. Locations for callee-saved registers.
91  // Everything else is referenced relative to whatever register
92  // getFrameRegister() returns.
93  unsigned FrameReg;
94
95  if (MipsFI->isOutArgFI(FrameIndex) ||
96      (FrameIndex >= MinCSFI && FrameIndex <= MaxCSFI))
97    FrameReg = Subtarget.isABI_N64() ? Mips::SP_64 : Mips::SP;
98  else
99    FrameReg = getFrameRegister(MF);
100
101  // Calculate final offset.
102  // - There is no need to change the offset if the frame object is one of the
103  //   following: an outgoing argument, pointer to a dynamically allocated
104  //   stack space or a $gp restore location,
105  // - If the frame object is any of the following, its offset must be adjusted
106  //   by adding the size of the stack:
107  //   incoming argument, callee-saved register location or local variable.
108  int64_t Offset;
109
110  if (MipsFI->isOutArgFI(FrameIndex))
111    Offset = SPOffset;
112  else
113    Offset = SPOffset + (int64_t)StackSize;
114
115  Offset    += MI.getOperand(OpNo + 1).getImm();
116
117  DEBUG(errs() << "Offset     : " << Offset << "\n" << "<--------->\n");
118
119  // If MI is not a debug value, make sure Offset fits in the 16-bit immediate
120  // field.
121  if (!MI.isDebugValue() && !isInt<16>(Offset)) {
122    MachineBasicBlock &MBB = *MI.getParent();
123    DebugLoc DL = II->getDebugLoc();
124    unsigned ADDu = Subtarget.isABI_N64() ? Mips::DADDu : Mips::ADDu;
125    unsigned ATReg = Subtarget.isABI_N64() ? Mips::AT_64 : Mips::AT;
126    MipsAnalyzeImmediate::Inst LastInst(0, 0);
127
128    MipsFI->setEmitNOAT();
129    Mips::loadImmediate(Offset, Subtarget.isABI_N64(), TII, MBB, II, DL, true,
130                        &LastInst);
131    BuildMI(MBB, II, DL, TII.get(ADDu), ATReg).addReg(FrameReg).addReg(ATReg);
132
133    FrameReg = ATReg;
134    Offset = SignExtend64<16>(LastInst.ImmOpnd);
135  }
136
137  MI.getOperand(OpNo).ChangeToRegister(FrameReg, false);
138  MI.getOperand(OpNo + 1).ChangeToImmediate(Offset);
139}
140