MipsSERegisterInfo.cpp revision fc4eafa0f490bd06d8191a2f007514b9e3ce0387 
1//===-- MipsSERegisterInfo.cpp - MIPS32/64 Register Information -== -------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the MIPS32/64 implementation of the TargetRegisterInfo
11// class.
12//
13//===----------------------------------------------------------------------===//
14
15#include "MipsSERegisterInfo.h"
16#include "Mips.h"
17#include "MipsAnalyzeImmediate.h"
18#include "MipsSEInstrInfo.h"
19#include "MipsSubtarget.h"
20#include "MipsMachineFunction.h"
21#include "llvm/Constants.h"
22#include "llvm/DebugInfo.h"
23#include "llvm/Type.h"
24#include "llvm/Function.h"
25#include "llvm/CodeGen/ValueTypes.h"
26#include "llvm/CodeGen/MachineInstrBuilder.h"
27#include "llvm/CodeGen/MachineFunction.h"
28#include "llvm/CodeGen/MachineFrameInfo.h"
29#include "llvm/Target/TargetFrameLowering.h"
30#include "llvm/Target/TargetMachine.h"
31#include "llvm/Target/TargetOptions.h"
32#include "llvm/Target/TargetInstrInfo.h"
33#include "llvm/Support/CommandLine.h"
34#include "llvm/Support/Debug.h"
35#include "llvm/Support/ErrorHandling.h"
36#include "llvm/Support/raw_ostream.h"
37#include "llvm/ADT/BitVector.h"
38#include "llvm/ADT/STLExtras.h"
39
40using namespace llvm;
41
42MipsSERegisterInfo::MipsSERegisterInfo(const MipsSubtarget &ST,
43                                       const MipsSEInstrInfo &I)
44  : MipsRegisterInfo(ST), TII(I) {}
45
46// This function eliminate ADJCALLSTACKDOWN,
47// ADJCALLSTACKUP pseudo instructions
48void MipsSERegisterInfo::
49eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
50                              MachineBasicBlock::iterator I) const {
51  const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
52
53  if (!TFI->hasReservedCallFrame(MF)) {
54    int64_t Amount = I->getOperand(0).getImm();
55
56    if (I->getOpcode() == Mips::ADJCALLSTACKDOWN)
57      Amount = -Amount;
58
59    const MipsSEInstrInfo *II = static_cast<const MipsSEInstrInfo*>(&TII);
60    unsigned SP = Subtarget.isABI_N64() ? Mips::SP_64 : Mips::SP;
61
62    II->adjustStackPtr(SP, Amount, MBB, I);
63  }
64
65  MBB.erase(I);
66}
67
68void MipsSERegisterInfo::eliminateFI(MachineBasicBlock::iterator II,
69                                     unsigned OpNo, int FrameIndex,
70                                     uint64_t StackSize,
71                                     int64_t SPOffset) const {
72  MachineInstr &MI = *II;
73  MachineFunction &MF = *MI.getParent()->getParent();
74  MachineFrameInfo *MFI = MF.getFrameInfo();
75  MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>();
76
77  const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
78  int MinCSFI = 0;
79  int MaxCSFI = -1;
80
81  if (CSI.size()) {
82    MinCSFI = CSI[0].getFrameIdx();
83    MaxCSFI = CSI[CSI.size() - 1].getFrameIdx();
84  }
85
86  // The following stack frame objects are always referenced relative to $sp:
87  //  1. Outgoing arguments.
88  //  2. Pointer to dynamically allocated stack space.
89  //  3. Locations for callee-saved registers.
90  // Everything else is referenced relative to whatever register
91  // getFrameRegister() returns.
92  unsigned FrameReg;
93
94  if (MipsFI->isOutArgFI(FrameIndex) ||
95      (FrameIndex >= MinCSFI && FrameIndex <= MaxCSFI))
96    FrameReg = Subtarget.isABI_N64() ? Mips::SP_64 : Mips::SP;
97  else
98    FrameReg = getFrameRegister(MF);
99
100  // Calculate final offset.
101  // - There is no need to change the offset if the frame object is one of the
102  //   following: an outgoing argument, pointer to a dynamically allocated
103  //   stack space or a $gp restore location,
104  // - If the frame object is any of the following, its offset must be adjusted
105  //   by adding the size of the stack:
106  //   incoming argument, callee-saved register location or local variable.
107  int64_t Offset;
108
109  if (MipsFI->isOutArgFI(FrameIndex))
110    Offset = SPOffset;
111  else
112    Offset = SPOffset + (int64_t)StackSize;
113
114  Offset    += MI.getOperand(OpNo + 1).getImm();
115
116  DEBUG(errs() << "Offset     : " << Offset << "\n" << "<--------->\n");
117
118  // If MI is not a debug value, make sure Offset fits in the 16-bit immediate
119  // field.
120  if (!MI.isDebugValue() && !isInt<16>(Offset)) {
121    MachineBasicBlock &MBB = *MI.getParent();
122    DebugLoc DL = II->getDebugLoc();
123    unsigned ADDu = Subtarget.isABI_N64() ? Mips::DADDu : Mips::ADDu;
124    unsigned ATReg = Subtarget.isABI_N64() ? Mips::AT_64 : Mips::AT;
125    unsigned NewImm;
126
127    MipsFI->setEmitNOAT();
128    unsigned Reg = TII.loadImmediate(Offset, MBB, II, DL, &NewImm);
129    BuildMI(MBB, II, DL, TII.get(ADDu), ATReg).addReg(FrameReg).addReg(Reg);
130
131    FrameReg = ATReg;
132    Offset = SignExtend64<16>(NewImm);
133  }
134
135  MI.getOperand(OpNo).ChangeToRegister(FrameReg, false);
136  MI.getOperand(OpNo + 1).ChangeToImmediate(Offset);
137}
138