MipsSubtarget.cpp revision 36b56886974eae4f9c5ebc96befd3e7bfe5de338 
1//===-- MipsSubtarget.cpp - Mips Subtarget Information --------------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the Mips specific subclass of TargetSubtargetInfo.
11//
12//===----------------------------------------------------------------------===//
13
14#define DEBUG_TYPE "mips-subtarget"
15
16#include "MipsMachineFunction.h"
17#include "Mips.h"
18#include "MipsRegisterInfo.h"
19#include "MipsSubtarget.h"
20#include "MipsTargetMachine.h"
21#include "llvm/IR/Attributes.h"
22#include "llvm/IR/Function.h"
23#include "llvm/Support/CommandLine.h"
24#include "llvm/Support/Debug.h"
25#include "llvm/Support/TargetRegistry.h"
26#include "llvm/Support/raw_ostream.h"
27
28#define GET_SUBTARGETINFO_TARGET_DESC
29#define GET_SUBTARGETINFO_CTOR
30#include "MipsGenSubtargetInfo.inc"
31
32
33using namespace llvm;
34
35// FIXME: Maybe this should be on by default when Mips16 is specified
36//
37static cl::opt<bool> Mixed16_32(
38  "mips-mixed-16-32",
39  cl::init(false),
40  cl::desc("Allow for a mixture of Mips16 "
41           "and Mips32 code in a single source file"),
42  cl::Hidden);
43
44static cl::opt<bool> Mips_Os16(
45  "mips-os16",
46  cl::init(false),
47  cl::desc("Compile all functions that don' use "
48           "floating point as Mips 16"),
49  cl::Hidden);
50
51static cl::opt<bool>
52Mips16HardFloat("mips16-hard-float", cl::NotHidden,
53                cl::desc("MIPS: mips16 hard float enable."),
54                cl::init(false));
55
56static cl::opt<bool>
57Mips16ConstantIslands(
58  "mips16-constant-islands", cl::NotHidden,
59  cl::desc("MIPS: mips16 constant islands enable."),
60  cl::init(true));
61
62/// Select the Mips CPU for the given triple and cpu name.
63/// FIXME: Merge with the copy in MipsMCTargetDesc.cpp
64static inline StringRef selectMipsCPU(StringRef TT, StringRef CPU) {
65  if (CPU.empty() || CPU == "generic") {
66    Triple TheTriple(TT);
67    if (TheTriple.getArch() == Triple::mips ||
68        TheTriple.getArch() == Triple::mipsel)
69      CPU = "mips32";
70    else
71      CPU = "mips64";
72  }
73  return CPU;
74}
75
76void MipsSubtarget::anchor() { }
77
78MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU,
79                             const std::string &FS, bool little,
80                             Reloc::Model _RM, MipsTargetMachine *_TM) :
81  MipsGenSubtargetInfo(TT, CPU, FS),
82  MipsArchVersion(Mips32), MipsABI(UnknownABI), IsLittle(little),
83  IsSingleFloat(false), IsFP64bit(false), IsGP64bit(false), HasVFPU(false),
84  HasCnMips(false), IsLinux(true), HasSEInReg(false), HasCondMov(false),
85  HasSwap(false), HasBitCount(false), HasFPIdx(false),
86  InMips16Mode(false), InMips16HardFloat(Mips16HardFloat),
87  InMicroMipsMode(false), HasDSP(false), HasDSPR2(false),
88  AllowMixed16_32(Mixed16_32 | Mips_Os16), Os16(Mips_Os16), HasMSA(false),
89  RM(_RM), OverrideMode(NoOverride), TM(_TM), TargetTriple(TT)
90{
91  std::string CPUName = CPU;
92  CPUName = selectMipsCPU(TT, CPUName);
93
94  // Parse features string.
95  ParseSubtargetFeatures(CPUName, FS);
96
97  if (InMips16Mode && !TM->Options.UseSoftFloat) {
98    // Hard float for mips16 means essentially to compile as soft float
99    // but to use a runtime library for soft float that is written with
100    // native mips32 floating point instructions (those runtime routines
101    // run in mips32 hard float mode).
102    TM->Options.UseSoftFloat = true;
103    TM->Options.FloatABIType = FloatABI::Soft;
104    InMips16HardFloat = true;
105  }
106
107  PreviousInMips16Mode = InMips16Mode;
108
109  // Initialize scheduling itinerary for the specified CPU.
110  InstrItins = getInstrItineraryForCPU(CPUName);
111
112  // Assert exactly one ABI was chosen.
113  assert(MipsABI != UnknownABI);
114  assert((((getFeatureBits() & Mips::FeatureO32) != 0) +
115          ((getFeatureBits() & Mips::FeatureEABI) != 0) +
116          ((getFeatureBits() & Mips::FeatureN32) != 0) +
117          ((getFeatureBits() & Mips::FeatureN64) != 0)) == 1);
118
119  // Check if Architecture and ABI are compatible.
120  assert(((!isGP64bit() && (isABI_O32() || isABI_EABI())) ||
121          (isGP64bit() && (isABI_N32() || isABI_N64()))) &&
122         "Invalid  Arch & ABI pair.");
123
124  if (hasMSA() && !isFP64bit())
125    report_fatal_error("MSA requires a 64-bit FPU register file (FR=1 mode). "
126                       "See -mattr=+fp64.",
127                       false);
128
129  // Is the target system Linux ?
130  if (TT.find("linux") == std::string::npos)
131    IsLinux = false;
132
133  // Set UseSmallSection.
134  UseSmallSection = !IsLinux && (RM == Reloc::Static);
135  // set some subtarget specific features
136  if (inMips16Mode())
137    HasBitCount=false;
138}
139
140bool
141MipsSubtarget::enablePostRAScheduler(CodeGenOpt::Level OptLevel,
142                                    TargetSubtargetInfo::AntiDepBreakMode &Mode,
143                                     RegClassVector &CriticalPathRCs) const {
144  Mode = TargetSubtargetInfo::ANTIDEP_NONE;
145  CriticalPathRCs.clear();
146  CriticalPathRCs.push_back(isGP64bit() ? &Mips::GPR64RegClass
147                                        : &Mips::GPR32RegClass);
148  return OptLevel >= CodeGenOpt::Aggressive;
149}
150
151//FIXME: This logic for reseting the subtarget along with
152// the helper classes can probably be simplified but there are a lot of
153// cases so we will defer rewriting this to later.
154//
155void MipsSubtarget::resetSubtarget(MachineFunction *MF) {
156  bool ChangeToMips16 = false, ChangeToNoMips16 = false;
157  DEBUG(dbgs() << "resetSubtargetFeatures" << "\n");
158  AttributeSet FnAttrs = MF->getFunction()->getAttributes();
159  ChangeToMips16 = FnAttrs.hasAttribute(AttributeSet::FunctionIndex,
160                                        "mips16");
161  ChangeToNoMips16 = FnAttrs.hasAttribute(AttributeSet::FunctionIndex,
162                                        "nomips16");
163  assert (!(ChangeToMips16 & ChangeToNoMips16) &&
164          "mips16 and nomips16 specified on the same function");
165  if (ChangeToMips16) {
166    if (PreviousInMips16Mode)
167      return;
168    OverrideMode = Mips16Override;
169    PreviousInMips16Mode = true;
170    TM->setHelperClassesMips16();
171    return;
172  } else if (ChangeToNoMips16) {
173    if (!PreviousInMips16Mode)
174      return;
175    OverrideMode = NoMips16Override;
176    PreviousInMips16Mode = false;
177    TM->setHelperClassesMipsSE();
178    return;
179  } else {
180    if (OverrideMode == NoOverride)
181      return;
182    OverrideMode = NoOverride;
183    DEBUG(dbgs() << "back to default" << "\n");
184    if (inMips16Mode() && !PreviousInMips16Mode) {
185      TM->setHelperClassesMips16();
186      PreviousInMips16Mode = true;
187    } else if (!inMips16Mode() && PreviousInMips16Mode) {
188      TM->setHelperClassesMipsSE();
189      PreviousInMips16Mode = false;
190    }
191    return;
192  }
193}
194
195bool MipsSubtarget::mipsSEUsesSoftFloat() const {
196  return TM->Options.UseSoftFloat && !InMips16HardFloat;
197}
198
199bool MipsSubtarget::useConstantIslands() {
200  DEBUG(dbgs() << "use constant islands " << Mips16ConstantIslands << "\n");
201  return Mips16ConstantIslands;
202}
203