MipsTargetMachine.h revision 434c0bd2a5c3c7ebaa8ca10dd7e4fdb1f25e92a0 
1//===-- MipsTargetMachine.h - Define TargetMachine for Mips -----*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file declares the Mips specific subclass of TargetMachine.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef MIPSTARGETMACHINE_H
15#define MIPSTARGETMACHINE_H
16
17#include "MipsFrameLowering.h"
18#include "MipsISelLowering.h"
19#include "MipsInstrInfo.h"
20#include "MipsJITInfo.h"
21#include "MipsSelectionDAGInfo.h"
22#include "MipsSubtarget.h"
23#include "llvm/ADT/OwningPtr.h"
24#include "llvm/CodeGen/Passes.h"
25#include "llvm/CodeGen/SelectionDAGISel.h"
26#include "llvm/IR/DataLayout.h"
27#include "llvm/Target/TargetFrameLowering.h"
28#include "llvm/Target/TargetMachine.h"
29
30namespace llvm {
31class formatted_raw_ostream;
32class MipsRegisterInfo;
33
34class MipsTargetMachine : public LLVMTargetMachine {
35  MipsSubtarget       Subtarget;
36  const DataLayout    DL; // Calculates type size & alignment
37  OwningPtr<const MipsInstrInfo> InstrInfo;
38  OwningPtr<const MipsFrameLowering> FrameLowering;
39  OwningPtr<const MipsTargetLowering> TLInfo;
40  OwningPtr<const MipsInstrInfo> InstrInfo16;
41  OwningPtr<const MipsFrameLowering> FrameLowering16;
42  OwningPtr<const MipsTargetLowering> TLInfo16;
43  OwningPtr<const MipsInstrInfo> InstrInfoSE;
44  OwningPtr<const MipsFrameLowering> FrameLoweringSE;
45  OwningPtr<const MipsTargetLowering> TLInfoSE;
46  MipsSelectionDAGInfo TSInfo;
47  const InstrItineraryData &InstrItins;
48  MipsJITInfo JITInfo;
49
50public:
51  MipsTargetMachine(const Target &T, StringRef TT,
52                    StringRef CPU, StringRef FS, const TargetOptions &Options,
53                    Reloc::Model RM, CodeModel::Model CM,
54                    CodeGenOpt::Level OL,
55                    bool isLittle);
56
57  virtual ~MipsTargetMachine() {}
58
59  virtual void addAnalysisPasses(PassManagerBase &PM);
60
61  virtual const MipsInstrInfo *getInstrInfo() const
62  { return InstrInfo.get(); }
63  virtual const TargetFrameLowering *getFrameLowering() const
64  { return FrameLowering.get(); }
65  virtual const MipsSubtarget *getSubtargetImpl() const
66  { return &Subtarget; }
67  virtual const DataLayout *getDataLayout()    const
68  { return &DL;}
69
70  virtual const InstrItineraryData *getInstrItineraryData() const {
71    return Subtarget.inMips16Mode() ? 0 : &InstrItins;
72  }
73
74  virtual MipsJITInfo *getJITInfo()
75  { return &JITInfo; }
76
77  virtual const MipsRegisterInfo *getRegisterInfo()  const {
78    return &InstrInfo->getRegisterInfo();
79  }
80
81  virtual const MipsTargetLowering *getTargetLowering() const {
82    return TLInfo.get();
83  }
84
85  virtual const MipsSelectionDAGInfo* getSelectionDAGInfo() const {
86    return &TSInfo;
87  }
88
89  // Pass Pipeline Configuration
90  virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
91  virtual bool addCodeEmitter(PassManagerBase &PM, JITCodeEmitter &JCE);
92
93  // Set helper classes
94  void setHelperClassesMips16();
95
96  void setHelperClassesMipsSE();
97
98
99};
100
101/// MipsebTargetMachine - Mips32/64 big endian target machine.
102///
103class MipsebTargetMachine : public MipsTargetMachine {
104  virtual void anchor();
105public:
106  MipsebTargetMachine(const Target &T, StringRef TT,
107                      StringRef CPU, StringRef FS, const TargetOptions &Options,
108                      Reloc::Model RM, CodeModel::Model CM,
109                      CodeGenOpt::Level OL);
110};
111
112/// MipselTargetMachine - Mips32/64 little endian target machine.
113///
114class MipselTargetMachine : public MipsTargetMachine {
115  virtual void anchor();
116public:
117  MipselTargetMachine(const Target &T, StringRef TT,
118                      StringRef CPU, StringRef FS, const TargetOptions &Options,
119                      Reloc::Model RM, CodeModel::Model CM,
120                      CodeGenOpt::Level OL);
121};
122
123} // End llvm namespace
124
125#endif
126