MipsTargetMachine.h revision b4f921b1f0ae34d6cfda6034a7d32c73b0738351
1//===-- MipsTargetMachine.h - Define TargetMachine for Mips -----*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file declares the Mips specific subclass of TargetMachine.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef MIPSTARGETMACHINE_H
15#define MIPSTARGETMACHINE_H
16
17#include "MipsFrameLowering.h"
18#include "MipsInstrInfo.h"
19#include "MipsISelLowering.h"
20#include "MipsJITInfo.h"
21#include "MipsSelectionDAGInfo.h"
22#include "MipsSubtarget.h"
23#include "llvm/Target/TargetMachine.h"
24#include "llvm/Target/TargetData.h"
25#include "llvm/Target/TargetFrameLowering.h"
26
27namespace llvm {
28  class formatted_raw_ostream;
29
30class MipsTargetMachine : public LLVMTargetMachine {
31  MipsSubtarget       Subtarget;
32  const TargetData    DataLayout; // Calculates type size & alignment
33  MipsInstrInfo       InstrInfo;
34  MipsFrameLowering   FrameLowering;
35  MipsTargetLowering  TLInfo;
36  MipsSelectionDAGInfo TSInfo;
37  MipsJITInfo JITInfo;
38
39public:
40  MipsTargetMachine(const Target &T, StringRef TT,
41                    StringRef CPU, StringRef FS, const TargetOptions &Options,
42                    Reloc::Model RM, CodeModel::Model CM,
43                    CodeGenOpt::Level OL,
44                    bool isLittle);
45
46  virtual const MipsInstrInfo *getInstrInfo() const
47  { return &InstrInfo; }
48  virtual const TargetFrameLowering *getFrameLowering() const
49  { return &FrameLowering; }
50  virtual const MipsSubtarget *getSubtargetImpl() const
51  { return &Subtarget; }
52  virtual const TargetData *getTargetData()    const
53  { return &DataLayout;}
54  virtual MipsJITInfo *getJITInfo()
55  { return &JITInfo; }
56
57  virtual const MipsRegisterInfo *getRegisterInfo()  const {
58    return &InstrInfo.getRegisterInfo();
59  }
60
61  virtual const MipsTargetLowering *getTargetLowering() const {
62    return &TLInfo;
63  }
64
65  virtual const MipsSelectionDAGInfo* getSelectionDAGInfo() const {
66    return &TSInfo;
67  }
68
69  // Pass Pipeline Configuration
70  virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
71  virtual bool addCodeEmitter(PassManagerBase &PM, JITCodeEmitter &JCE);
72};
73
74/// MipsebTargetMachine - Mips32/64 big endian target machine.
75///
76class MipsebTargetMachine : public MipsTargetMachine {
77  virtual void anchor();
78public:
79  MipsebTargetMachine(const Target &T, StringRef TT,
80                      StringRef CPU, StringRef FS, const TargetOptions &Options,
81                      Reloc::Model RM, CodeModel::Model CM,
82                      CodeGenOpt::Level OL);
83};
84
85/// MipselTargetMachine - Mips32/64 little endian target machine.
86///
87class MipselTargetMachine : public MipsTargetMachine {
88  virtual void anchor();
89public:
90  MipselTargetMachine(const Target &T, StringRef TT,
91                      StringRef CPU, StringRef FS, const TargetOptions &Options,
92                      Reloc::Model RM, CodeModel::Model CM,
93                      CodeGenOpt::Level OL);
94};
95
96} // End llvm namespace
97
98#endif
99