MipsTargetMachine.h revision b862f094b78e3176813903f63c0e78b6e0e7852b
1//===-- MipsTargetMachine.h - Define TargetMachine for Mips -----*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file declares the Mips specific subclass of TargetMachine. 11// 12//===----------------------------------------------------------------------===// 13 14#ifndef MIPSTARGETMACHINE_H 15#define MIPSTARGETMACHINE_H 16 17#include "MipsFrameLowering.h" 18#include "MipsInstrInfo.h" 19#include "MipsISelLowering.h" 20#include "MipsJITInfo.h" 21#include "MipsSelectionDAGInfo.h" 22#include "MipsSubtarget.h" 23#include "MipsELFWriterInfo.h" 24#include "llvm/Target/TargetMachine.h" 25#include "llvm/Target/TargetData.h" 26#include "llvm/Target/TargetFrameLowering.h" 27 28namespace llvm { 29class formatted_raw_ostream; 30class MipsRegisterInfo; 31 32class MipsTargetMachine : public LLVMTargetMachine { 33 MipsSubtarget Subtarget; 34 const TargetData DataLayout; // Calculates type size & alignment 35 const MipsInstrInfo *InstrInfo; 36 const MipsFrameLowering *FrameLowering; 37 MipsTargetLowering TLInfo; 38 MipsSelectionDAGInfo TSInfo; 39 MipsJITInfo JITInfo; 40 MipsELFWriterInfo ELFWriterInfo; 41 42public: 43 MipsTargetMachine(const Target &T, StringRef TT, 44 StringRef CPU, StringRef FS, const TargetOptions &Options, 45 Reloc::Model RM, CodeModel::Model CM, 46 CodeGenOpt::Level OL, 47 bool isLittle); 48 49 virtual ~MipsTargetMachine() { delete InstrInfo; } 50 51 virtual const MipsInstrInfo *getInstrInfo() const 52 { return InstrInfo; } 53 virtual const TargetFrameLowering *getFrameLowering() const 54 { return FrameLowering; } 55 virtual const MipsSubtarget *getSubtargetImpl() const 56 { return &Subtarget; } 57 virtual const TargetData *getTargetData() const 58 { return &DataLayout;} 59 virtual MipsJITInfo *getJITInfo() 60 { return &JITInfo; } 61 62 virtual const MipsRegisterInfo *getRegisterInfo() const { 63 return &InstrInfo->getRegisterInfo(); 64 } 65 66 virtual const MipsTargetLowering *getTargetLowering() const { 67 return &TLInfo; 68 } 69 70 virtual const MipsSelectionDAGInfo* getSelectionDAGInfo() const { 71 return &TSInfo; 72 } 73 74 virtual const MipsELFWriterInfo *getELFWriterInfo() const { 75 return &ELFWriterInfo; 76 } 77 78 // Pass Pipeline Configuration 79 virtual TargetPassConfig *createPassConfig(PassManagerBase &PM); 80 virtual bool addCodeEmitter(PassManagerBase &PM, JITCodeEmitter &JCE); 81}; 82 83/// MipsebTargetMachine - Mips32/64 big endian target machine. 84/// 85class MipsebTargetMachine : public MipsTargetMachine { 86 virtual void anchor(); 87public: 88 MipsebTargetMachine(const Target &T, StringRef TT, 89 StringRef CPU, StringRef FS, const TargetOptions &Options, 90 Reloc::Model RM, CodeModel::Model CM, 91 CodeGenOpt::Level OL); 92}; 93 94/// MipselTargetMachine - Mips32/64 little endian target machine. 95/// 96class MipselTargetMachine : public MipsTargetMachine { 97 virtual void anchor(); 98public: 99 MipselTargetMachine(const Target &T, StringRef TT, 100 StringRef CPU, StringRef FS, const TargetOptions &Options, 101 Reloc::Model RM, CodeModel::Model CM, 102 CodeGenOpt::Level OL); 103}; 104 105} // End llvm namespace 106 107#endif 108