NVPTXRegisterInfo.td revision cd81d94322a39503e4a3e87b6ee03d4fcb3465fb 
1//===-- NVPTXRegisterInfo.td - NVPTX Register defs ---------*- tablegen -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10//===----------------------------------------------------------------------===//
11//  Declarations that describe the PTX register file
12//===----------------------------------------------------------------------===//
13
14class NVPTXReg<string n> : Register<n> {
15  let Namespace = "NVPTX";
16}
17
18class NVPTXRegClass<list<ValueType> regTypes, int alignment, dag regList>
19     : RegisterClass <"NVPTX", regTypes, alignment, regList>;
20
21//===----------------------------------------------------------------------===//
22//  Registers
23//===----------------------------------------------------------------------===//
24
25// Special Registers used as stack pointer
26def VRFrame         : NVPTXReg<"%SP">;
27def VRFrameLocal    : NVPTXReg<"%SPL">;
28
29// Special Registers used as the stack
30def VRDepot  : NVPTXReg<"%Depot">;
31
32// We use virtual registers, but define a few physical registers here to keep
33// SDAG and the MachineInstr layers happy.
34foreach i = 0-4 in {
35  def P#i  : NVPTXReg<"%p"#i>;  // Predicate
36  def RS#i : NVPTXReg<"%rs"#i>; // 16-bit
37  def R#i  : NVPTXReg<"%r"#i>;  // 32-bit
38  def RL#i : NVPTXReg<"%rl"#i>; // 64-bit
39  def F#i  : NVPTXReg<"%f"#i>;  // 32-bit float
40  def FL#i : NVPTXReg<"%fl"#i>; // 64-bit float
41
42  // Arguments
43  def ia#i : NVPTXReg<"%ia"#i>;
44  def la#i : NVPTXReg<"%la"#i>;
45  def fa#i : NVPTXReg<"%fa"#i>;
46  def da#i : NVPTXReg<"%da"#i>;
47}
48
49foreach i = 0-31 in {
50  def ENVREG#i : NVPTXReg<"%envreg"#i>;
51}
52
53//===----------------------------------------------------------------------===//
54//  Register classes
55//===----------------------------------------------------------------------===//
56def Int1Regs : NVPTXRegClass<[i1], 8, (add (sequence "P%u", 0, 4))>;
57def Int16Regs : NVPTXRegClass<[i16], 16, (add (sequence "RS%u", 0, 4))>;
58def Int32Regs : NVPTXRegClass<[i32], 32, (add (sequence "R%u", 0, 4))>;
59def Int64Regs : NVPTXRegClass<[i64], 64, (add (sequence "RL%u", 0, 4))>;
60def Float32Regs : NVPTXRegClass<[f32], 32, (add (sequence "F%u", 0, 4))>;
61def Float64Regs : NVPTXRegClass<[f64], 64, (add (sequence "FL%u", 0, 4))>;
62def Int32ArgRegs : NVPTXRegClass<[i32], 32, (add (sequence "ia%u", 0, 4))>;
63def Int64ArgRegs : NVPTXRegClass<[i64], 64, (add (sequence "la%u", 0, 4))>;
64def Float32ArgRegs : NVPTXRegClass<[f32], 32, (add (sequence "fa%u", 0, 4))>;
65def Float64ArgRegs : NVPTXRegClass<[f64], 64, (add (sequence "da%u", 0, 4))>;
66
67// Read NVPTXRegisterInfo.cpp to see how VRFrame and VRDepot are used.
68def SpecialRegs : NVPTXRegClass<[i32], 32, (add VRFrame, VRDepot,
69                                            (sequence "ENVREG%u", 0, 31))>;
70