PPCAsmBackend.cpp revision 36b56886974eae4f9c5ebc96befd3e7bfe5de338 
1//===-- PPCAsmBackend.cpp - PPC Assembler Backend -------------------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10#include "MCTargetDesc/PPCMCTargetDesc.h"
11#include "MCTargetDesc/PPCFixupKinds.h"
12#include "llvm/MC/MCAsmBackend.h"
13#include "llvm/MC/MCELFObjectWriter.h"
14#include "llvm/MC/MCFixupKindInfo.h"
15#include "llvm/MC/MCMachObjectWriter.h"
16#include "llvm/MC/MCObjectWriter.h"
17#include "llvm/MC/MCSectionMachO.h"
18#include "llvm/MC/MCValue.h"
19#include "llvm/Support/ELF.h"
20#include "llvm/Support/ErrorHandling.h"
21#include "llvm/Support/MachO.h"
22#include "llvm/Support/TargetRegistry.h"
23using namespace llvm;
24
25static uint64_t adjustFixupValue(unsigned Kind, uint64_t Value) {
26  switch (Kind) {
27  default:
28    llvm_unreachable("Unknown fixup kind!");
29  case FK_Data_1:
30  case FK_Data_2:
31  case FK_Data_4:
32  case FK_Data_8:
33  case PPC::fixup_ppc_nofixup:
34    return Value;
35  case PPC::fixup_ppc_brcond14:
36  case PPC::fixup_ppc_brcond14abs:
37    return Value & 0xfffc;
38  case PPC::fixup_ppc_br24:
39  case PPC::fixup_ppc_br24abs:
40    return Value & 0x3fffffc;
41  case PPC::fixup_ppc_half16:
42    return Value & 0xffff;
43  case PPC::fixup_ppc_half16ds:
44    return Value & 0xfffc;
45  }
46}
47
48static unsigned getFixupKindNumBytes(unsigned Kind) {
49  switch (Kind) {
50  default:
51    llvm_unreachable("Unknown fixup kind!");
52  case FK_Data_1:
53    return 1;
54  case FK_Data_2:
55  case PPC::fixup_ppc_half16:
56  case PPC::fixup_ppc_half16ds:
57    return 2;
58  case FK_Data_4:
59  case PPC::fixup_ppc_brcond14:
60  case PPC::fixup_ppc_brcond14abs:
61  case PPC::fixup_ppc_br24:
62  case PPC::fixup_ppc_br24abs:
63    return 4;
64  case FK_Data_8:
65    return 8;
66  case PPC::fixup_ppc_nofixup:
67    return 0;
68  }
69}
70
71namespace {
72
73class PPCAsmBackend : public MCAsmBackend {
74  const Target &TheTarget;
75  bool IsLittleEndian;
76public:
77  PPCAsmBackend(const Target &T, bool isLittle) : MCAsmBackend(), TheTarget(T),
78    IsLittleEndian(isLittle) {}
79
80  unsigned getNumFixupKinds() const { return PPC::NumTargetFixupKinds; }
81
82  const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const {
83    const static MCFixupKindInfo InfosBE[PPC::NumTargetFixupKinds] = {
84      // name                    offset  bits  flags
85      { "fixup_ppc_br24",        6,      24,   MCFixupKindInfo::FKF_IsPCRel },
86      { "fixup_ppc_brcond14",    16,     14,   MCFixupKindInfo::FKF_IsPCRel },
87      { "fixup_ppc_br24abs",     6,      24,   0 },
88      { "fixup_ppc_brcond14abs", 16,     14,   0 },
89      { "fixup_ppc_half16",       0,     16,   0 },
90      { "fixup_ppc_half16ds",     0,     14,   0 },
91      { "fixup_ppc_nofixup",      0,      0,   0 }
92    };
93    const static MCFixupKindInfo InfosLE[PPC::NumTargetFixupKinds] = {
94      // name                    offset  bits  flags
95      { "fixup_ppc_br24",        2,      24,   MCFixupKindInfo::FKF_IsPCRel },
96      { "fixup_ppc_brcond14",    2,      14,   MCFixupKindInfo::FKF_IsPCRel },
97      { "fixup_ppc_br24abs",     2,      24,   0 },
98      { "fixup_ppc_brcond14abs", 2,      14,   0 },
99      { "fixup_ppc_half16",      0,      16,   0 },
100      { "fixup_ppc_half16ds",    2,      14,   0 },
101      { "fixup_ppc_nofixup",     0,       0,   0 }
102    };
103
104    if (Kind < FirstTargetFixupKind)
105      return MCAsmBackend::getFixupKindInfo(Kind);
106
107    assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() &&
108           "Invalid kind!");
109    return (IsLittleEndian? InfosLE : InfosBE)[Kind - FirstTargetFixupKind];
110  }
111
112  void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
113                  uint64_t Value, bool IsPCRel) const {
114    Value = adjustFixupValue(Fixup.getKind(), Value);
115    if (!Value) return;           // Doesn't change encoding.
116
117    unsigned Offset = Fixup.getOffset();
118    unsigned NumBytes = getFixupKindNumBytes(Fixup.getKind());
119
120    // For each byte of the fragment that the fixup touches, mask in the bits
121    // from the fixup value. The Value has been "split up" into the appropriate
122    // bitfields above.
123    for (unsigned i = 0; i != NumBytes; ++i) {
124      unsigned Idx = IsLittleEndian ? i : (NumBytes - 1 - i);
125      Data[Offset + i] |= uint8_t((Value >> (Idx * 8)) & 0xff);
126    }
127  }
128
129  bool mayNeedRelaxation(const MCInst &Inst) const {
130    // FIXME.
131    return false;
132  }
133
134  bool fixupNeedsRelaxation(const MCFixup &Fixup,
135                            uint64_t Value,
136                            const MCRelaxableFragment *DF,
137                            const MCAsmLayout &Layout) const {
138    // FIXME.
139    llvm_unreachable("relaxInstruction() unimplemented");
140  }
141
142
143  void relaxInstruction(const MCInst &Inst, MCInst &Res) const {
144    // FIXME.
145    llvm_unreachable("relaxInstruction() unimplemented");
146  }
147
148  bool writeNopData(uint64_t Count, MCObjectWriter *OW) const {
149    uint64_t NumNops = Count / 4;
150    for (uint64_t i = 0; i != NumNops; ++i)
151      OW->Write32(0x60000000);
152
153    switch (Count % 4) {
154    default: break; // No leftover bytes to write
155    case 1: OW->Write8(0); break;
156    case 2: OW->Write16(0); break;
157    case 3: OW->Write16(0); OW->Write8(0); break;
158    }
159
160    return true;
161  }
162
163  unsigned getPointerSize() const {
164    StringRef Name = TheTarget.getName();
165    if (Name == "ppc64" || Name == "ppc64le") return 8;
166    assert(Name == "ppc32" && "Unknown target name!");
167    return 4;
168  }
169
170  bool isLittleEndian() const {
171    return IsLittleEndian;
172  }
173};
174} // end anonymous namespace
175
176
177// FIXME: This should be in a separate file.
178namespace {
179  class DarwinPPCAsmBackend : public PPCAsmBackend {
180  public:
181    DarwinPPCAsmBackend(const Target &T) : PPCAsmBackend(T, false) { }
182
183    MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
184      bool is64 = getPointerSize() == 8;
185      return createPPCMachObjectWriter(
186          OS,
187          /*Is64Bit=*/is64,
188          (is64 ? MachO::CPU_TYPE_POWERPC64 : MachO::CPU_TYPE_POWERPC),
189          MachO::CPU_SUBTYPE_POWERPC_ALL);
190    }
191  };
192
193  class ELFPPCAsmBackend : public PPCAsmBackend {
194    uint8_t OSABI;
195  public:
196    ELFPPCAsmBackend(const Target &T, bool IsLittleEndian, uint8_t OSABI) :
197      PPCAsmBackend(T, IsLittleEndian), OSABI(OSABI) { }
198
199
200    MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
201      bool is64 = getPointerSize() == 8;
202      return createPPCELFObjectWriter(OS, is64, isLittleEndian(), OSABI);
203    }
204  };
205
206} // end anonymous namespace
207
208MCAsmBackend *llvm::createPPCAsmBackend(const Target &T,
209                                        const MCRegisterInfo &MRI,
210                                        StringRef TT, StringRef CPU) {
211  if (Triple(TT).isOSDarwin())
212    return new DarwinPPCAsmBackend(T);
213
214  uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(Triple(TT).getOS());
215  bool IsLittleEndian = Triple(TT).getArch() == Triple::ppc64le;
216  return new ELFPPCAsmBackend(T, IsLittleEndian, OSABI);
217}
218