PPCMCTargetDesc.cpp revision 36b56886974eae4f9c5ebc96befd3e7bfe5de338 
1//===-- PPCMCTargetDesc.cpp - PowerPC Target Descriptions -----------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file provides PowerPC specific target descriptions.
11//
12//===----------------------------------------------------------------------===//
13
14#include "PPCMCTargetDesc.h"
15#include "InstPrinter/PPCInstPrinter.h"
16#include "PPCMCAsmInfo.h"
17#include "PPCTargetStreamer.h"
18#include "llvm/MC/MCCodeGenInfo.h"
19#include "llvm/MC/MCInstrInfo.h"
20#include "llvm/MC/MCRegisterInfo.h"
21#include "llvm/MC/MCStreamer.h"
22#include "llvm/MC/MCSubtargetInfo.h"
23#include "llvm/MC/MCSymbol.h"
24#include "llvm/MC/MachineLocation.h"
25#include "llvm/Support/ErrorHandling.h"
26#include "llvm/Support/FormattedStream.h"
27#include "llvm/Support/TargetRegistry.h"
28
29#define GET_INSTRINFO_MC_DESC
30#include "PPCGenInstrInfo.inc"
31
32#define GET_SUBTARGETINFO_MC_DESC
33#include "PPCGenSubtargetInfo.inc"
34
35#define GET_REGINFO_MC_DESC
36#include "PPCGenRegisterInfo.inc"
37
38using namespace llvm;
39
40// Pin the vtable to this file.
41PPCTargetStreamer::~PPCTargetStreamer() {}
42PPCTargetStreamer::PPCTargetStreamer(MCStreamer &S) : MCTargetStreamer(S) {}
43
44static MCInstrInfo *createPPCMCInstrInfo() {
45  MCInstrInfo *X = new MCInstrInfo();
46  InitPPCMCInstrInfo(X);
47  return X;
48}
49
50static MCRegisterInfo *createPPCMCRegisterInfo(StringRef TT) {
51  Triple TheTriple(TT);
52  bool isPPC64 = (TheTriple.getArch() == Triple::ppc64 ||
53                  TheTriple.getArch() == Triple::ppc64le);
54  unsigned Flavour = isPPC64 ? 0 : 1;
55  unsigned RA = isPPC64 ? PPC::LR8 : PPC::LR;
56
57  MCRegisterInfo *X = new MCRegisterInfo();
58  InitPPCMCRegisterInfo(X, RA, Flavour, Flavour);
59  return X;
60}
61
62static MCSubtargetInfo *createPPCMCSubtargetInfo(StringRef TT, StringRef CPU,
63                                                 StringRef FS) {
64  MCSubtargetInfo *X = new MCSubtargetInfo();
65  InitPPCMCSubtargetInfo(X, TT, CPU, FS);
66  return X;
67}
68
69static MCAsmInfo *createPPCMCAsmInfo(const MCRegisterInfo &MRI, StringRef TT) {
70  Triple TheTriple(TT);
71  bool isPPC64 = (TheTriple.getArch() == Triple::ppc64 ||
72                  TheTriple.getArch() == Triple::ppc64le);
73
74  MCAsmInfo *MAI;
75  if (TheTriple.isOSDarwin())
76    MAI = new PPCMCAsmInfoDarwin(isPPC64, TheTriple);
77  else
78    MAI = new PPCLinuxMCAsmInfo(isPPC64, TheTriple);
79
80  // Initial state of the frame pointer is R1.
81  unsigned Reg = isPPC64 ? PPC::X1 : PPC::R1;
82  MCCFIInstruction Inst =
83      MCCFIInstruction::createDefCfa(0, MRI.getDwarfRegNum(Reg, true), 0);
84  MAI->addInitialFrameState(Inst);
85
86  return MAI;
87}
88
89static MCCodeGenInfo *createPPCMCCodeGenInfo(StringRef TT, Reloc::Model RM,
90                                             CodeModel::Model CM,
91                                             CodeGenOpt::Level OL) {
92  MCCodeGenInfo *X = new MCCodeGenInfo();
93
94  if (RM == Reloc::Default) {
95    Triple T(TT);
96    if (T.isOSDarwin())
97      RM = Reloc::DynamicNoPIC;
98    else
99      RM = Reloc::Static;
100  }
101  if (CM == CodeModel::Default) {
102    Triple T(TT);
103    if (!T.isOSDarwin() &&
104        (T.getArch() == Triple::ppc64 || T.getArch() == Triple::ppc64le))
105      CM = CodeModel::Medium;
106  }
107  X->InitMCCodeGenInfo(RM, CM, OL);
108  return X;
109}
110
111namespace {
112class PPCTargetAsmStreamer : public PPCTargetStreamer {
113  formatted_raw_ostream &OS;
114
115public:
116  PPCTargetAsmStreamer(MCStreamer &S, formatted_raw_ostream &OS)
117      : PPCTargetStreamer(S), OS(OS) {}
118  virtual void emitTCEntry(const MCSymbol &S) {
119    OS << "\t.tc ";
120    OS << S.getName();
121    OS << "[TC],";
122    OS << S.getName();
123    OS << '\n';
124  }
125  virtual void emitMachine(StringRef CPU) {
126    OS << "\t.machine " << CPU << '\n';
127  }
128};
129
130class PPCTargetELFStreamer : public PPCTargetStreamer {
131public:
132  PPCTargetELFStreamer(MCStreamer &S) : PPCTargetStreamer(S) {}
133  virtual void emitTCEntry(const MCSymbol &S) {
134    // Creates a R_PPC64_TOC relocation
135    Streamer.EmitSymbolValue(&S, 8);
136  }
137  virtual void emitMachine(StringRef CPU) {
138    // FIXME: Is there anything to do in here or does this directive only
139    // limit the parser?
140  }
141};
142
143class PPCTargetMachOStreamer : public PPCTargetStreamer {
144public:
145  PPCTargetMachOStreamer(MCStreamer &S) : PPCTargetStreamer(S) {}
146  virtual void emitTCEntry(const MCSymbol &S) {
147    llvm_unreachable("Unknown pseudo-op: .tc");
148  }
149  virtual void emitMachine(StringRef CPU) {
150    // FIXME: We should update the CPUType, CPUSubType in the Object file if
151    // the new values are different from the defaults.
152  }
153};
154}
155
156// This is duplicated code. Refactor this.
157static MCStreamer *createMCStreamer(const Target &T, StringRef TT,
158                                    MCContext &Ctx, MCAsmBackend &MAB,
159                                    raw_ostream &OS,
160                                    MCCodeEmitter *Emitter,
161                                    const MCSubtargetInfo &STI,
162                                    bool RelaxAll,
163                                    bool NoExecStack) {
164  if (Triple(TT).isOSDarwin()) {
165    MCStreamer *S = createMachOStreamer(Ctx, MAB, OS, Emitter, RelaxAll);
166    new PPCTargetMachOStreamer(*S);
167    return S;
168  }
169
170  MCStreamer *S =
171      createELFStreamer(Ctx, MAB, OS, Emitter, RelaxAll, NoExecStack);
172  new PPCTargetELFStreamer(*S);
173  return S;
174}
175
176static MCStreamer *
177createMCAsmStreamer(MCContext &Ctx, formatted_raw_ostream &OS,
178                    bool isVerboseAsm, bool useCFI, bool useDwarfDirectory,
179                    MCInstPrinter *InstPrint, MCCodeEmitter *CE,
180                    MCAsmBackend *TAB, bool ShowInst) {
181
182  MCStreamer *S =
183      llvm::createAsmStreamer(Ctx, OS, isVerboseAsm, useCFI, useDwarfDirectory,
184                              InstPrint, CE, TAB, ShowInst);
185  new PPCTargetAsmStreamer(*S, OS);
186  return S;
187}
188
189static MCInstPrinter *createPPCMCInstPrinter(const Target &T,
190                                             unsigned SyntaxVariant,
191                                             const MCAsmInfo &MAI,
192                                             const MCInstrInfo &MII,
193                                             const MCRegisterInfo &MRI,
194                                             const MCSubtargetInfo &STI) {
195  bool isDarwin = Triple(STI.getTargetTriple()).isOSDarwin();
196  return new PPCInstPrinter(MAI, MII, MRI, isDarwin);
197}
198
199extern "C" void LLVMInitializePowerPCTargetMC() {
200  // Register the MC asm info.
201  RegisterMCAsmInfoFn C(ThePPC32Target, createPPCMCAsmInfo);
202  RegisterMCAsmInfoFn D(ThePPC64Target, createPPCMCAsmInfo);
203  RegisterMCAsmInfoFn E(ThePPC64LETarget, createPPCMCAsmInfo);
204
205  // Register the MC codegen info.
206  TargetRegistry::RegisterMCCodeGenInfo(ThePPC32Target, createPPCMCCodeGenInfo);
207  TargetRegistry::RegisterMCCodeGenInfo(ThePPC64Target, createPPCMCCodeGenInfo);
208  TargetRegistry::RegisterMCCodeGenInfo(ThePPC64LETarget,
209                                        createPPCMCCodeGenInfo);
210
211  // Register the MC instruction info.
212  TargetRegistry::RegisterMCInstrInfo(ThePPC32Target, createPPCMCInstrInfo);
213  TargetRegistry::RegisterMCInstrInfo(ThePPC64Target, createPPCMCInstrInfo);
214  TargetRegistry::RegisterMCInstrInfo(ThePPC64LETarget,
215                                      createPPCMCInstrInfo);
216
217  // Register the MC register info.
218  TargetRegistry::RegisterMCRegInfo(ThePPC32Target, createPPCMCRegisterInfo);
219  TargetRegistry::RegisterMCRegInfo(ThePPC64Target, createPPCMCRegisterInfo);
220  TargetRegistry::RegisterMCRegInfo(ThePPC64LETarget, createPPCMCRegisterInfo);
221
222  // Register the MC subtarget info.
223  TargetRegistry::RegisterMCSubtargetInfo(ThePPC32Target,
224                                          createPPCMCSubtargetInfo);
225  TargetRegistry::RegisterMCSubtargetInfo(ThePPC64Target,
226                                          createPPCMCSubtargetInfo);
227  TargetRegistry::RegisterMCSubtargetInfo(ThePPC64LETarget,
228                                          createPPCMCSubtargetInfo);
229
230  // Register the MC Code Emitter
231  TargetRegistry::RegisterMCCodeEmitter(ThePPC32Target, createPPCMCCodeEmitter);
232  TargetRegistry::RegisterMCCodeEmitter(ThePPC64Target, createPPCMCCodeEmitter);
233  TargetRegistry::RegisterMCCodeEmitter(ThePPC64LETarget,
234                                        createPPCMCCodeEmitter);
235
236    // Register the asm backend.
237  TargetRegistry::RegisterMCAsmBackend(ThePPC32Target, createPPCAsmBackend);
238  TargetRegistry::RegisterMCAsmBackend(ThePPC64Target, createPPCAsmBackend);
239  TargetRegistry::RegisterMCAsmBackend(ThePPC64LETarget, createPPCAsmBackend);
240
241  // Register the object streamer.
242  TargetRegistry::RegisterMCObjectStreamer(ThePPC32Target, createMCStreamer);
243  TargetRegistry::RegisterMCObjectStreamer(ThePPC64Target, createMCStreamer);
244  TargetRegistry::RegisterMCObjectStreamer(ThePPC64LETarget, createMCStreamer);
245
246  // Register the asm streamer.
247  TargetRegistry::RegisterAsmStreamer(ThePPC32Target, createMCAsmStreamer);
248  TargetRegistry::RegisterAsmStreamer(ThePPC64Target, createMCAsmStreamer);
249  TargetRegistry::RegisterAsmStreamer(ThePPC64LETarget, createMCAsmStreamer);
250
251  // Register the MCInstPrinter.
252  TargetRegistry::RegisterMCInstPrinter(ThePPC32Target, createPPCMCInstPrinter);
253  TargetRegistry::RegisterMCInstPrinter(ThePPC64Target, createPPCMCInstPrinter);
254  TargetRegistry::RegisterMCInstPrinter(ThePPC64LETarget,
255                                        createPPCMCInstPrinter);
256}
257