1//===-- PPCPredicates.h - PPC Branch Predicate Information ------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file describes the PowerPC branch predicates.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_TARGET_POWERPC_PPCPREDICATES_H
15#define LLVM_TARGET_POWERPC_PPCPREDICATES_H
16
17// GCC #defines PPC on Linux but we use it as our namespace name
18#undef PPC
19
20// Generated files will use "namespace PPC". To avoid symbol clash,
21// undefine PPC here. PPC may be predefined on some hosts.
22#undef PPC
23
24namespace llvm {
25namespace PPC {
26  /// Predicate - These are "(BI << 5) | BO"  for various predicates.
27  enum Predicate {
28    PRED_LT       = (0 << 5) | 12,
29    PRED_LE       = (1 << 5) |  4,
30    PRED_EQ       = (2 << 5) | 12,
31    PRED_GE       = (0 << 5) |  4,
32    PRED_GT       = (1 << 5) | 12,
33    PRED_NE       = (2 << 5) |  4,
34    PRED_UN       = (3 << 5) | 12,
35    PRED_NU       = (3 << 5) |  4,
36    PRED_LT_MINUS = (0 << 5) | 14,
37    PRED_LE_MINUS = (1 << 5) |  6,
38    PRED_EQ_MINUS = (2 << 5) | 14,
39    PRED_GE_MINUS = (0 << 5) |  6,
40    PRED_GT_MINUS = (1 << 5) | 14,
41    PRED_NE_MINUS = (2 << 5) |  6,
42    PRED_UN_MINUS = (3 << 5) | 14,
43    PRED_NU_MINUS = (3 << 5) |  6,
44    PRED_LT_PLUS  = (0 << 5) | 15,
45    PRED_LE_PLUS  = (1 << 5) |  7,
46    PRED_EQ_PLUS  = (2 << 5) | 15,
47    PRED_GE_PLUS  = (0 << 5) |  7,
48    PRED_GT_PLUS  = (1 << 5) | 15,
49    PRED_NE_PLUS  = (2 << 5) |  7,
50    PRED_UN_PLUS  = (3 << 5) | 15,
51    PRED_NU_PLUS  = (3 << 5) |  7,
52
53    // When dealing with individual condition-register bits, we have simple set
54    // and unset predicates.
55    PRED_BIT_SET =   1024,
56    PRED_BIT_UNSET = 1025
57  };
58
59  /// Invert the specified predicate.  != -> ==, < -> >=.
60  Predicate InvertPredicate(Predicate Opcode);
61
62  /// Assume the condition register is set by MI(a,b), return the predicate if
63  /// we modify the instructions such that condition register is set by MI(b,a).
64  Predicate getSwappedPredicate(Predicate Opcode);
65}
66}
67
68#endif
69