PPCCodeEmitter.cpp revision 165b60de0b4a17e7d270e63fd4223b6c1c318fdd
1//===-- PPCCodeEmitter.cpp - JIT Code Emitter for PowerPC32 -------*- C++ -*-=// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file defines the PowerPC 32-bit CodeEmitter and associated machinery to 11// JIT-compile bitcode to native PowerPC. 12// 13//===----------------------------------------------------------------------===// 14 15#include "PPCTargetMachine.h" 16#include "PPCRelocations.h" 17#include "PPC.h" 18#include "llvm/Module.h" 19#include "llvm/PassManager.h" 20#include "llvm/CodeGen/MachineCodeEmitter.h" 21#include "llvm/CodeGen/MachineFunctionPass.h" 22#include "llvm/CodeGen/MachineInstrBuilder.h" 23#include "llvm/CodeGen/Passes.h" 24#include "llvm/Support/Debug.h" 25#include "llvm/Support/Compiler.h" 26#include "llvm/Target/TargetOptions.h" 27using namespace llvm; 28 29namespace { 30 class VISIBILITY_HIDDEN PPCCodeEmitter : public MachineFunctionPass { 31 TargetMachine &TM; 32 MachineCodeEmitter &MCE; 33 34 /// MovePCtoLROffset - When/if we see a MovePCtoLR instruction, we record 35 /// its address in the function into this pointer. 36 void *MovePCtoLROffset; 37 38 /// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr 39 /// 40 int getMachineOpValue(MachineInstr &MI, MachineOperand &MO); 41 42 public: 43 static char ID; 44 PPCCodeEmitter(TargetMachine &T, MachineCodeEmitter &M) 45 : MachineFunctionPass((intptr_t)&ID), TM(T), MCE(M) {} 46 47 const char *getPassName() const { return "PowerPC Machine Code Emitter"; } 48 49 /// runOnMachineFunction - emits the given MachineFunction to memory 50 /// 51 bool runOnMachineFunction(MachineFunction &MF); 52 53 /// emitBasicBlock - emits the given MachineBasicBlock to memory 54 /// 55 void emitBasicBlock(MachineBasicBlock &MBB); 56 57 /// getValueBit - return the particular bit of Val 58 /// 59 unsigned getValueBit(int64_t Val, unsigned bit) { return (Val >> bit) & 1; } 60 61 /// getBinaryCodeForInstr - This function, generated by the 62 /// CodeEmitterGenerator using TableGen, produces the binary encoding for 63 /// machine instructions. 64 /// 65 unsigned getBinaryCodeForInstr(MachineInstr &MI); 66 }; 67 char PPCCodeEmitter::ID = 0; 68} 69 70/// createPPCCodeEmitterPass - Return a pass that emits the collected PPC code 71/// to the specified MCE object. 72FunctionPass *llvm::createPPCCodeEmitterPass(PPCTargetMachine &TM, 73 MachineCodeEmitter &MCE) { 74 return new PPCCodeEmitter(TM, MCE); 75} 76 77#ifdef __APPLE__ 78extern "C" void sys_icache_invalidate(const void *Addr, size_t len); 79#endif 80 81bool PPCCodeEmitter::runOnMachineFunction(MachineFunction &MF) { 82 assert((MF.getTarget().getRelocationModel() != Reloc::Default || 83 MF.getTarget().getRelocationModel() != Reloc::Static) && 84 "JIT relocation model must be set to static or default!"); 85 do { 86 MovePCtoLROffset = 0; 87 MCE.startFunction(MF); 88 for (MachineFunction::iterator BB = MF.begin(), E = MF.end(); BB != E; ++BB) 89 emitBasicBlock(*BB); 90 } while (MCE.finishFunction(MF)); 91 92 return false; 93} 94 95void PPCCodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) { 96 MCE.StartMachineBasicBlock(&MBB); 97 98 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I){ 99 MachineInstr &MI = *I; 100 switch (MI.getOpcode()) { 101 default: 102 MCE.emitWordBE(getBinaryCodeForInstr(*I)); 103 break; 104 case PPC::IMPLICIT_DEF_GPRC: 105 case PPC::IMPLICIT_DEF_G8RC: 106 case PPC::IMPLICIT_DEF_F8: 107 case PPC::IMPLICIT_DEF_F4: 108 case PPC::IMPLICIT_DEF_VRRC: 109 break; // pseudo opcode, no side effects 110 case PPC::MovePCtoLR: 111 case PPC::MovePCtoLR8: 112 assert(TM.getRelocationModel() == Reloc::PIC_); 113 MovePCtoLROffset = (void*)MCE.getCurrentPCValue(); 114 MCE.emitWordBE(0x48000005); // bl 1 115 break; 116 } 117 } 118} 119 120int PPCCodeEmitter::getMachineOpValue(MachineInstr &MI, MachineOperand &MO) { 121 122 intptr_t rv = 0; // Return value; defaults to 0 for unhandled cases 123 // or things that get fixed up later by the JIT. 124 if (MO.isRegister()) { 125 rv = PPCRegisterInfo::getRegisterNumbering(MO.getReg()); 126 127 // Special encoding for MTCRF and MFOCRF, which uses a bit mask for the 128 // register, not the register number directly. 129 if ((MI.getOpcode() == PPC::MTCRF || MI.getOpcode() == PPC::MFOCRF) && 130 (MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC::CR7)) { 131 rv = 0x80 >> rv; 132 } 133 } else if (MO.isImmediate()) { 134 rv = MO.getImm(); 135 } else if (MO.isGlobalAddress() || MO.isExternalSymbol() || 136 MO.isConstantPoolIndex() || MO.isJumpTableIndex()) { 137 unsigned Reloc = 0; 138 if (MI.getOpcode() == PPC::BL_Macho || MI.getOpcode() == PPC::BL8_Macho || 139 MI.getOpcode() == PPC::BL_ELF || MI.getOpcode() == PPC::BL8_ELF) 140 Reloc = PPC::reloc_pcrel_bx; 141 else { 142 if (TM.getRelocationModel() == Reloc::PIC_) { 143 assert(MovePCtoLROffset && "MovePCtoLR not seen yet?"); 144 } 145 switch (MI.getOpcode()) { 146 default: MI.dump(); assert(0 && "Unknown instruction for relocation!"); 147 case PPC::LIS: 148 case PPC::LIS8: 149 case PPC::ADDIS: 150 case PPC::ADDIS8: 151 Reloc = PPC::reloc_absolute_high; // Pointer to symbol 152 break; 153 case PPC::LI: 154 case PPC::LI8: 155 case PPC::LA: 156 // Loads. 157 case PPC::LBZ: 158 case PPC::LBZ8: 159 case PPC::LHA: 160 case PPC::LHA8: 161 case PPC::LHZ: 162 case PPC::LHZ8: 163 case PPC::LWZ: 164 case PPC::LWZ8: 165 case PPC::LFS: 166 case PPC::LFD: 167 168 // Stores. 169 case PPC::STB: 170 case PPC::STB8: 171 case PPC::STH: 172 case PPC::STH8: 173 case PPC::STW: 174 case PPC::STW8: 175 case PPC::STFS: 176 case PPC::STFD: 177 Reloc = PPC::reloc_absolute_low; 178 break; 179 180 case PPC::LWA: 181 case PPC::LD: 182 case PPC::STD: 183 case PPC::STD_32: 184 Reloc = PPC::reloc_absolute_low_ix; 185 break; 186 } 187 } 188 189 MachineRelocation R; 190 if (MO.isGlobalAddress()) { 191 R = MachineRelocation::getGV(MCE.getCurrentPCOffset(), Reloc, 192 MO.getGlobal(), 0, 193 isa<Function>(MO.getGlobal())); 194 } else if (MO.isExternalSymbol()) { 195 R = MachineRelocation::getExtSym(MCE.getCurrentPCOffset(), 196 Reloc, MO.getSymbolName(), 0); 197 } else if (MO.isConstantPoolIndex()) { 198 R = MachineRelocation::getConstPool(MCE.getCurrentPCOffset(), 199 Reloc, MO.getIndex(), 0); 200 } else { 201 assert(MO.isJumpTableIndex()); 202 R = MachineRelocation::getJumpTable(MCE.getCurrentPCOffset(), 203 Reloc, MO.getIndex(), 0); 204 } 205 206 // If in PIC mode, we need to encode the negated address of the 207 // 'movepctolr' into the unrelocated field. After relocation, we'll have 208 // &gv-&movepctolr-4 in the imm field. Once &movepctolr is added to the imm 209 // field, we get &gv. This doesn't happen for branch relocations, which are 210 // always implicitly pc relative. 211 if (TM.getRelocationModel() == Reloc::PIC_ && Reloc != PPC::reloc_pcrel_bx){ 212 assert(MovePCtoLROffset && "MovePCtoLR not seen yet?"); 213 R.setConstantVal(-(intptr_t)MovePCtoLROffset - 4); 214 } 215 MCE.addRelocation(R); 216 217 } else if (MO.isMachineBasicBlock()) { 218 unsigned Reloc = 0; 219 unsigned Opcode = MI.getOpcode(); 220 if (Opcode == PPC::B || Opcode == PPC::BL_Macho || 221 Opcode == PPC::BLA_Macho || Opcode == PPC::BL_ELF || 222 Opcode == PPC::BLA_ELF) 223 Reloc = PPC::reloc_pcrel_bx; 224 else // BCC instruction 225 Reloc = PPC::reloc_pcrel_bcx; 226 MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(), 227 Reloc, MO.getMBB())); 228 } else { 229 cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n"; 230 abort(); 231 } 232 233 return rv; 234} 235 236#include "PPCGenCodeEmitter.inc" 237 238