PPCCodeEmitter.cpp revision d18330763965745fea05536939f5aadffcc6a5a6
1//===-- PPCCodeEmitter.cpp - JIT Code Emitter for PowerPC32 -------*- C++ -*-=// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file defines the PowerPC 32-bit CodeEmitter and associated machinery to 11// JIT-compile bitcode to native PowerPC. 12// 13//===----------------------------------------------------------------------===// 14 15#include "PPCTargetMachine.h" 16#include "PPCRelocations.h" 17#include "PPC.h" 18#include "llvm/Module.h" 19#include "llvm/PassManager.h" 20#include "llvm/CodeGen/MachineCodeEmitter.h" 21#include "llvm/CodeGen/MachineFunctionPass.h" 22#include "llvm/CodeGen/MachineInstrBuilder.h" 23#include "llvm/CodeGen/MachineModuleInfo.h" 24#include "llvm/CodeGen/Passes.h" 25#include "llvm/Support/Debug.h" 26#include "llvm/Support/Compiler.h" 27#include "llvm/Target/TargetOptions.h" 28using namespace llvm; 29 30namespace { 31 class VISIBILITY_HIDDEN PPCCodeEmitter : public MachineFunctionPass { 32 TargetMachine &TM; 33 MachineCodeEmitter &MCE; 34 35 /// MovePCtoLROffset - When/if we see a MovePCtoLR instruction, we record 36 /// its address in the function into this pointer. 37 void *MovePCtoLROffset; 38 39 /// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr 40 /// 41 int getMachineOpValue(MachineInstr &MI, MachineOperand &MO); 42 43 void getAnalysisUsage(AnalysisUsage &AU) const { 44 AU.addRequired<MachineModuleInfo>(); 45 MachineFunctionPass::getAnalysisUsage(AU); 46 } 47 48 public: 49 static char ID; 50 PPCCodeEmitter(TargetMachine &T, MachineCodeEmitter &M) 51 : MachineFunctionPass((intptr_t)&ID), TM(T), MCE(M) {} 52 53 const char *getPassName() const { return "PowerPC Machine Code Emitter"; } 54 55 /// runOnMachineFunction - emits the given MachineFunction to memory 56 /// 57 bool runOnMachineFunction(MachineFunction &MF); 58 59 /// emitBasicBlock - emits the given MachineBasicBlock to memory 60 /// 61 void emitBasicBlock(MachineBasicBlock &MBB); 62 63 /// getValueBit - return the particular bit of Val 64 /// 65 unsigned getValueBit(int64_t Val, unsigned bit) { return (Val >> bit) & 1; } 66 67 /// getBinaryCodeForInstr - This function, generated by the 68 /// CodeEmitterGenerator using TableGen, produces the binary encoding for 69 /// machine instructions. 70 /// 71 unsigned getBinaryCodeForInstr(MachineInstr &MI); 72 }; 73 char PPCCodeEmitter::ID = 0; 74} 75 76/// createPPCCodeEmitterPass - Return a pass that emits the collected PPC code 77/// to the specified MCE object. 78FunctionPass *llvm::createPPCCodeEmitterPass(PPCTargetMachine &TM, 79 MachineCodeEmitter &MCE) { 80 return new PPCCodeEmitter(TM, MCE); 81} 82 83#ifdef __APPLE__ 84extern "C" void sys_icache_invalidate(const void *Addr, size_t len); 85#endif 86 87bool PPCCodeEmitter::runOnMachineFunction(MachineFunction &MF) { 88 assert((MF.getTarget().getRelocationModel() != Reloc::Default || 89 MF.getTarget().getRelocationModel() != Reloc::Static) && 90 "JIT relocation model must be set to static or default!"); 91 92 MCE.setModuleInfo(&getAnalysis<MachineModuleInfo>()); 93 do { 94 MovePCtoLROffset = 0; 95 MCE.startFunction(MF); 96 for (MachineFunction::iterator BB = MF.begin(), E = MF.end(); BB != E; ++BB) 97 emitBasicBlock(*BB); 98 } while (MCE.finishFunction(MF)); 99 100 return false; 101} 102 103void PPCCodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) { 104 MCE.StartMachineBasicBlock(&MBB); 105 106 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I){ 107 MachineInstr &MI = *I; 108 switch (MI.getOpcode()) { 109 default: 110 MCE.emitWordBE(getBinaryCodeForInstr(*I)); 111 break; 112 case TargetInstrInfo::LABEL: 113 MCE.emitLabel(MI.getOperand(0).getImm()); 114 break; 115 case TargetInstrInfo::IMPLICIT_DEF: 116 break; // pseudo opcode, no side effects 117 case PPC::MovePCtoLR: 118 case PPC::MovePCtoLR8: 119 assert(TM.getRelocationModel() == Reloc::PIC_); 120 MovePCtoLROffset = (void*)MCE.getCurrentPCValue(); 121 MCE.emitWordBE(0x48000005); // bl 1 122 break; 123 } 124 } 125} 126 127int PPCCodeEmitter::getMachineOpValue(MachineInstr &MI, MachineOperand &MO) { 128 129 intptr_t rv = 0; // Return value; defaults to 0 for unhandled cases 130 // or things that get fixed up later by the JIT. 131 if (MO.isRegister()) { 132 rv = PPCRegisterInfo::getRegisterNumbering(MO.getReg()); 133 134 // Special encoding for MTCRF and MFOCRF, which uses a bit mask for the 135 // register, not the register number directly. 136 if ((MI.getOpcode() == PPC::MTCRF || MI.getOpcode() == PPC::MFOCRF) && 137 (MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC::CR7)) { 138 rv = 0x80 >> rv; 139 } 140 } else if (MO.isImmediate()) { 141 rv = MO.getImm(); 142 } else if (MO.isGlobalAddress() || MO.isExternalSymbol() || 143 MO.isConstantPoolIndex() || MO.isJumpTableIndex()) { 144 unsigned Reloc = 0; 145 if (MI.getOpcode() == PPC::BL_Macho || MI.getOpcode() == PPC::BL8_Macho || 146 MI.getOpcode() == PPC::BL_ELF || MI.getOpcode() == PPC::BL8_ELF) 147 Reloc = PPC::reloc_pcrel_bx; 148 else { 149 if (TM.getRelocationModel() == Reloc::PIC_) { 150 assert(MovePCtoLROffset && "MovePCtoLR not seen yet?"); 151 } 152 switch (MI.getOpcode()) { 153 default: MI.dump(); assert(0 && "Unknown instruction for relocation!"); 154 case PPC::LIS: 155 case PPC::LIS8: 156 case PPC::ADDIS: 157 case PPC::ADDIS8: 158 Reloc = PPC::reloc_absolute_high; // Pointer to symbol 159 break; 160 case PPC::LI: 161 case PPC::LI8: 162 case PPC::LA: 163 // Loads. 164 case PPC::LBZ: 165 case PPC::LBZ8: 166 case PPC::LHA: 167 case PPC::LHA8: 168 case PPC::LHZ: 169 case PPC::LHZ8: 170 case PPC::LWZ: 171 case PPC::LWZ8: 172 case PPC::LFS: 173 case PPC::LFD: 174 175 // Stores. 176 case PPC::STB: 177 case PPC::STB8: 178 case PPC::STH: 179 case PPC::STH8: 180 case PPC::STW: 181 case PPC::STW8: 182 case PPC::STFS: 183 case PPC::STFD: 184 Reloc = PPC::reloc_absolute_low; 185 break; 186 187 case PPC::LWA: 188 case PPC::LD: 189 case PPC::STD: 190 case PPC::STD_32: 191 Reloc = PPC::reloc_absolute_low_ix; 192 break; 193 } 194 } 195 196 MachineRelocation R; 197 if (MO.isGlobalAddress()) { 198 R = MachineRelocation::getGV(MCE.getCurrentPCOffset(), Reloc, 199 MO.getGlobal(), 0, 200 isa<Function>(MO.getGlobal())); 201 } else if (MO.isExternalSymbol()) { 202 R = MachineRelocation::getExtSym(MCE.getCurrentPCOffset(), 203 Reloc, MO.getSymbolName(), 0); 204 } else if (MO.isConstantPoolIndex()) { 205 R = MachineRelocation::getConstPool(MCE.getCurrentPCOffset(), 206 Reloc, MO.getIndex(), 0); 207 } else { 208 assert(MO.isJumpTableIndex()); 209 R = MachineRelocation::getJumpTable(MCE.getCurrentPCOffset(), 210 Reloc, MO.getIndex(), 0); 211 } 212 213 // If in PIC mode, we need to encode the negated address of the 214 // 'movepctolr' into the unrelocated field. After relocation, we'll have 215 // &gv-&movepctolr-4 in the imm field. Once &movepctolr is added to the imm 216 // field, we get &gv. This doesn't happen for branch relocations, which are 217 // always implicitly pc relative. 218 if (TM.getRelocationModel() == Reloc::PIC_ && Reloc != PPC::reloc_pcrel_bx){ 219 assert(MovePCtoLROffset && "MovePCtoLR not seen yet?"); 220 R.setConstantVal(-(intptr_t)MovePCtoLROffset - 4); 221 } 222 MCE.addRelocation(R); 223 224 } else if (MO.isMachineBasicBlock()) { 225 unsigned Reloc = 0; 226 unsigned Opcode = MI.getOpcode(); 227 if (Opcode == PPC::B || Opcode == PPC::BL_Macho || 228 Opcode == PPC::BLA_Macho || Opcode == PPC::BL_ELF || 229 Opcode == PPC::BLA_ELF) 230 Reloc = PPC::reloc_pcrel_bx; 231 else // BCC instruction 232 Reloc = PPC::reloc_pcrel_bcx; 233 MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(), 234 Reloc, MO.getMBB())); 235 } else { 236 cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n"; 237 abort(); 238 } 239 240 return rv; 241} 242 243#include "PPCGenCodeEmitter.inc" 244 245