PPCInstrInfo.td revision d332fd54f57e4d91267d7f4e4ee8d35003c7ef78
1//===- PowerPCInstrInfo.td - The PowerPC Instruction Set -----*- tablegen -*-=// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file describes the subset of the 32-bit PowerPC instruction set, as used 11// by the PowerPC instruction selector. 12// 13//===----------------------------------------------------------------------===// 14 15include "PowerPCInstrFormats.td" 16 17let isTerminator = 1, isReturn = 1 in 18 def BLR : XLForm_2_ext<"blr", 19, 16, 20, 31, 1, 0, 0>; 19 20class II<dag OL, string asmstr> { 21 dag OperandList = OL; 22 string AsmString = asmstr; 23} 24 25def u5imm : Operand<i8> { 26 let PrintMethod = "printU5ImmOperand"; 27} 28def u16imm : Operand<i16> { 29 let PrintMethod = "printU16ImmOperand"; 30} 31 32 33// Pseudo-instructions: 34def PHI : Pseudo<"PHI">; // PHI node... 35def ADJCALLSTACKDOWN : Pseudo<"ADJCALLSTACKDOWN">; 36def ADJCALLSTACKUP : Pseudo<"ADJCALLSTACKUP">; 37let Defs = [LR] in 38 def MovePCtoLR : Pseudo<"MovePCtoLR">; 39def IMPLICIT_DEF : Pseudo<"IMPLICIT_DEF">; 40 41def LA : DForm_2<"la", 14, 0, 0>; 42def LOADHiAddr : DForm_2_r0<"addis", 15, 0, 0>; 43 44def ADDI : DForm_2<"addi", 14, 0, 0>; 45def ADDIS : DForm_2<"addis", 15, 0, 0>; 46def SUBI : DForm_2<"subi", 14, 0, 0>; 47def LI : DForm_2_r0<"li", 14, 0, 0>; 48def LIS : DForm_2_r0<"lis", 15, 0, 0>; 49def ADDIC : DForm_2<"addic", 12, 0, 0>; 50def ADDICo : DForm_2<"addic.", 13, 0, 0>; 51def ADD : XOForm_1<"add", 31, 266, 0, 0, 0, 0>; 52def ADDC : XOForm_1<"addc", 31, 10, 0, 0, 0, 0>; 53def ADDE : XOForm_1<"adde", 31, 138, 0, 0, 0, 0>; 54def ADDZE : XOForm_3<"addze", 31, 202, 0, 0, 0, 0>; 55def ANDIo : DForm_4<28, 0, 0, 56 (ops GPRC:$dst, GPRC:$src1, u16imm:$src2), 57 "andi. $dst, $src1, $src2">; 58 59let isBranch = 1, isTerminator = 1 in { 60 def COND_BRANCH : Pseudo<"COND_BRANCH">; 61 def B : IForm<"b", 18, 0, 0, 0, 0>; 62 // FIXME: 4*CR# needs to be added to the BI field! 63 // This will only work for CR0 as it stands now 64 def BLT : BForm_ext<"blt", 16, 0, 0, 12, 0, 0, 0>; 65 def BLE : BForm_ext<"ble", 16, 0, 0, 4, 1, 0, 0>; 66 def BEQ : BForm_ext<"beq", 16, 0, 0, 12, 2, 0, 0>; 67 def BGE : BForm_ext<"bge", 16, 0, 0, 4, 0, 0, 0>; 68 def BGT : BForm_ext<"bgt", 16, 0, 0, 12, 1, 0, 0>; 69 def BNE : BForm_ext<"bne", 16, 0, 0, 4, 2, 0, 0>; 70} 71 72let isBranch = 1, isTerminator = 1, isCall = 1, 73 // All calls clobber the non-callee saved registers... 74 Defs = [R0,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12, 75 F0,F1,F2,F3,F4,F5,F6,F7,F8,F9,F10,F11,F12,F13, 76 LR,XER,CTR, 77 CR0,CR1,CR5,CR6,CR7] in { 78 // Convenient aliases for call instructions 79 def CALLpcrel : IForm<"bl", 18, 0, 1, 0, 0>; 80 def CALLindirect : XLForm_2_ext<"bctrl", 19, 528, 20, 31, 1, 0, 0>; 81} 82 83def CMPI : DForm_5<"cmpi", 11, 0, 0>; 84def CMPWI : DForm_5_ext<"cmpwi", 11, 0, 0>; 85def CMPDI : DForm_5_ext<"cmpdi", 11, 1, 0>; 86def CMP : XForm_16<"cmp", 31, 0, 0, 0>; 87def CMPW : XForm_16_ext<"cmpw", 31, 0, 0, 0>; 88def CMPD : XForm_16_ext<"cmpd", 31, 0, 1, 0>; 89def CMPLI : DForm_6<10, 0, 0, 90 (ops CRRC:$dst, i1imm:$size, GPRC:$src1, u16imm:$src2), 91 "cmpli $dst, $size, $src1, $src2">; 92def CMPLWI : DForm_6_ext<10, 0, 0, 93 (ops CRRC:$dst, GPRC:$src1, u16imm:$src2), 94 "cmplwi $dst, $src1, $src2">; 95def CMPLDI : DForm_6_ext<10, 1, 0, 96 (ops CRRC:$dst, GPRC:$src1, u16imm:$src2), 97 "cmpldi $dst, $src1, $src2">; 98def CMPL : XForm_16<"cmpl", 31, 32, 0, 0>; 99def CMPLW : XForm_16_ext<"cmplw", 31, 32, 0, 0>; 100def CMPLD : XForm_16_ext<"cmpld", 31, 32, 1, 0>; 101def DIVW : XOForm_1<"divw", 31, 491, 0, 0, 0, 0>; 102def DIVWU : XOForm_1<"divwu", 31, 459, 0, 0, 0, 0>; 103def FADD : AForm_2<"fadd", 63, 21, 0, 0, 0>; 104def FADDS : AForm_2<"fadds", 59, 21, 0, 0, 0>; 105def FSUB : AForm_2<"fsub", 63, 20, 0, 0, 0>; 106def FSUBS : AForm_2<"fsubs", 59, 20, 0, 0, 0>; 107def FMADD : AForm_2<"fmul", 63, 29, 0, 0, 0>; 108def FMUL : AForm_3<"fmul", 63, 25, 0, 0, 0>; 109def FMULS : AForm_3<"fmuls", 59, 25, 0, 0, 0>; 110def FDIV : AForm_2<"fdiv", 63, 18, 0, 0, 0>; 111def FDIVS : AForm_2<"fdivs", 59, 18, 0, 0, 0>; 112def FSEL : AForm_1<"fsel", 63, 23, 0, 0, 0>; 113def FCMPU : XForm_17<"fcmpu", 63, 0, 0, 0>; 114def LBZ : DForm_1<"lbz", 35, 0, 0>; 115def LHA : DForm_1<"lha", 42, 0, 0>; 116def LHZ : DForm_1<"lhz", 40, 0, 0>; 117def LWZ : DForm_1<"lwz", 32, 0, 0>; 118def LWA : DSForm_1<"lwa", 58, 2, 1, 0>; 119def LD : DSForm_2<"ld", 58, 0, 1, 0>; 120def LMW : DForm_1<"lmw", 46, 0, 0>; 121def STMW : DForm_3<"stmw", 47, 0, 0>; 122def LFS : DForm_8<"lfs", 48, 0, 0>; 123def LFD : DForm_8<"lfd", 50, 0, 0>; 124def MFLR : XFXForm_1_ext<"", 31, 399, 8, 0, 0>, 125 II<(ops GPRC:$reg), "mflr $reg">; 126def MFCTR : XFXForm_1_ext<"mfctr", 31, 399, 9, 0, 0>; 127def MTLR : XFXForm_7_ext<"mtlr", 31, 467, 8, 0, 0>; 128def MTCTR : XFXForm_7_ext<"mtctr", 31, 467, 9, 0, 0>; 129def MULLD : XOForm_1<"mulld", 31, 233, 0, 0, 1, 0>; 130def MULLW : XOForm_1<"mullw", 31, 235, 0, 0, 0, 0>; 131def MULHWU : XOForm_2<"mulhwu", 31, 11, 0, 0, 0>; 132def NEG : XOForm_3<"neg", 31, 104, 0, 0, 0, 0>; 133def NOP : DForm_4_zero<"nop", 24, 0, 0, (ops), "nop">; 134def ORI : DForm_4<24, 0, 0, 135 (ops GPRC:$dst, GPRC:$src1, u16imm:$src2), 136 "ori $dst, $src1, $src2">; 137def ORIS : DForm_4<25, 0, 0, 138 (ops GPRC:$dst, GPRC:$src1, u16imm:$src2), 139 "oris $dst, $src1, $src2">; 140def RLDICL : MDForm_1<"rldicl", 30, 0, 0, 1, 0>; 141def RLDICR : MDForm_1<"rldicr", 30, 1, 0, 1, 0>; 142def RLWINM : MForm_2<"rlwinm", 21, 0, 0, 0>; 143def RLWNM : MForm_1<"rlwnm", 23, 0, 0, 0>; 144def RLWIMI : MForm_2<"rlwimi", 20, 0, 0, 0>; 145def SRADI : XSForm_1<"sradi", 31, 413, 0, 1, 0>; 146def SRWI : MForm_2<"srwi", 21, 0, 0, 0>; 147def STB : DForm_3<"stb", 38, 0, 0>; 148def STBU : DForm_3<"stbu", 39, 0, 0>; 149def STH : DForm_3<"sth", 44, 0, 0>; 150def STHU : DForm_3<"sthu", 45, 0, 0>; 151def STW : DForm_3<"stw", 36, 0, 0>; 152def STWU : DForm_3<"stwu", 37, 0, 0>; 153def STD : DSForm_2<"std", 62, 0, 1, 0>; 154def STDU : DSForm_2<"stdu", 62, 1, 1, 0>; 155def STFS : DForm_9<"stfs", 52, 0, 0>; 156def STFD : DForm_9<"stfd", 54, 0, 0>; 157def SUBFIC : DForm_2<"subfic", 8, 0, 0>; 158def SUB : XOForm_1_rev<"sub", 31, 40, 0, 0, 0, 0>; 159def SUBF : XOForm_1<"subf", 31, 40, 0, 0, 0, 0>; 160def SUBC : XOForm_1_rev<"subc", 31, 8, 0, 0, 0, 0>; 161def SUBFC : XOForm_1<"subfc", 31, 8, 0, 0, 0, 0>; 162def SUBFE : XOForm_1<"subfe", 31, 136, 0, 0, 0, 0>; 163def SUBFZE : XOForm_3<"subfze", 31, 200, 0, 0, 0, 0>; 164def XORI : DForm_4<26, 0, 0, 165 (ops GPRC:$dst, GPRC:$src1, u16imm:$src2), 166 "xori $dst, $src1, $src2">; 167def XORIS : DForm_4<27, 0, 0, 168 (ops GPRC:$dst, GPRC:$src1, u16imm:$src2), 169 "xoris $dst, $src1, $src2">; 170def MULLI : DForm_2<"mulli", 7, 0, 0>; 171 172 173def LBZX : XForm_1<31, 87, 0, 0, (ops GPRC:$dst, GPRC:$base, GPRC:$index), 174 "lbzx $dst, $base, $index">; 175def LHAX : XForm_1<31, 343, 0, 0, (ops GPRC:$dst, GPRC:$base, GPRC:$index), 176 "lhax $dst, $base, $index">; 177def LHZX : XForm_1<31, 279, 0, 0, (ops GPRC:$dst, GPRC:$base, GPRC:$index), 178 "lhzx $dst, $base, $index">; 179def LWAX : XForm_1<31, 341, 1, 0, (ops GPRC:$dst, GPRC:$base, GPRC:$index), 180 "lwax $dst, $base, $index">; 181def LWZX : XForm_1<31, 23, 0, 0, (ops GPRC:$dst, GPRC:$base, GPRC:$index), 182 "lwzx $dst, $base, $index">; 183def LDX : XForm_1<31, 21, 1, 0, (ops GPRC:$dst, GPRC:$base, GPRC:$index), 184 "ldx $dst, $base, $index">; 185def MFCR : XForm_5<31, 19, 0, 0, (ops GPRC:$dst), "mfcr $dst">; 186def AND : XForm_6<31, 28, 0, 0, 0, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB), 187 "and $rA, $rS, $rB">; 188def ANDC : XForm_6<31, 60, 0, 0, 0, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB), 189 "andc $rA, $rS, $rB">; 190def EQV : XForm_6<31, 284, 0, 0, 0, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB), 191 "eqv $rA, $rS, $rB">; 192def NAND : XForm_6<31, 476, 0, 0, 0, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB), 193 "nand $rA, $rS, $rB">; 194def NOR : XForm_6<31, 124, 0, 0, 0, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB), 195 "nor $rA, $rS, $rB">; 196def OR : XForm_6<31, 444, 0, 0, 0, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB), 197 "or $rA, $rS, $rB">; 198def ORo : XForm_6<31, 444, 1, 0, 0, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB), 199 "or. $rA, $rS, $rB">; 200def ORC : XForm_6<31, 412, 0, 0, 0, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB), 201 "orc $rA, $rS, $rB">; 202def SLD : XForm_6<31, 27, 0, 1, 0, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB), 203 "sld $rA, $rS, $rB">; 204def SLW : XForm_6<31, 24, 0, 0, 0, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB), 205 "slw $rA, $rS, $rB">; 206def SRD : XForm_6<31, 539, 0, 1, 0, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB), 207 "srd $rA, $rS, $rB">; 208def SRW : XForm_6<31, 536, 0, 0, 0, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB), 209 "srw $rA, $rS, $rB">; 210def SRAD : XForm_6<31, 794, 0, 1, 0, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB), 211 "srad $rA, $rS, $rB">; 212def SRAW : XForm_6<31, 792, 0, 0, 0, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB), 213 "sraw $rA, $rS, $rB">; 214def XOR : XForm_6<31, 316, 0, 0, 0, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB), 215 "xor $rA, $rS, $rB">; 216def STBX : XForm_8<31, 215, 0, 0, (ops GPRC:$rS, GPRC:$rA, GPRC:$rB), 217 "stbx $rS, $rA, $rB">; 218def STHX : XForm_8<31, 407, 0, 0, (ops GPRC:$rS, GPRC:$rA, GPRC:$rB), 219 "sthx $rS, $rA, $rB">; 220def STWX : XForm_8<31, 151, 0, 0, (ops GPRC:$rS, GPRC:$rA, GPRC:$rB), 221 "stwx $rS, $rA, $rB">; 222def STWUX : XForm_8<31, 183, 0, 0, (ops GPRC:$rS, GPRC:$rA, GPRC:$rB), 223 "stwux $rS, $rA, $rB">; 224def STDX : XForm_8<31, 149, 1, 0, (ops GPRC:$rS, GPRC:$rA, GPRC:$rB), 225 "stdx $rS, $rA, $rB">; 226def STDUX : XForm_8<31, 181, 1, 0, (ops GPRC:$rS, GPRC:$rA, GPRC:$rB), 227 "stdux $rS, $rA, $rB">; 228def SRAWI : XForm_10<31, 824, 0, 0, 0, (ops GPRC:$rA, GPRC:$rS, u5imm:$SH), 229 "srawi $rA, $rS, $SH">; 230def CNTLZW : XForm_11<31, 26, 0, 0, 0, (ops GPRC:$rA, GPRC:$rS), 231 "cntlzw $rA, $rS">; 232def EXTSB : XForm_11<31, 954, 0, 0, 0, (ops GPRC:$rA, GPRC:$rS), 233 "extsb $rA, $rS">; 234def EXTSH : XForm_11<31, 922, 0, 0, 0, (ops GPRC:$rA, GPRC:$rS), 235 "extsh $rA, $rS">; 236def EXTSW : XForm_11<31, 986, 0, 1, 0, (ops GPRC:$rA, GPRC:$rS), 237 "extsw $rA, $rS">; 238def LFSX : XForm_25<31, 535, 0, 0, (ops FPRC:$dst, GPRC:$base, GPRC:$index), 239 "lfsx $dst, $base, $index">; 240def LFDX : XForm_25<31, 599, 0, 0, (ops FPRC:$dst, GPRC:$base, GPRC:$index), 241 "lfdx $dst, $base, $index">; 242def FCFID : XForm_26<63, 846, 0, 1, 0, (ops FPRC:$frD, FPRC:$frB), 243 "fcfid $frD, $frB">; 244def FCTIDZ : XForm_26<63, 815, 0, 1, 0, (ops FPRC:$frD, FPRC:$frB), 245 "fctidz $frD, $frB">; 246def FCTIWZ : XForm_26<63, 15, 0, 0, 0, (ops FPRC:$frD, FPRC:$frB), 247 "fctiwz $frD, $frB">; 248def FMR : XForm_26<63, 72, 0, 0, 0, (ops FPRC:$frD, FPRC:$frB), 249 "fmr $frD, $frB">; 250def FNEG : XForm_26<63, 80, 0, 0, 0, (ops FPRC:$frD, FPRC:$frB), 251 "fneg $frD, $frB">; 252def FRSP : XForm_26<63, 12, 0, 0, 0, (ops FPRC:$frD, FPRC:$frB), 253 "frsp $frD, $frB">; 254def STFSX : XForm_28<31, 663, 0, 0, (ops FPRC:$frS, GPRC:$rA, GPRC:$rB), 255 "stfsx $frS, $rA, $rB">; 256def STFDX : XForm_28<31, 727, 0, 0, (ops FPRC:$frS, GPRC:$rA, GPRC:$rB), 257 "stfdx $frS, $rA, $rB">; 258def CRAND : XLForm_1<19, 257, 0, 0, (ops u5imm:$D, u5imm:$A, u5imm:$B), 259 "crand $D, $A, $B">; 260def CRANDC : XLForm_1<19, 129, 0, 0, (ops u5imm:$D, u5imm:$A, u5imm:$B), 261 "crandc $D, $A, $B">; 262def CRNOR : XLForm_1<19, 33, 0, 0, (ops u5imm:$D, u5imm:$A, u5imm:$B), 263 "crnor $D, $A, $B">; 264def CROR : XLForm_1<19, 449, 0, 0, (ops u5imm:$D, u5imm:$A, u5imm:$B), 265 "cror $D, $A, $B">; 266