PPCRegisterInfo.h revision 6e032942cf58d1c41f88609a1cec74eb74940ecd 
1//===- PPCRegisterInfo.h - PowerPC Register Information Impl -----*- C++ -*-==//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the PowerPC implementation of the TargetRegisterInfo
11// class.
12//
13//===----------------------------------------------------------------------===//
14
15#ifndef POWERPC32_REGISTERINFO_H
16#define POWERPC32_REGISTERINFO_H
17
18#include "PPC.h"
19#include "PPCGenRegisterInfo.h.inc"
20#include <map>
21
22namespace llvm {
23class PPCSubtarget;
24class TargetInstrInfo;
25class Type;
26
27class PPCRegisterInfo : public PPCGenRegisterInfo {
28  std::map<unsigned, unsigned> ImmToIdxMap;
29  const PPCSubtarget &Subtarget;
30  const TargetInstrInfo &TII;
31public:
32  PPCRegisterInfo(const PPCSubtarget &SubTarget, const TargetInstrInfo &tii);
33
34  /// getRegisterNumbering - Given the enum value for some register, e.g.
35  /// PPC::F14, return the number that it corresponds to (e.g. 14).
36  static unsigned getRegisterNumbering(unsigned RegEnum);
37
38  /// getPointerRegClass - Return the register class to use to hold pointers.
39  /// This is used for addressing modes.
40  virtual const TargetRegisterClass *getPointerRegClass(unsigned Kind=0) const;
41
42  /// Code Generation virtual methods...
43  const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const;
44
45  BitVector getReservedRegs(const MachineFunction &MF) const;
46
47  /// requiresRegisterScavenging - We require a register scavenger.
48  /// FIXME (64-bit): Should be inlined.
49  bool requiresRegisterScavenging(const MachineFunction &MF) const;
50
51  void eliminateCallFramePseudoInstr(MachineFunction &MF,
52                                     MachineBasicBlock &MBB,
53                                     MachineBasicBlock::iterator I) const;
54
55  void lowerDynamicAlloc(MachineBasicBlock::iterator II,
56                         int SPAdj, RegScavenger *RS) const;
57  void lowerCRSpilling(MachineBasicBlock::iterator II, unsigned FrameIndex,
58                       int SPAdj, RegScavenger *RS) const;
59  void eliminateFrameIndex(MachineBasicBlock::iterator II,
60                           int SPAdj, RegScavenger *RS = NULL) const;
61
62  // Debug information queries.
63  unsigned getRARegister() const;
64  unsigned getFrameRegister(const MachineFunction &MF) const;
65
66  // Exception handling queries.
67  unsigned getEHExceptionRegister() const;
68  unsigned getEHHandlerRegister() const;
69
70  int getDwarfRegNum(unsigned RegNum, bool isEH) const;
71  int getLLVMRegNum(unsigned RegNum, bool isEH) const;
72};
73
74} // end namespace llvm
75
76#endif
77