PPCSubtarget.cpp revision dce4a407a24b04eebc6a376f8e62b41aaa7b071f 
1//===-- PowerPCSubtarget.cpp - PPC Subtarget Information ------------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the PPC specific subclass of TargetSubtargetInfo.
11//
12//===----------------------------------------------------------------------===//
13
14#include "PPCSubtarget.h"
15#include "PPC.h"
16#include "PPCRegisterInfo.h"
17#include "llvm/CodeGen/MachineFunction.h"
18#include "llvm/CodeGen/MachineScheduler.h"
19#include "llvm/IR/Attributes.h"
20#include "llvm/IR/Function.h"
21#include "llvm/IR/GlobalValue.h"
22#include "llvm/Support/Host.h"
23#include "llvm/Support/TargetRegistry.h"
24#include "llvm/Target/TargetMachine.h"
25#include <cstdlib>
26
27using namespace llvm;
28
29#define DEBUG_TYPE "ppc-subtarget"
30
31#define GET_SUBTARGETINFO_TARGET_DESC
32#define GET_SUBTARGETINFO_CTOR
33#include "PPCGenSubtargetInfo.inc"
34
35PPCSubtarget::PPCSubtarget(const std::string &TT, const std::string &CPU,
36                           const std::string &FS, bool is64Bit,
37                           CodeGenOpt::Level OptLevel)
38    : PPCGenSubtargetInfo(TT, CPU, FS), IsPPC64(is64Bit), TargetTriple(TT),
39      OptLevel(OptLevel) {
40  initializeEnvironment();
41  resetSubtargetFeatures(CPU, FS);
42}
43
44/// SetJITMode - This is called to inform the subtarget info that we are
45/// producing code for the JIT.
46void PPCSubtarget::SetJITMode() {
47  // JIT mode doesn't want lazy resolver stubs, it knows exactly where
48  // everything is.  This matters for PPC64, which codegens in PIC mode without
49  // stubs.
50  HasLazyResolverStubs = false;
51
52  // Calls to external functions need to use indirect calls
53  IsJITCodeModel = true;
54}
55
56void PPCSubtarget::resetSubtargetFeatures(const MachineFunction *MF) {
57  AttributeSet FnAttrs = MF->getFunction()->getAttributes();
58  Attribute CPUAttr = FnAttrs.getAttribute(AttributeSet::FunctionIndex,
59                                           "target-cpu");
60  Attribute FSAttr = FnAttrs.getAttribute(AttributeSet::FunctionIndex,
61                                          "target-features");
62  std::string CPU =
63    !CPUAttr.hasAttribute(Attribute::None) ? CPUAttr.getValueAsString() : "";
64  std::string FS =
65    !FSAttr.hasAttribute(Attribute::None) ? FSAttr.getValueAsString() : "";
66  if (!FS.empty()) {
67    initializeEnvironment();
68    resetSubtargetFeatures(CPU, FS);
69  }
70}
71
72void PPCSubtarget::initializeEnvironment() {
73  StackAlignment = 16;
74  DarwinDirective = PPC::DIR_NONE;
75  HasMFOCRF = false;
76  Has64BitSupport = false;
77  Use64BitRegs = false;
78  UseCRBits = false;
79  HasAltivec = false;
80  HasQPX = false;
81  HasVSX = false;
82  HasFCPSGN = false;
83  HasFSQRT = false;
84  HasFRE = false;
85  HasFRES = false;
86  HasFRSQRTE = false;
87  HasFRSQRTES = false;
88  HasRecipPrec = false;
89  HasSTFIWX = false;
90  HasLFIWAX = false;
91  HasFPRND = false;
92  HasFPCVT = false;
93  HasISEL = false;
94  HasPOPCNTD = false;
95  HasLDBRX = false;
96  IsBookE = false;
97  DeprecatedMFTB = false;
98  DeprecatedDST = false;
99  HasLazyResolverStubs = false;
100  IsJITCodeModel = false;
101}
102
103void PPCSubtarget::resetSubtargetFeatures(StringRef CPU, StringRef FS) {
104  // Determine default and user specified characteristics
105  std::string CPUName = CPU;
106  if (CPUName.empty())
107    CPUName = "generic";
108#if (defined(__APPLE__) || defined(__linux__)) && \
109    (defined(__ppc__) || defined(__powerpc__))
110  if (CPUName == "generic")
111    CPUName = sys::getHostCPUName();
112#endif
113
114  // Initialize scheduling itinerary for the specified CPU.
115  InstrItins = getInstrItineraryForCPU(CPUName);
116
117  // Make sure 64-bit features are available when CPUname is generic
118  std::string FullFS = FS;
119
120  // If we are generating code for ppc64, verify that options make sense.
121  if (IsPPC64) {
122    Has64BitSupport = true;
123    // Silently force 64-bit register use on ppc64.
124    Use64BitRegs = true;
125    if (!FullFS.empty())
126      FullFS = "+64bit," + FullFS;
127    else
128      FullFS = "+64bit";
129  }
130
131  // At -O2 and above, track CR bits as individual registers.
132  if (OptLevel >= CodeGenOpt::Default) {
133    if (!FullFS.empty())
134      FullFS = "+crbits," + FullFS;
135    else
136      FullFS = "+crbits";
137  }
138
139  // Parse features string.
140  ParseSubtargetFeatures(CPUName, FullFS);
141
142  // If the user requested use of 64-bit regs, but the cpu selected doesn't
143  // support it, ignore.
144  if (use64BitRegs() && !has64BitSupport())
145    Use64BitRegs = false;
146
147  // Set up darwin-specific properties.
148  if (isDarwin())
149    HasLazyResolverStubs = true;
150
151  // QPX requires a 32-byte aligned stack. Note that we need to do this if
152  // we're compiling for a BG/Q system regardless of whether or not QPX
153  // is enabled because external functions will assume this alignment.
154  if (hasQPX() || isBGQ())
155    StackAlignment = 32;
156
157  // Determine endianness.
158  IsLittleEndian = (TargetTriple.getArch() == Triple::ppc64le);
159}
160
161/// hasLazyResolverStub - Return true if accesses to the specified global have
162/// to go through a dyld lazy resolution stub.  This means that an extra load
163/// is required to get the address of the global.
164bool PPCSubtarget::hasLazyResolverStub(const GlobalValue *GV,
165                                       const TargetMachine &TM) const {
166  // We never have stubs if HasLazyResolverStubs=false or if in static mode.
167  if (!HasLazyResolverStubs || TM.getRelocationModel() == Reloc::Static)
168    return false;
169  // If symbol visibility is hidden, the extra load is not needed if
170  // the symbol is definitely defined in the current translation unit.
171  bool isDecl = GV->isDeclaration() && !GV->isMaterializable();
172  if (GV->hasHiddenVisibility() && !isDecl && !GV->hasCommonLinkage())
173    return false;
174  return GV->hasWeakLinkage() || GV->hasLinkOnceLinkage() ||
175         GV->hasCommonLinkage() || isDecl;
176}
177
178bool PPCSubtarget::enablePostRAScheduler(
179           CodeGenOpt::Level OptLevel,
180           TargetSubtargetInfo::AntiDepBreakMode& Mode,
181           RegClassVector& CriticalPathRCs) const {
182  Mode = TargetSubtargetInfo::ANTIDEP_ALL;
183
184  CriticalPathRCs.clear();
185
186  if (isPPC64())
187    CriticalPathRCs.push_back(&PPC::G8RCRegClass);
188  else
189    CriticalPathRCs.push_back(&PPC::GPRCRegClass);
190
191  return OptLevel >= CodeGenOpt::Default;
192}
193
194// Embedded cores need aggressive scheduling (and some others also benefit).
195static bool needsAggressiveScheduling(unsigned Directive) {
196  switch (Directive) {
197  default: return false;
198  case PPC::DIR_440:
199  case PPC::DIR_A2:
200  case PPC::DIR_E500mc:
201  case PPC::DIR_E5500:
202  case PPC::DIR_PWR7:
203    return true;
204  }
205}
206
207bool PPCSubtarget::enableMachineScheduler() const {
208  // Enable MI scheduling for the embedded cores.
209  // FIXME: Enable this for all cores (some additional modeling
210  // may be necessary).
211  return needsAggressiveScheduling(DarwinDirective);
212}
213
214void PPCSubtarget::overrideSchedPolicy(MachineSchedPolicy &Policy,
215                                       MachineInstr *begin,
216                                       MachineInstr *end,
217                                       unsigned NumRegionInstrs) const {
218  if (needsAggressiveScheduling(DarwinDirective)) {
219    Policy.OnlyTopDown = false;
220    Policy.OnlyBottomUp = false;
221  }
222
223  // Spilling is generally expensive on all PPC cores, so always enable
224  // register-pressure tracking.
225  Policy.ShouldTrackPressure = true;
226}
227
228bool PPCSubtarget::useAA() const {
229  // Use AA during code generation for the embedded cores.
230  return needsAggressiveScheduling(DarwinDirective);
231}
232
233