PPCSubtarget.h revision 36b56886974eae4f9c5ebc96befd3e7bfe5de338 
1//===-- PPCSubtarget.h - Define Subtarget for the PPC ----------*- C++ -*--===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file declares the PowerPC specific subclass of TargetSubtargetInfo.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef POWERPCSUBTARGET_H
15#define POWERPCSUBTARGET_H
16
17#include "llvm/ADT/Triple.h"
18#include "llvm/MC/MCInstrItineraries.h"
19#include "llvm/Target/TargetSubtargetInfo.h"
20#include <string>
21
22#define GET_SUBTARGETINFO_HEADER
23#include "PPCGenSubtargetInfo.inc"
24
25// GCC #defines PPC on Linux but we use it as our namespace name
26#undef PPC
27
28namespace llvm {
29class StringRef;
30
31namespace PPC {
32  // -m directive values.
33  enum {
34    DIR_NONE,
35    DIR_32,
36    DIR_440,
37    DIR_601,
38    DIR_602,
39    DIR_603,
40    DIR_7400,
41    DIR_750,
42    DIR_970,
43    DIR_A2,
44    DIR_E500mc,
45    DIR_E5500,
46    DIR_PWR3,
47    DIR_PWR4,
48    DIR_PWR5,
49    DIR_PWR5X,
50    DIR_PWR6,
51    DIR_PWR6X,
52    DIR_PWR7,
53    DIR_64
54  };
55}
56
57class GlobalValue;
58class TargetMachine;
59
60class PPCSubtarget : public PPCGenSubtargetInfo {
61protected:
62  /// stackAlignment - The minimum alignment known to hold of the stack frame on
63  /// entry to the function and which must be maintained by every function.
64  unsigned StackAlignment;
65
66  /// Selected instruction itineraries (one entry per itinerary class.)
67  InstrItineraryData InstrItins;
68
69  /// Which cpu directive was used.
70  unsigned DarwinDirective;
71
72  /// Used by the ISel to turn in optimizations for POWER4-derived architectures
73  bool HasMFOCRF;
74  bool Has64BitSupport;
75  bool Use64BitRegs;
76  bool UseCRBits;
77  bool IsPPC64;
78  bool HasAltivec;
79  bool HasQPX;
80  bool HasVSX;
81  bool HasFCPSGN;
82  bool HasFSQRT;
83  bool HasFRE, HasFRES, HasFRSQRTE, HasFRSQRTES;
84  bool HasRecipPrec;
85  bool HasSTFIWX;
86  bool HasLFIWAX;
87  bool HasFPRND;
88  bool HasFPCVT;
89  bool HasISEL;
90  bool HasPOPCNTD;
91  bool HasLDBRX;
92  bool IsBookE;
93  bool DeprecatedMFTB;
94  bool DeprecatedDST;
95  bool HasLazyResolverStubs;
96  bool IsJITCodeModel;
97  bool IsLittleEndian;
98
99  /// TargetTriple - What processor and OS we're targeting.
100  Triple TargetTriple;
101
102public:
103  /// This constructor initializes the data members to match that
104  /// of the specified triple.
105  ///
106  PPCSubtarget(const std::string &TT, const std::string &CPU,
107               const std::string &FS, bool is64Bit,
108               CodeGenOpt::Level OptLevel);
109
110  /// ParseSubtargetFeatures - Parses features string setting specified
111  /// subtarget options.  Definition of function is auto generated by tblgen.
112  void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
113
114  /// SetJITMode - This is called to inform the subtarget info that we are
115  /// producing code for the JIT.
116  void SetJITMode();
117
118  /// getStackAlignment - Returns the minimum alignment known to hold of the
119  /// stack frame on entry to the function and which must be maintained by every
120  /// function for this subtarget.
121  unsigned getStackAlignment() const { return StackAlignment; }
122
123  /// getDarwinDirective - Returns the -m directive specified for the cpu.
124  ///
125  unsigned getDarwinDirective() const { return DarwinDirective; }
126
127  /// getInstrItins - Return the instruction itineraies based on subtarget
128  /// selection.
129  const InstrItineraryData &getInstrItineraryData() const { return InstrItins; }
130
131  /// \brief Reset the features for the PowerPC target.
132  virtual void resetSubtargetFeatures(const MachineFunction *MF);
133private:
134  void initializeEnvironment();
135  void resetSubtargetFeatures(StringRef CPU, StringRef FS);
136
137public:
138  /// isPPC64 - Return true if we are generating code for 64-bit pointer mode.
139  ///
140  bool isPPC64() const { return IsPPC64; }
141
142  /// has64BitSupport - Return true if the selected CPU supports 64-bit
143  /// instructions, regardless of whether we are in 32-bit or 64-bit mode.
144  bool has64BitSupport() const { return Has64BitSupport; }
145
146  /// use64BitRegs - Return true if in 64-bit mode or if we should use 64-bit
147  /// registers in 32-bit mode when possible.  This can only true if
148  /// has64BitSupport() returns true.
149  bool use64BitRegs() const { return Use64BitRegs; }
150
151  /// useCRBits - Return true if we should store and manipulate i1 values in
152  /// the individual condition register bits.
153  bool useCRBits() const { return UseCRBits; }
154
155  /// hasLazyResolverStub - Return true if accesses to the specified global have
156  /// to go through a dyld lazy resolution stub.  This means that an extra load
157  /// is required to get the address of the global.
158  bool hasLazyResolverStub(const GlobalValue *GV,
159                           const TargetMachine &TM) const;
160
161  // isJITCodeModel - True if we're generating code for the JIT
162  bool isJITCodeModel() const { return IsJITCodeModel; }
163
164  // isLittleEndian - True if generating little-endian code
165  bool isLittleEndian() const { return IsLittleEndian; }
166
167  // Specific obvious features.
168  bool hasFCPSGN() const { return HasFCPSGN; }
169  bool hasFSQRT() const { return HasFSQRT; }
170  bool hasFRE() const { return HasFRE; }
171  bool hasFRES() const { return HasFRES; }
172  bool hasFRSQRTE() const { return HasFRSQRTE; }
173  bool hasFRSQRTES() const { return HasFRSQRTES; }
174  bool hasRecipPrec() const { return HasRecipPrec; }
175  bool hasSTFIWX() const { return HasSTFIWX; }
176  bool hasLFIWAX() const { return HasLFIWAX; }
177  bool hasFPRND() const { return HasFPRND; }
178  bool hasFPCVT() const { return HasFPCVT; }
179  bool hasAltivec() const { return HasAltivec; }
180  bool hasQPX() const { return HasQPX; }
181  bool hasVSX() const { return HasVSX; }
182  bool hasMFOCRF() const { return HasMFOCRF; }
183  bool hasISEL() const { return HasISEL; }
184  bool hasPOPCNTD() const { return HasPOPCNTD; }
185  bool hasLDBRX() const { return HasLDBRX; }
186  bool isBookE() const { return IsBookE; }
187  bool isDeprecatedMFTB() const { return DeprecatedMFTB; }
188  bool isDeprecatedDST() const { return DeprecatedDST; }
189
190  const Triple &getTargetTriple() const { return TargetTriple; }
191
192  /// isDarwin - True if this is any darwin platform.
193  bool isDarwin() const { return TargetTriple.isMacOSX(); }
194  /// isBGQ - True if this is a BG/Q platform.
195  bool isBGQ() const { return TargetTriple.getVendor() == Triple::BGQ; }
196
197  bool isDarwinABI() const { return isDarwin(); }
198  bool isSVR4ABI() const { return !isDarwin(); }
199
200  /// enablePostRAScheduler - True at 'More' optimization.
201  bool enablePostRAScheduler(CodeGenOpt::Level OptLevel,
202                             TargetSubtargetInfo::AntiDepBreakMode& Mode,
203                             RegClassVector& CriticalPathRCs) const;
204
205  // Scheduling customization.
206  bool enableMachineScheduler() const;
207  void overrideSchedPolicy(MachineSchedPolicy &Policy,
208                           MachineInstr *begin,
209                           MachineInstr *end,
210                           unsigned NumRegionInstrs) const;
211  bool useAA() const;
212};
213} // End llvm namespace
214
215#endif
216