PPCTargetMachine.cpp revision 0c7490617a62b0622d52949c0651da907b3d6c04 
1//===-- PowerPCTargetMachine.cpp - Define TargetMachine for PowerPC -------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10//
11//===----------------------------------------------------------------------===//
12
13#include "PowerPC.h"
14#include "PowerPCTargetMachine.h"
15#include "PowerPCFrameInfo.h"
16#include "PPC32TargetMachine.h"
17#include "PPC64TargetMachine.h"
18#include "PPC32JITInfo.h"
19#include "PPC64JITInfo.h"
20#include "llvm/Module.h"
21#include "llvm/PassManager.h"
22#include "llvm/CodeGen/IntrinsicLowering.h"
23#include "llvm/CodeGen/MachineFunction.h"
24#include "llvm/CodeGen/Passes.h"
25#include "llvm/Target/TargetOptions.h"
26#include "llvm/Target/TargetMachineRegistry.h"
27#include "llvm/Transforms/Scalar.h"
28#include "llvm/Support/CommandLine.h"
29#include <iostream>
30using namespace llvm;
31
32namespace llvm {
33  cl::opt<bool> AIX("aix",
34                    cl::desc("Generate AIX/xcoff instead of Darwin/MachO"),
35                    cl::Hidden);
36
37  cl::opt<bool> EnablePPCLSR("enable-lsr-for-ppc",
38                             cl::desc("Enable LSR for PPC (beta option!)"),
39                             cl::Hidden);
40}
41
42namespace {
43  const std::string PPC32ID = "PowerPC/32bit";
44  const std::string PPC64ID = "PowerPC/64bit";
45
46  // Register the targets
47  RegisterTarget<PPC32TargetMachine>
48  X("ppc32", "  PowerPC 32-bit");
49
50#if 0
51  RegisterTarget<PPC64TargetMachine>
52  Y("ppc64", "  PowerPC 64-bit (unimplemented)");
53#endif
54}
55
56PowerPCTargetMachine::PowerPCTargetMachine(const std::string &name,
57                                           IntrinsicLowering *IL,
58                                           const TargetData &TD,
59                                           const PowerPCFrameInfo &TFI)
60  : TargetMachine(name, IL, TD), FrameInfo(TFI)
61{}
62
63unsigned PPC32TargetMachine::getJITMatchQuality() {
64#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)
65  return 10;
66#else
67  return 0;
68#endif
69}
70
71/// addPassesToEmitAssembly - Add passes to the specified pass manager
72/// to implement a static compiler for this target.
73///
74bool PowerPCTargetMachine::addPassesToEmitAssembly(PassManager &PM,
75                                                   std::ostream &Out) {
76  bool LP64 = (0 != dynamic_cast<PPC64TargetMachine *>(this));
77
78  if (EnablePPCLSR)
79    PM.add(createLoopStrengthReducePass());
80
81  // FIXME: Implement efficient support for garbage collection intrinsics.
82  PM.add(createLowerGCPass());
83
84  // FIXME: Implement the invoke/unwind instructions!
85  PM.add(createLowerInvokePass());
86
87  // FIXME: Implement the switch instruction in the instruction selector!
88  PM.add(createLowerSwitchPass());
89
90  PM.add(createLowerConstantExpressionsPass());
91
92  // Make sure that no unreachable blocks are instruction selected.
93  PM.add(createUnreachableBlockEliminationPass());
94
95  if (LP64)
96    PM.add(createPPC64ISelSimple(*this));
97  else
98    PM.add(createPPC32ISelSimple(*this));
99
100  if (PrintMachineCode)
101    PM.add(createMachineFunctionPrinterPass(&std::cerr));
102
103  PM.add(createRegisterAllocator());
104
105  if (PrintMachineCode)
106    PM.add(createMachineFunctionPrinterPass(&std::cerr));
107
108  PM.add(createPrologEpilogCodeInserter());
109
110  // Must run branch selection immediately preceding the asm printer
111  PM.add(createPPCBranchSelectionPass());
112
113  if (AIX)
114    PM.add(createAIXAsmPrinter(Out, *this));
115  else
116    PM.add(createDarwinAsmPrinter(Out, *this));
117
118  PM.add(createMachineCodeDeleter());
119  return false;
120}
121
122void PowerPCJITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
123  if (EnablePPCLSR)
124    PM.add(createLoopStrengthReducePass());
125
126  // FIXME: Implement efficient support for garbage collection intrinsics.
127  PM.add(createLowerGCPass());
128
129  // FIXME: Implement the invoke/unwind instructions!
130  PM.add(createLowerInvokePass());
131
132  // FIXME: Implement the switch instruction in the instruction selector!
133  PM.add(createLowerSwitchPass());
134
135  PM.add(createLowerConstantExpressionsPass());
136
137  // Make sure that no unreachable blocks are instruction selected.
138  PM.add(createUnreachableBlockEliminationPass());
139
140  PM.add(createPPC32ISelSimple(TM));
141  PM.add(createRegisterAllocator());
142  PM.add(createPrologEpilogCodeInserter());
143
144  // Must run branch selection immediately preceding the asm printer
145  PM.add(createPPCBranchSelectionPass());
146
147  if (PrintMachineCode)
148    PM.add(createMachineFunctionPrinterPass(&std::cerr));
149}
150
151/// PowerPCTargetMachine ctor - Create an ILP32 architecture model
152///
153PPC32TargetMachine::PPC32TargetMachine(const Module &M, IntrinsicLowering *IL)
154  : PowerPCTargetMachine(PPC32ID, IL,
155                         TargetData(PPC32ID,false,4,4,4,4,4,4,2,1,1),
156                         PowerPCFrameInfo(*this, false)), JITInfo(*this) {}
157
158/// PPC64TargetMachine ctor - Create a LP64 architecture model
159///
160PPC64TargetMachine::PPC64TargetMachine(const Module &M, IntrinsicLowering *IL)
161  : PowerPCTargetMachine(PPC64ID, IL,
162                         TargetData(PPC64ID,false,8,4,4,4,4,4,2,1,1),
163                         PowerPCFrameInfo(*this, true)) {}
164
165unsigned PPC32TargetMachine::getModuleMatchQuality(const Module &M) {
166  // We strongly match "powerpc-*".
167  std::string TT = M.getTargetTriple();
168  if (TT.size() >= 8 && std::string(TT.begin(), TT.begin()+8) == "powerpc-")
169    return 20;
170
171  if (M.getEndianness()  == Module::BigEndian &&
172      M.getPointerSize() == Module::Pointer32)
173    return 10;                                   // Weak match
174  else if (M.getEndianness() != Module::AnyEndianness ||
175           M.getPointerSize() != Module::AnyPointerSize)
176    return 0;                                    // Match for some other target
177
178  return getJITMatchQuality()/2;
179}
180
181unsigned PPC64TargetMachine::getModuleMatchQuality(const Module &M) {
182  if (M.getEndianness()  == Module::BigEndian &&
183      M.getPointerSize() == Module::Pointer64)
184    return 10;                                   // Direct match
185  else if (M.getEndianness() != Module::AnyEndianness ||
186           M.getPointerSize() != Module::AnyPointerSize)
187    return 0;                                    // Match for some other target
188
189  return getJITMatchQuality()/2;
190}
191