PPCTargetMachine.cpp revision 34ad6db8b958fdc0d38e122edf753b5326e69b03
1//===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// Top-level implementation for the PowerPC target. 11// 12//===----------------------------------------------------------------------===// 13 14#include "PPC.h" 15#include "PPCTargetMachine.h" 16#include "llvm/PassManager.h" 17#include "llvm/MC/MCStreamer.h" 18#include "llvm/Target/TargetOptions.h" 19#include "llvm/Target/TargetRegistry.h" 20#include "llvm/Support/FormattedStream.h" 21using namespace llvm; 22 23// This is duplicated code. Refactor this. 24static MCStreamer *createMCStreamer(const Target &T, const std::string &TT, 25 MCContext &Ctx, TargetAsmBackend &TAB, 26 raw_ostream &OS, 27 MCCodeEmitter *Emitter, 28 bool RelaxAll, 29 bool NoExecStack) { 30 if (Triple(TT).isOSDarwin()) 31 return createMachOStreamer(Ctx, TAB, OS, Emitter, RelaxAll); 32 33 return NULL; 34} 35 36extern "C" void LLVMInitializePowerPCTarget() { 37 // Register the targets 38 RegisterTargetMachine<PPC32TargetMachine> A(ThePPC32Target); 39 RegisterTargetMachine<PPC64TargetMachine> B(ThePPC64Target); 40 41 // Register the MC Code Emitter 42 TargetRegistry::RegisterCodeEmitter(ThePPC32Target, createPPCMCCodeEmitter); 43 TargetRegistry::RegisterCodeEmitter(ThePPC64Target, createPPCMCCodeEmitter); 44 45 46 // Register the asm backend. 47 TargetRegistry::RegisterAsmBackend(ThePPC32Target, createPPCAsmBackend); 48 TargetRegistry::RegisterAsmBackend(ThePPC64Target, createPPCAsmBackend); 49 50 // Register the object streamer. 51 TargetRegistry::RegisterObjectStreamer(ThePPC32Target, createMCStreamer); 52 TargetRegistry::RegisterObjectStreamer(ThePPC64Target, createMCStreamer); 53} 54 55PPCTargetMachine::PPCTargetMachine(const Target &T, StringRef TT, 56 StringRef CPU, StringRef FS, 57 Reloc::Model RM, CodeModel::Model CM, 58 bool is64Bit) 59 : LLVMTargetMachine(T, TT, CPU, FS, RM, CM), 60 Subtarget(TT, CPU, FS, is64Bit), 61 DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this), 62 FrameLowering(Subtarget), JITInfo(*this, is64Bit), 63 TLInfo(*this), TSInfo(*this), 64 InstrItins(Subtarget.getInstrItineraryData()) { 65} 66 67/// Override this for PowerPC. Tail merging happily breaks up instruction issue 68/// groups, which typically degrades performance. 69bool PPCTargetMachine::getEnableTailMergeDefault() const { return false; } 70 71PPC32TargetMachine::PPC32TargetMachine(const Target &T, StringRef TT, 72 StringRef CPU, StringRef FS, 73 Reloc::Model RM, CodeModel::Model CM) 74 : PPCTargetMachine(T, TT, CPU, FS, RM, CM, false) { 75} 76 77 78PPC64TargetMachine::PPC64TargetMachine(const Target &T, StringRef TT, 79 StringRef CPU, StringRef FS, 80 Reloc::Model RM, CodeModel::Model CM) 81 : PPCTargetMachine(T, TT, CPU, FS, RM, CM, true) { 82} 83 84 85//===----------------------------------------------------------------------===// 86// Pass Pipeline Configuration 87//===----------------------------------------------------------------------===// 88 89bool PPCTargetMachine::addInstSelector(PassManagerBase &PM, 90 CodeGenOpt::Level OptLevel) { 91 // Install an instruction selector. 92 PM.add(createPPCISelDag(*this)); 93 return false; 94} 95 96bool PPCTargetMachine::addPreEmitPass(PassManagerBase &PM, 97 CodeGenOpt::Level OptLevel) { 98 // Must run branch selection immediately preceding the asm printer. 99 PM.add(createPPCBranchSelectionPass()); 100 return false; 101} 102 103bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM, 104 CodeGenOpt::Level OptLevel, 105 JITCodeEmitter &JCE) { 106 // FIXME: This should be moved to TargetJITInfo!! 107 if (Subtarget.isPPC64()) 108 // Temporary workaround for the inability of PPC64 JIT to handle jump 109 // tables. 110 DisableJumpTables = true; 111 112 // Inform the subtarget that we are in JIT mode. FIXME: does this break macho 113 // writing? 114 Subtarget.SetJITMode(); 115 116 // Machine code emitter pass for PowerPC. 117 PM.add(createPPCJITCodeEmitterPass(*this, JCE)); 118 119 return false; 120} 121