PPCTargetMachine.cpp revision 3ea934668b77f5126e8de0648b8d21a128971e11 
1//===-- PowerPCTargetMachine.cpp - Define TargetMachine for PowerPC -------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10//
11//===----------------------------------------------------------------------===//
12
13#include "PowerPCTargetMachine.h"
14#include "PowerPC.h"
15#include "llvm/Module.h"
16#include "llvm/PassManager.h"
17#include "llvm/CodeGen/IntrinsicLowering.h"
18#include "llvm/CodeGen/MachineFunction.h"
19#include "llvm/CodeGen/Passes.h"
20#include "llvm/Target/TargetOptions.h"
21#include "llvm/Target/TargetMachineRegistry.h"
22#include "llvm/Transforms/Scalar.h"
23#include <iostream>
24using namespace llvm;
25
26namespace {
27  // Register the target.
28  RegisterTarget<PowerPCTargetMachine> X("powerpc", "  PowerPC (experimental)");
29}
30
31unsigned PowerPCTargetMachine::getJITMatchQuality() {
32#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)
33  return 10;
34#else
35  return 0;
36#endif
37}
38
39unsigned PowerPCTargetMachine::getModuleMatchQuality(const Module &M) {
40  if (M.getEndianness()  == Module::BigEndian &&
41      M.getPointerSize() == Module::Pointer32)
42    return 10;                                   // Direct match
43  else if (M.getEndianness() != Module::AnyEndianness ||
44           M.getPointerSize() != Module::AnyPointerSize)
45    return 0;                                    // Match for some other target
46
47  return getJITMatchQuality()/2;
48}
49
50
51/// PowerPCTargetMachine ctor - Create an ILP32 architecture model
52///
53PowerPCTargetMachine::PowerPCTargetMachine(const Module &M,
54                                           IntrinsicLowering *IL)
55  : TargetMachine("PowerPC", IL, false, 4, 4, 4, 4, 4, 4, 2, 1, 4),
56    FrameInfo(TargetFrameInfo::StackGrowsDown, 16, -4), JITInfo(*this) {
57}
58
59/// addPassesToEmitAssembly - Add passes to the specified pass manager
60/// to implement a static compiler for this target.
61///
62bool PowerPCTargetMachine::addPassesToEmitAssembly(PassManager &PM,
63                                                   std::ostream &Out) {
64  // FIXME: Implement efficient support for garbage collection intrinsics.
65  PM.add(createLowerGCPass());
66
67  // FIXME: Implement the invoke/unwind instructions!
68  PM.add(createLowerInvokePass());
69
70  // FIXME: Implement the switch instruction in the instruction selector!
71  PM.add(createLowerSwitchPass());
72
73  PM.add(createLowerConstantExpressionsPass());
74
75  // Make sure that no unreachable blocks are instruction selected.
76  PM.add(createUnreachableBlockEliminationPass());
77
78  PM.add(createPPCSimpleInstructionSelector(*this));
79
80  if (PrintMachineCode)
81    PM.add(createMachineFunctionPrinterPass(&std::cerr));
82
83  PM.add(createRegisterAllocator());
84
85  if (PrintMachineCode)
86    PM.add(createMachineFunctionPrinterPass(&std::cerr));
87
88  // I want a PowerPC specific prolog/epilog code inserter so I can put the
89  // fills/spills in the right spots.
90  PM.add(createPowerPCPEI());
91
92  // Must run branch selection immediately preceding the printer
93  PM.add(createPPCBranchSelectionPass());
94  PM.add(createPPCCodePrinterPass(Out, *this));
95  PM.add(createMachineCodeDeleter());
96  return false;
97}
98
99/// addPassesToJITCompile - Add passes to the specified pass manager to
100/// implement a fast dynamic compiler for this target.
101///
102void PowerPCJITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
103  // FIXME: Implement efficient support for garbage collection intrinsics.
104  PM.add(createLowerGCPass());
105
106  // FIXME: Implement the invoke/unwind instructions!
107  PM.add(createLowerInvokePass());
108
109  // FIXME: Implement the switch instruction in the instruction selector!
110  PM.add(createLowerSwitchPass());
111
112  PM.add(createLowerConstantExpressionsPass());
113
114  // Make sure that no unreachable blocks are instruction selected.
115  PM.add(createUnreachableBlockEliminationPass());
116
117  PM.add(createPPCSimpleInstructionSelector(TM));
118  PM.add(createRegisterAllocator());
119  PM.add(createPrologEpilogCodeInserter());
120}
121