PPCTargetMachine.cpp revision 50cdabcfd52e88381ade61450d98a1c757195bef
1//===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// Top-level implementation for the PowerPC target.
11//
12//===----------------------------------------------------------------------===//
13
14#include "PPC.h"
15#include "PPCTargetAsmInfo.h"
16#include "PPCTargetMachine.h"
17#include "llvm/Module.h"
18#include "llvm/PassManager.h"
19#include "llvm/Target/TargetMachineRegistry.h"
20using namespace llvm;
21
22namespace {
23  // Register the targets
24  RegisterTarget<PPC32TargetMachine>
25  X("ppc32", "  PowerPC 32");
26  RegisterTarget<PPC64TargetMachine>
27  Y("ppc64", "  PowerPC 64");
28}
29
30const TargetAsmInfo *PPCTargetMachine::createTargetAsmInfo() const {
31  if (Subtarget.isDarwin())
32    return new DarwinTargetAsmInfo(*this);
33  else
34    return new LinuxTargetAsmInfo(*this);
35}
36
37unsigned PPC32TargetMachine::getJITMatchQuality() {
38#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER) || defined(__PPC__)
39  if (sizeof(void*) == 4)
40    return 10;
41#endif
42  return 0;
43}
44unsigned PPC64TargetMachine::getJITMatchQuality() {
45#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER) || defined(__PPC__)
46  if (sizeof(void*) == 8)
47    return 10;
48#endif
49  return 0;
50}
51
52unsigned PPC32TargetMachine::getModuleMatchQuality(const Module &M) {
53  // We strongly match "powerpc-*".
54  std::string TT = M.getTargetTriple();
55  if (TT.size() >= 8 && std::string(TT.begin(), TT.begin()+8) == "powerpc-")
56    return 20;
57
58  // If the target triple is something non-powerpc, we don't match.
59  if (!TT.empty()) return 0;
60
61  if (M.getEndianness()  == Module::BigEndian &&
62      M.getPointerSize() == Module::Pointer32)
63    return 10;                                   // Weak match
64  else if (M.getEndianness() != Module::AnyEndianness ||
65           M.getPointerSize() != Module::AnyPointerSize)
66    return 0;                                    // Match for some other target
67
68  return getJITMatchQuality()/2;
69}
70
71unsigned PPC64TargetMachine::getModuleMatchQuality(const Module &M) {
72  // We strongly match "powerpc64-*".
73  std::string TT = M.getTargetTriple();
74  if (TT.size() >= 10 && std::string(TT.begin(), TT.begin()+10) == "powerpc64-")
75    return 20;
76
77  if (M.getEndianness()  == Module::BigEndian &&
78      M.getPointerSize() == Module::Pointer64)
79    return 10;                                   // Weak match
80  else if (M.getEndianness() != Module::AnyEndianness ||
81           M.getPointerSize() != Module::AnyPointerSize)
82    return 0;                                    // Match for some other target
83
84  return getJITMatchQuality()/2;
85}
86
87
88PPCTargetMachine::PPCTargetMachine(const Module &M, const std::string &FS,
89                                   bool is64Bit)
90  : Subtarget(*this, M, FS, is64Bit),
91    DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this),
92    FrameInfo(*this, is64Bit), JITInfo(*this, is64Bit), TLInfo(*this),
93    InstrItins(Subtarget.getInstrItineraryData()), MachOWriterInfo(*this) {
94
95  if (getRelocationModel() == Reloc::Default)
96    if (Subtarget.isDarwin())
97      setRelocationModel(Reloc::DynamicNoPIC);
98    else
99      setRelocationModel(Reloc::Static);
100}
101
102/// Override this for PowerPC.  Tail merging happily breaks up instruction issue
103/// groups, which typically degrades performance.
104bool PPCTargetMachine::getEnableTailMergeDefault() const { return false; }
105
106PPC32TargetMachine::PPC32TargetMachine(const Module &M, const std::string &FS)
107  : PPCTargetMachine(M, FS, false) {
108}
109
110
111PPC64TargetMachine::PPC64TargetMachine(const Module &M, const std::string &FS)
112  : PPCTargetMachine(M, FS, true) {
113}
114
115
116//===----------------------------------------------------------------------===//
117// Pass Pipeline Configuration
118//===----------------------------------------------------------------------===//
119
120bool PPCTargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) {
121  // Install an instruction selector.
122  PM.add(createPPCISelDag(*this));
123  return false;
124}
125
126bool PPCTargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) {
127
128  // Must run branch selection immediately preceding the asm printer.
129  PM.add(createPPCBranchSelectionPass());
130  return false;
131}
132
133bool PPCTargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
134                                          std::ostream &Out) {
135  PM.add(createPPCAsmPrinterPass(Out, *this));
136  return false;
137}
138
139bool PPCTargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast,
140                                      bool DumpAsm, MachineCodeEmitter &MCE) {
141  // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
142  // FIXME: This should be moved to TargetJITInfo!!
143  if (Subtarget.isPPC64()) {
144    // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
145    // instructions to materialize arbitrary global variable + function +
146    // constant pool addresses.
147    setRelocationModel(Reloc::PIC_);
148  } else {
149    setRelocationModel(Reloc::Static);
150  }
151
152  // Inform the subtarget that we are in JIT mode.  FIXME: does this break macho
153  // writing?
154  Subtarget.SetJITMode();
155
156  // Machine code emitter pass for PowerPC.
157  PM.add(createPPCCodeEmitterPass(*this, MCE));
158  if (DumpAsm)
159    PM.add(createPPCAsmPrinterPass(*cerr.stream(), *this));
160  return false;
161}
162
163bool PPCTargetMachine::addSimpleCodeEmitter(FunctionPassManager &PM, bool Fast,
164                                            bool DumpAsm, MachineCodeEmitter &MCE) {
165  // Machine code emitter pass for PowerPC.
166  PM.add(createPPCCodeEmitterPass(*this, MCE));
167  if (DumpAsm)
168    PM.add(createPPCAsmPrinterPass(*cerr.stream(), *this));
169  return false;
170}
171