PPCTargetMachine.cpp revision 5d77cad60bd82dfa2d00f78e26443d667922efbf 
1//===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// Top-level implementation for the PowerPC target.
11//
12//===----------------------------------------------------------------------===//
13
14#include "PPC.h"
15#include "PPCTargetAsmInfo.h"
16#include "PPCTargetMachine.h"
17#include "llvm/Module.h"
18#include "llvm/PassManager.h"
19#include "llvm/Target/TargetMachineRegistry.h"
20#include "llvm/Target/TargetOptions.h"
21#include "llvm/Support/FormattedStream.h"
22using namespace llvm;
23
24/// PowerPCTargetMachineModule - Note that this is used on hosts that
25/// cannot link in a library unless there are references into the
26/// library.  In particular, it seems that it is not possible to get
27/// things to work on Win32 without this.  Though it is unused, do not
28/// remove it.
29extern "C" int PowerPCTargetMachineModule;
30int PowerPCTargetMachineModule = 0;
31
32// Register the targets
33extern Target ThePPC32Target;
34static RegisterTarget<PPC32TargetMachine>
35X(ThePPC32Target, "ppc32", "PowerPC 32");
36
37extern Target ThePPC64Target;
38static RegisterTarget<PPC64TargetMachine>
39Y(ThePPC64Target, "ppc64", "PowerPC 64");
40
41// Force static initialization.
42extern "C" void LLVMInitializePowerPCTarget() { }
43
44const TargetAsmInfo *PPCTargetMachine::createTargetAsmInfo() const {
45  if (Subtarget.isDarwin())
46    return new PPCDarwinTargetAsmInfo(*this);
47  else
48    return new PPCLinuxTargetAsmInfo(*this);
49}
50
51PPCTargetMachine::PPCTargetMachine(const Target&T, const Module &M,
52                                   const std::string &FS, bool is64Bit)
53  : LLVMTargetMachine(T),
54    Subtarget(*this, M, FS, is64Bit),
55    DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this),
56    FrameInfo(*this, is64Bit), JITInfo(*this, is64Bit), TLInfo(*this),
57    InstrItins(Subtarget.getInstrItineraryData()), MachOWriterInfo(*this) {
58
59  if (getRelocationModel() == Reloc::Default) {
60    if (Subtarget.isDarwin())
61      setRelocationModel(Reloc::DynamicNoPIC);
62    else
63      setRelocationModel(Reloc::Static);
64  }
65}
66
67/// Override this for PowerPC.  Tail merging happily breaks up instruction issue
68/// groups, which typically degrades performance.
69bool PPCTargetMachine::getEnableTailMergeDefault() const { return false; }
70
71PPC32TargetMachine::PPC32TargetMachine(const Target &T, const Module &M,
72                                       const std::string &FS)
73  : PPCTargetMachine(T, M, FS, false) {
74}
75
76
77PPC64TargetMachine::PPC64TargetMachine(const Target &T, const Module &M,
78                                       const std::string &FS)
79  : PPCTargetMachine(T, M, FS, true) {
80}
81
82
83//===----------------------------------------------------------------------===//
84// Pass Pipeline Configuration
85//===----------------------------------------------------------------------===//
86
87bool PPCTargetMachine::addInstSelector(PassManagerBase &PM,
88                                       CodeGenOpt::Level OptLevel) {
89  // Install an instruction selector.
90  PM.add(createPPCISelDag(*this));
91  return false;
92}
93
94bool PPCTargetMachine::addPreEmitPass(PassManagerBase &PM,
95                                      CodeGenOpt::Level OptLevel) {
96  // Must run branch selection immediately preceding the asm printer.
97  PM.add(createPPCBranchSelectionPass());
98  return false;
99}
100
101bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
102                                      CodeGenOpt::Level OptLevel,
103                                      MachineCodeEmitter &MCE) {
104  // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
105  // FIXME: This should be moved to TargetJITInfo!!
106  if (Subtarget.isPPC64()) {
107    // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
108    // instructions to materialize arbitrary global variable + function +
109    // constant pool addresses.
110    setRelocationModel(Reloc::PIC_);
111    // Temporary workaround for the inability of PPC64 JIT to handle jump
112    // tables.
113    DisableJumpTables = true;
114  } else {
115    setRelocationModel(Reloc::Static);
116  }
117
118  // Inform the subtarget that we are in JIT mode.  FIXME: does this break macho
119  // writing?
120  Subtarget.SetJITMode();
121
122  // Machine code emitter pass for PowerPC.
123  PM.add(createPPCCodeEmitterPass(*this, MCE));
124
125  return false;
126}
127
128bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
129                                      CodeGenOpt::Level OptLevel,
130                                      JITCodeEmitter &JCE) {
131  // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
132  // FIXME: This should be moved to TargetJITInfo!!
133  if (Subtarget.isPPC64()) {
134    // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
135    // instructions to materialize arbitrary global variable + function +
136    // constant pool addresses.
137    setRelocationModel(Reloc::PIC_);
138    // Temporary workaround for the inability of PPC64 JIT to handle jump
139    // tables.
140    DisableJumpTables = true;
141  } else {
142    setRelocationModel(Reloc::Static);
143  }
144
145  // Inform the subtarget that we are in JIT mode.  FIXME: does this break macho
146  // writing?
147  Subtarget.SetJITMode();
148
149  // Machine code emitter pass for PowerPC.
150  PM.add(createPPCJITCodeEmitterPass(*this, JCE));
151
152  return false;
153}
154
155bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
156                                      CodeGenOpt::Level OptLevel,
157                                      ObjectCodeEmitter &OCE) {
158  // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
159  // FIXME: This should be moved to TargetJITInfo!!
160  if (Subtarget.isPPC64()) {
161    // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
162    // instructions to materialize arbitrary global variable + function +
163    // constant pool addresses.
164    setRelocationModel(Reloc::PIC_);
165    // Temporary workaround for the inability of PPC64 JIT to handle jump
166    // tables.
167    DisableJumpTables = true;
168  } else {
169    setRelocationModel(Reloc::Static);
170  }
171
172  // Inform the subtarget that we are in JIT mode.  FIXME: does this break macho
173  // writing?
174  Subtarget.SetJITMode();
175
176  // Machine code emitter pass for PowerPC.
177  PM.add(createPPCObjectCodeEmitterPass(*this, OCE));
178
179  return false;
180}
181
182bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
183                                            CodeGenOpt::Level OptLevel,
184                                            MachineCodeEmitter &MCE) {
185  // Machine code emitter pass for PowerPC.
186  PM.add(createPPCCodeEmitterPass(*this, MCE));
187  return false;
188}
189
190bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
191                                            CodeGenOpt::Level OptLevel,
192                                            JITCodeEmitter &JCE) {
193  // Machine code emitter pass for PowerPC.
194  PM.add(createPPCJITCodeEmitterPass(*this, JCE));
195  return false;
196}
197
198bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
199                                            CodeGenOpt::Level OptLevel,
200                                            ObjectCodeEmitter &OCE) {
201  // Machine code emitter pass for PowerPC.
202  PM.add(createPPCObjectCodeEmitterPass(*this, OCE));
203  return false;
204}
205
206
207