PPCTargetMachine.cpp revision 6c05796294a7a0693d96c0c87194b9d5ddf55a94 
1//===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// Top-level implementation for the PowerPC target.
11//
12//===----------------------------------------------------------------------===//
13
14#include "PPC.h"
15#include "PPCTargetAsmInfo.h"
16#include "PPCTargetMachine.h"
17#include "llvm/Module.h"
18#include "llvm/PassManager.h"
19#include "llvm/Target/TargetMachineRegistry.h"
20#include "llvm/Target/TargetOptions.h"
21#include "llvm/Support/FormattedStream.h"
22using namespace llvm;
23
24/// PowerPCTargetMachineModule - Note that this is used on hosts that
25/// cannot link in a library unless there are references into the
26/// library.  In particular, it seems that it is not possible to get
27/// things to work on Win32 without this.  Though it is unused, do not
28/// remove it.
29extern "C" int PowerPCTargetMachineModule;
30int PowerPCTargetMachineModule = 0;
31
32// Register the targets
33extern Target ThePPC32Target;
34static RegisterTarget<PPC32TargetMachine>
35X(ThePPC32Target, "ppc32", "PowerPC 32");
36
37extern Target ThePPC64Target;
38static RegisterTarget<PPC64TargetMachine>
39Y(ThePPC64Target, "ppc64", "PowerPC 64");
40
41// Force static initialization.
42extern "C" void LLVMInitializePowerPCTarget() { }
43
44// No assembler printer by default
45PPCTargetMachine::AsmPrinterCtorFn PPCTargetMachine::AsmPrinterCtor = 0;
46
47const TargetAsmInfo *PPCTargetMachine::createTargetAsmInfo() const {
48  if (Subtarget.isDarwin())
49    return new PPCDarwinTargetAsmInfo(*this);
50  else
51    return new PPCLinuxTargetAsmInfo(*this);
52}
53
54PPCTargetMachine::PPCTargetMachine(const Target&T, const Module &M,
55                                   const std::string &FS, bool is64Bit)
56  : LLVMTargetMachine(T),
57    Subtarget(*this, M, FS, is64Bit),
58    DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this),
59    FrameInfo(*this, is64Bit), JITInfo(*this, is64Bit), TLInfo(*this),
60    InstrItins(Subtarget.getInstrItineraryData()), MachOWriterInfo(*this) {
61
62  if (getRelocationModel() == Reloc::Default) {
63    if (Subtarget.isDarwin())
64      setRelocationModel(Reloc::DynamicNoPIC);
65    else
66      setRelocationModel(Reloc::Static);
67  }
68}
69
70/// Override this for PowerPC.  Tail merging happily breaks up instruction issue
71/// groups, which typically degrades performance.
72bool PPCTargetMachine::getEnableTailMergeDefault() const { return false; }
73
74PPC32TargetMachine::PPC32TargetMachine(const Target &T, const Module &M,
75                                       const std::string &FS)
76  : PPCTargetMachine(T, M, FS, false) {
77}
78
79
80PPC64TargetMachine::PPC64TargetMachine(const Target &T, const Module &M,
81                                       const std::string &FS)
82  : PPCTargetMachine(T, M, FS, true) {
83}
84
85
86//===----------------------------------------------------------------------===//
87// Pass Pipeline Configuration
88//===----------------------------------------------------------------------===//
89
90bool PPCTargetMachine::addInstSelector(PassManagerBase &PM,
91                                       CodeGenOpt::Level OptLevel) {
92  // Install an instruction selector.
93  PM.add(createPPCISelDag(*this));
94  return false;
95}
96
97bool PPCTargetMachine::addPreEmitPass(PassManagerBase &PM,
98                                      CodeGenOpt::Level OptLevel) {
99  // Must run branch selection immediately preceding the asm printer.
100  PM.add(createPPCBranchSelectionPass());
101  return false;
102}
103
104bool PPCTargetMachine::addAssemblyEmitter(PassManagerBase &PM,
105                                          CodeGenOpt::Level OptLevel,
106                                          bool Verbose,
107                                          formatted_raw_ostream &Out) {
108  assert(AsmPrinterCtor && "AsmPrinter was not linked in");
109  if (AsmPrinterCtor)
110    PM.add(AsmPrinterCtor(Out, *this, Verbose));
111
112  return false;
113}
114
115bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
116                                      CodeGenOpt::Level OptLevel,
117                                      bool DumpAsm, MachineCodeEmitter &MCE) {
118  // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
119  // FIXME: This should be moved to TargetJITInfo!!
120  if (Subtarget.isPPC64()) {
121    // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
122    // instructions to materialize arbitrary global variable + function +
123    // constant pool addresses.
124    setRelocationModel(Reloc::PIC_);
125    // Temporary workaround for the inability of PPC64 JIT to handle jump
126    // tables.
127    DisableJumpTables = true;
128  } else {
129    setRelocationModel(Reloc::Static);
130  }
131
132  // Inform the subtarget that we are in JIT mode.  FIXME: does this break macho
133  // writing?
134  Subtarget.SetJITMode();
135
136  // Machine code emitter pass for PowerPC.
137  PM.add(createPPCCodeEmitterPass(*this, MCE));
138  if (DumpAsm) {
139    assert(AsmPrinterCtor && "AsmPrinter was not linked in");
140    if (AsmPrinterCtor)
141      PM.add(AsmPrinterCtor(ferrs(), *this, true));
142  }
143
144  return false;
145}
146
147bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
148                                      CodeGenOpt::Level OptLevel,
149                                      bool DumpAsm, JITCodeEmitter &JCE) {
150  // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
151  // FIXME: This should be moved to TargetJITInfo!!
152  if (Subtarget.isPPC64()) {
153    // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
154    // instructions to materialize arbitrary global variable + function +
155    // constant pool addresses.
156    setRelocationModel(Reloc::PIC_);
157    // Temporary workaround for the inability of PPC64 JIT to handle jump
158    // tables.
159    DisableJumpTables = true;
160  } else {
161    setRelocationModel(Reloc::Static);
162  }
163
164  // Inform the subtarget that we are in JIT mode.  FIXME: does this break macho
165  // writing?
166  Subtarget.SetJITMode();
167
168  // Machine code emitter pass for PowerPC.
169  PM.add(createPPCJITCodeEmitterPass(*this, JCE));
170  if (DumpAsm) {
171    assert(AsmPrinterCtor && "AsmPrinter was not linked in");
172    if (AsmPrinterCtor)
173      PM.add(AsmPrinterCtor(ferrs(), *this, true));
174  }
175
176  return false;
177}
178
179bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
180                                      CodeGenOpt::Level OptLevel,
181                                      bool DumpAsm, ObjectCodeEmitter &OCE) {
182  // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
183  // FIXME: This should be moved to TargetJITInfo!!
184  if (Subtarget.isPPC64()) {
185    // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
186    // instructions to materialize arbitrary global variable + function +
187    // constant pool addresses.
188    setRelocationModel(Reloc::PIC_);
189    // Temporary workaround for the inability of PPC64 JIT to handle jump
190    // tables.
191    DisableJumpTables = true;
192  } else {
193    setRelocationModel(Reloc::Static);
194  }
195
196  // Inform the subtarget that we are in JIT mode.  FIXME: does this break macho
197  // writing?
198  Subtarget.SetJITMode();
199
200  // Machine code emitter pass for PowerPC.
201  PM.add(createPPCObjectCodeEmitterPass(*this, OCE));
202  if (DumpAsm) {
203    assert(AsmPrinterCtor && "AsmPrinter was not linked in");
204    if (AsmPrinterCtor)
205      PM.add(AsmPrinterCtor(ferrs(), *this, true));
206  }
207
208  return false;
209}
210
211bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
212                                            CodeGenOpt::Level OptLevel,
213                                            bool DumpAsm,
214                                            MachineCodeEmitter &MCE) {
215  // Machine code emitter pass for PowerPC.
216  PM.add(createPPCCodeEmitterPass(*this, MCE));
217  if (DumpAsm) {
218    assert(AsmPrinterCtor && "AsmPrinter was not linked in");
219    if (AsmPrinterCtor)
220      PM.add(AsmPrinterCtor(ferrs(), *this, true));
221  }
222
223  return false;
224}
225
226bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
227                                            CodeGenOpt::Level OptLevel,
228                                            bool DumpAsm,
229                                            JITCodeEmitter &JCE) {
230  // Machine code emitter pass for PowerPC.
231  PM.add(createPPCJITCodeEmitterPass(*this, JCE));
232  if (DumpAsm) {
233    assert(AsmPrinterCtor && "AsmPrinter was not linked in");
234    if (AsmPrinterCtor)
235      PM.add(AsmPrinterCtor(ferrs(), *this, true));
236  }
237
238  return false;
239}
240
241bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
242                                            CodeGenOpt::Level OptLevel,
243                                            bool DumpAsm,
244                                            ObjectCodeEmitter &OCE) {
245  // Machine code emitter pass for PowerPC.
246  PM.add(createPPCObjectCodeEmitterPass(*this, OCE));
247  if (DumpAsm) {
248    assert(AsmPrinterCtor && "AsmPrinter was not linked in");
249    if (AsmPrinterCtor)
250      PM.add(AsmPrinterCtor(ferrs(), *this, true));
251  }
252
253  return false;
254}
255
256
257