PPCTargetMachine.cpp revision 6f14ad1ca0647d0111605f2ac78e0a0756be6fd7
1//===-- PowerPCTargetMachine.cpp - Define TargetMachine for PowerPC -------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// 11//===----------------------------------------------------------------------===// 12 13#include "PowerPCTargetMachine.h" 14#include "PowerPC.h" 15#include "llvm/Module.h" 16#include "llvm/PassManager.h" 17#include "llvm/CodeGen/IntrinsicLowering.h" 18#include "llvm/CodeGen/MachineFunction.h" 19#include "llvm/CodeGen/Passes.h" 20#include "llvm/Target/TargetOptions.h" 21#include "llvm/Target/TargetMachineRegistry.h" 22#include "llvm/Transforms/IPO.h" 23#include "llvm/Transforms/Scalar.h" 24#include <iostream> 25using namespace llvm; 26 27namespace { 28 // Register the target. 29 RegisterTarget<PowerPCTargetMachine> X("powerpc", " PowerPC (experimental)"); 30} 31 32unsigned PowerPCTargetMachine::getJITMatchQuality() { 33#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER) 34 return 10; 35#else 36 return 0; 37#endif 38} 39 40unsigned PowerPCTargetMachine::getModuleMatchQuality(const Module &M) { 41 if (M.getEndianness() == Module::BigEndian && 42 M.getPointerSize() == Module::Pointer32) 43 return 10; // Direct match 44 else if (M.getEndianness() != Module::AnyEndianness || 45 M.getPointerSize() != Module::AnyPointerSize) 46 return 0; // Match for some other target 47 48 return getJITMatchQuality()/2; 49} 50 51 52/// PowerPCTargetMachine ctor - Create an ILP32 architecture model 53/// 54PowerPCTargetMachine::PowerPCTargetMachine(const Module &M, 55 IntrinsicLowering *IL) 56 : TargetMachine("PowerPC", IL, false, 4, 4, 8, 4, 4, 4, 4, 4), 57 FrameInfo(TargetFrameInfo::StackGrowsDown, 16, -4), JITInfo(*this) { 58} 59 60/// addPassesToEmitAssembly - Add passes to the specified pass manager 61/// to implement a static compiler for this target. 62/// 63bool PowerPCTargetMachine::addPassesToEmitAssembly(PassManager &PM, 64 std::ostream &Out) { 65 // FIXME: Implement efficient support for garbage collection intrinsics. 66 PM.add(createLowerGCPass()); 67 68 // FIXME: Implement the invoke/unwind instructions! 69 PM.add(createLowerInvokePass()); 70 71 // FIXME: Implement the switch instruction in the instruction selector! 72 PM.add(createLowerSwitchPass()); 73 74 PM.add(createLowerConstantExpressionsPass()); 75 76 // Make sure that no unreachable blocks are instruction selected. 77 PM.add(createUnreachableBlockEliminationPass()); 78 79 PM.add(createPPCSimpleInstructionSelector(*this)); 80 81 if (PrintMachineCode) 82 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 83 84 PM.add(createRegisterAllocator()); 85 86 if (PrintMachineCode) 87 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 88 89 PM.add(createPrologEpilogCodeInserter()); 90 PM.add(createPPCCodePrinterPass(Out, *this)); 91 PM.add(createMachineCodeDeleter()); 92 return false; 93} 94 95/// addPassesToJITCompile - Add passes to the specified pass manager to 96/// implement a fast dynamic compiler for this target. 97/// 98void PowerPCJITInfo::addPassesToJITCompile(FunctionPassManager &PM) { 99 // FIXME: Implement efficient support for garbage collection intrinsics. 100 PM.add(createLowerGCPass()); 101 102 // FIXME: Implement the invoke/unwind instructions! 103 PM.add(createLowerInvokePass()); 104 105 // FIXME: Implement the switch instruction in the instruction selector! 106 PM.add(createLowerSwitchPass()); 107 108 PM.add(createLowerConstantExpressionsPass()); 109 110 // Make sure that no unreachable blocks are instruction selected. 111 PM.add(createUnreachableBlockEliminationPass()); 112 113 PM.add(createPPCSimpleInstructionSelector(TM)); 114 PM.add(createRegisterAllocator()); 115 PM.add(createPrologEpilogCodeInserter()); 116} 117