PPCTargetMachine.cpp revision ca068e861b7f1184d31f6c8f26f88feb076badf1 
1//===-- PowerPCTargetMachine.cpp - Define TargetMachine for PowerPC -------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10//
11//===----------------------------------------------------------------------===//
12
13#include "PowerPC.h"
14#include "PowerPCTargetMachine.h"
15#include "PowerPCFrameInfo.h"
16#include "PPC32TargetMachine.h"
17#include "PPC64TargetMachine.h"
18#include "PPC32JITInfo.h"
19#include "PPC64JITInfo.h"
20#include "llvm/Module.h"
21#include "llvm/PassManager.h"
22#include "llvm/CodeGen/IntrinsicLowering.h"
23#include "llvm/CodeGen/MachineFunction.h"
24#include "llvm/CodeGen/Passes.h"
25#include "llvm/Target/TargetOptions.h"
26#include "llvm/Target/TargetMachineRegistry.h"
27#include "llvm/Transforms/Scalar.h"
28#include "Support/CommandLine.h"
29#include <iostream>
30using namespace llvm;
31
32namespace llvm {
33  cl::opt<bool> AIX("aix",
34                    cl::desc("Generate AIX/xcoff instead of Darwin/MachO"),
35                    cl::Hidden);
36}
37
38namespace {
39  const std::string PPC32 = "PowerPC/32bit";
40  const std::string PPC64 = "PowerPC/64bit";
41
42  // Register the targets
43  RegisterTarget<PPC32TargetMachine>
44  X("ppc32", "  PowerPC 32-bit (experimental)");
45  //RegisterTarget<PPC64TargetMachine>
46  //Y("ppc64", "  PowerPC 64-bit (unimplemented)");
47}
48
49PowerPCTargetMachine::PowerPCTargetMachine(const std::string &name,
50                                           IntrinsicLowering *IL,
51                                           const TargetData &TD,
52                                           const PowerPCFrameInfo &TFI,
53                                           const PowerPCJITInfo &TJI,
54                                           bool is64b)
55  : TargetMachine(name, IL, TD), InstrInfo(is64b), FrameInfo(TFI), JITInfo(TJI)
56{}
57
58unsigned PowerPCTargetMachine::getJITMatchQuality() {
59#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)
60  return 10;
61#else
62  return 0;
63#endif
64}
65
66/// addPassesToEmitAssembly - Add passes to the specified pass manager
67/// to implement a static compiler for this target.
68///
69bool PowerPCTargetMachine::addPassesToEmitAssembly(PassManager &PM,
70                                                   std::ostream &Out) {
71  bool LP64 = (0 != dynamic_cast<PPC64TargetMachine *>(this));
72
73  // FIXME: Implement efficient support for garbage collection intrinsics.
74  PM.add(createLowerGCPass());
75
76  // FIXME: Implement the invoke/unwind instructions!
77  PM.add(createLowerInvokePass());
78
79  // FIXME: Implement the switch instruction in the instruction selector!
80  PM.add(createLowerSwitchPass());
81
82  PM.add(createLowerConstantExpressionsPass());
83
84  // Make sure that no unreachable blocks are instruction selected.
85  PM.add(createUnreachableBlockEliminationPass());
86
87  if (LP64)
88    PM.add(createPPC64ISelSimple(*this));
89  else
90    PM.add(createPPC32ISelSimple(*this));
91
92  if (PrintMachineCode)
93    PM.add(createMachineFunctionPrinterPass(&std::cerr));
94
95  PM.add(createRegisterAllocator());
96
97  if (PrintMachineCode)
98    PM.add(createMachineFunctionPrinterPass(&std::cerr));
99
100  PM.add(createPrologEpilogCodeInserter());
101
102  // Must run branch selection immediately preceding the asm printer
103  PM.add(createPPCBranchSelectionPass());
104
105  if (AIX)
106    PM.add(createPPC64AsmPrinter(Out, *this));
107  else
108    PM.add(createPPCAsmPrinter(Out, *this));
109
110  PM.add(createMachineCodeDeleter());
111  return false;
112}
113
114void PowerPCJITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
115  // FIXME: Implement efficient support for garbage collection intrinsics.
116  PM.add(createLowerGCPass());
117
118  // FIXME: Implement the invoke/unwind instructions!
119  PM.add(createLowerInvokePass());
120
121  // FIXME: Implement the switch instruction in the instruction selector!
122  PM.add(createLowerSwitchPass());
123
124  PM.add(createLowerConstantExpressionsPass());
125
126  // Make sure that no unreachable blocks are instruction selected.
127  PM.add(createUnreachableBlockEliminationPass());
128
129  PM.add(createPPC32ISelSimple(TM));
130  PM.add(createRegisterAllocator());
131  PM.add(createPrologEpilogCodeInserter());
132}
133
134void PowerPCJITInfo::replaceMachineCodeForFunction(void *Old, void *New) {
135  assert(0 && "Cannot execute PowerPCJITInfo::replaceMachineCodeForFunction()");
136}
137
138void *PowerPCJITInfo::getJITStubForFunction(Function *F,
139                                            MachineCodeEmitter &MCE) {
140  assert(0 && "Cannot execute PowerPCJITInfo::getJITStubForFunction()");
141  return 0;
142}
143
144/// PowerPCTargetMachine ctor - Create an ILP32 architecture model
145///
146PPC32TargetMachine::PPC32TargetMachine(const Module &M,
147                                               IntrinsicLowering *IL)
148  : PowerPCTargetMachine(PPC32, IL,
149                         TargetData(PPC32,false,4,4,4,4,4,4,2,1,4),
150                         PowerPCFrameInfo(*this), PPC32JITInfo(*this), false) {}
151
152/// PPC64TargetMachine ctor - Create a LP64 architecture model
153///
154PPC64TargetMachine::PPC64TargetMachine(const Module &M, IntrinsicLowering *IL)
155  : PowerPCTargetMachine(PPC64, IL,
156                         TargetData(PPC64,false,8,4,4,4,4,4,2,1,4),
157                         PowerPCFrameInfo(*this), PPC64JITInfo(*this), true) {}
158
159unsigned PPC32TargetMachine::getModuleMatchQuality(const Module &M) {
160  if (M.getEndianness()  == Module::BigEndian &&
161      M.getPointerSize() == Module::Pointer32)
162    return 10;                                   // Direct match
163  else if (M.getEndianness() != Module::AnyEndianness ||
164           M.getPointerSize() != Module::AnyPointerSize)
165    return 0;                                    // Match for some other target
166
167  return getJITMatchQuality()/2;
168}
169
170unsigned PPC64TargetMachine::getModuleMatchQuality(const Module &M) {
171  if (M.getEndianness()  == Module::BigEndian &&
172      M.getPointerSize() == Module::Pointer64)
173    return 10;                                   // Direct match
174  else if (M.getEndianness() != Module::AnyEndianness ||
175           M.getPointerSize() != Module::AnyPointerSize)
176    return 0;                                    // Match for some other target
177
178  return getJITMatchQuality()/2;
179}
180