PPCTargetMachine.cpp revision cbd9a19b5d6ff93efa82c467508ede78b8af3bac 
1//===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// Top-level implementation for the PowerPC target.
11//
12//===----------------------------------------------------------------------===//
13
14#include "PPCTargetMachine.h"
15#include "PPC.h"
16#include "llvm/PassManager.h"
17#include "llvm/MC/MCStreamer.h"
18#include "llvm/CodeGen/Passes.h"
19#include "llvm/Target/TargetOptions.h"
20#include "llvm/Support/CommandLine.h"
21#include "llvm/Support/FormattedStream.h"
22#include "llvm/Support/TargetRegistry.h"
23using namespace llvm;
24
25static cl::
26opt<bool> DisableCTRLoops("disable-ppc-ctrloops", cl::Hidden,
27                        cl::desc("Disable CTR loops for PPC"));
28
29extern "C" void LLVMInitializePowerPCTarget() {
30  // Register the targets
31  RegisterTargetMachine<PPC32TargetMachine> A(ThePPC32Target);
32  RegisterTargetMachine<PPC64TargetMachine> B(ThePPC64Target);
33}
34
35PPCTargetMachine::PPCTargetMachine(const Target &T, StringRef TT,
36                                   StringRef CPU, StringRef FS,
37                                   const TargetOptions &Options,
38                                   Reloc::Model RM, CodeModel::Model CM,
39                                   CodeGenOpt::Level OL,
40                                   bool is64Bit)
41  : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
42    Subtarget(TT, CPU, FS, is64Bit),
43    DL(Subtarget.getDataLayoutString()), InstrInfo(*this),
44    FrameLowering(Subtarget), JITInfo(*this, is64Bit),
45    TLInfo(*this), TSInfo(*this),
46    InstrItins(Subtarget.getInstrItineraryData()),
47    STTI(&TLInfo){
48
49  // The binutils for the BG/P are too old for CFI.
50  if (Subtarget.isBGP())
51    setMCUseCFI(false);
52}
53
54void PPC32TargetMachine::anchor() { }
55
56PPC32TargetMachine::PPC32TargetMachine(const Target &T, StringRef TT,
57                                       StringRef CPU, StringRef FS,
58                                       const TargetOptions &Options,
59                                       Reloc::Model RM, CodeModel::Model CM,
60                                       CodeGenOpt::Level OL)
61  : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {
62}
63
64void PPC64TargetMachine::anchor() { }
65
66PPC64TargetMachine::PPC64TargetMachine(const Target &T, StringRef TT,
67                                       StringRef CPU,  StringRef FS,
68                                       const TargetOptions &Options,
69                                       Reloc::Model RM, CodeModel::Model CM,
70                                       CodeGenOpt::Level OL)
71  : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {
72}
73
74
75//===----------------------------------------------------------------------===//
76// Pass Pipeline Configuration
77//===----------------------------------------------------------------------===//
78
79namespace {
80/// PPC Code Generator Pass Configuration Options.
81class PPCPassConfig : public TargetPassConfig {
82public:
83  PPCPassConfig(PPCTargetMachine *TM, PassManagerBase &PM)
84    : TargetPassConfig(TM, PM) {}
85
86  PPCTargetMachine &getPPCTargetMachine() const {
87    return getTM<PPCTargetMachine>();
88  }
89
90  virtual bool addPreRegAlloc();
91  virtual bool addInstSelector();
92  virtual bool addPreEmitPass();
93};
94} // namespace
95
96TargetPassConfig *PPCTargetMachine::createPassConfig(PassManagerBase &PM) {
97  return new PPCPassConfig(this, PM);
98}
99
100bool PPCPassConfig::addPreRegAlloc() {
101  if (!DisableCTRLoops && getOptLevel() != CodeGenOpt::None)
102    addPass(createPPCCTRLoops());
103
104  return false;
105}
106
107bool PPCPassConfig::addInstSelector() {
108  // Install an instruction selector.
109  addPass(createPPCISelDag(getPPCTargetMachine()));
110  return false;
111}
112
113bool PPCPassConfig::addPreEmitPass() {
114  // Must run branch selection immediately preceding the asm printer.
115  addPass(createPPCBranchSelectionPass());
116  return false;
117}
118
119bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
120                                      JITCodeEmitter &JCE) {
121  // Inform the subtarget that we are in JIT mode.  FIXME: does this break macho
122  // writing?
123  Subtarget.SetJITMode();
124
125  // Machine code emitter pass for PowerPC.
126  PM.add(createPPCJITCodeEmitterPass(*this, JCE));
127
128  return false;
129}
130