PPCTargetMachine.h revision a1514e24cc24b050f53a12650e047799358833a1 
1//===-- PPCTargetMachine.h - Define TargetMachine for PowerPC ---*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file declares the PowerPC specific subclass of TargetMachine.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef PPC_TARGETMACHINE_H
15#define PPC_TARGETMACHINE_H
16
17#include "PPCFrameLowering.h"
18#include "PPCISelLowering.h"
19#include "PPCInstrInfo.h"
20#include "PPCJITInfo.h"
21#include "PPCSelectionDAGInfo.h"
22#include "PPCSubtarget.h"
23#include "llvm/DataLayout.h"
24#include "llvm/Target/TargetMachine.h"
25#include "llvm/Target/TargetTransformImpl.h"
26
27namespace llvm {
28
29/// PPCTargetMachine - Common code between 32-bit and 64-bit PowerPC targets.
30///
31class PPCTargetMachine : public LLVMTargetMachine {
32  PPCSubtarget        Subtarget;
33  const DataLayout    DL;       // Calculates type size & alignment
34  PPCInstrInfo        InstrInfo;
35  PPCFrameLowering    FrameLowering;
36  PPCJITInfo          JITInfo;
37  PPCTargetLowering   TLInfo;
38  PPCSelectionDAGInfo TSInfo;
39  InstrItineraryData  InstrItins;
40  ScalarTargetTransformImpl STTI;
41  VectorTargetTransformImpl VTTI;
42
43public:
44  PPCTargetMachine(const Target &T, StringRef TT,
45                   StringRef CPU, StringRef FS, const TargetOptions &Options,
46                   Reloc::Model RM, CodeModel::Model CM,
47                   CodeGenOpt::Level OL, bool is64Bit);
48
49  virtual const PPCInstrInfo      *getInstrInfo() const { return &InstrInfo; }
50  virtual const PPCFrameLowering  *getFrameLowering() const {
51    return &FrameLowering;
52  }
53  virtual       PPCJITInfo        *getJITInfo()         { return &JITInfo; }
54  virtual const PPCTargetLowering *getTargetLowering() const {
55   return &TLInfo;
56  }
57  virtual const PPCSelectionDAGInfo* getSelectionDAGInfo() const {
58    return &TSInfo;
59  }
60  virtual const PPCRegisterInfo   *getRegisterInfo() const {
61    return &InstrInfo.getRegisterInfo();
62  }
63
64  virtual const DataLayout    *getDataLayout() const    { return &DL; }
65  virtual const PPCSubtarget  *getSubtargetImpl() const { return &Subtarget; }
66  virtual const InstrItineraryData *getInstrItineraryData() const {
67    return &InstrItins;
68  }
69  virtual const ScalarTargetTransformInfo *getScalarTargetTransformInfo()const {
70    return &STTI;
71  }
72  virtual const VectorTargetTransformInfo *getVectorTargetTransformInfo()const {
73    return &VTTI;
74  }
75
76  // Pass Pipeline Configuration
77  virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
78  virtual bool addCodeEmitter(PassManagerBase &PM,
79                              JITCodeEmitter &JCE);
80};
81
82/// PPC32TargetMachine - PowerPC 32-bit target machine.
83///
84class PPC32TargetMachine : public PPCTargetMachine {
85  virtual void anchor();
86public:
87  PPC32TargetMachine(const Target &T, StringRef TT,
88                     StringRef CPU, StringRef FS, const TargetOptions &Options,
89                     Reloc::Model RM, CodeModel::Model CM,
90                     CodeGenOpt::Level OL);
91};
92
93/// PPC64TargetMachine - PowerPC 64-bit target machine.
94///
95class PPC64TargetMachine : public PPCTargetMachine {
96  virtual void anchor();
97public:
98  PPC64TargetMachine(const Target &T, StringRef TT,
99                     StringRef CPU, StringRef FS, const TargetOptions &Options,
100                     Reloc::Model RM, CodeModel::Model CM,
101                     CodeGenOpt::Level OL);
102};
103
104} // end namespace llvm
105
106#endif
107