AMDGPUAsmPrinter.cpp revision 5c35290fa35ae234fed02496404cb0fc37e1c8a5
1f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard//===-- AMDGPUAsmPrinter.cpp - AMDGPU Assebly printer --------------------===// 2f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 3f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// The LLVM Compiler Infrastructure 4f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 5f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// This file is distributed under the University of Illinois Open Source 6f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// License. See LICENSE.TXT for details. 7f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 8f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard//===----------------------------------------------------------------------===// 9f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 10f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard/// \file 11f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard/// 12f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard/// The AMDGPUAsmPrinter is used to print both assembly string and also binary 13f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard/// code. When passed an MCAsmStreamer it prints assembly and when passed 14f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard/// an MCObjectStreamer it outputs binary code. 15f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 16f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard//===----------------------------------------------------------------------===// 17f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 18f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 19f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 20f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard#include "AMDGPUAsmPrinter.h" 21f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard#include "AMDGPU.h" 22f07b5373d7493d29cd758ababf135c2d0d8da127Tom Stellard#include "R600Defines.h" 232a74639bc7713146b1182328892807c421c84265Vincent Lejeune#include "R600MachineFunctionInfo.h" 24141ca7fc6488bfb20ad59854cc12039e16688ed3Vincent Lejeune#include "R600RegisterInfo.h" 255c35290fa35ae234fed02496404cb0fc37e1c8a5Benjamin Kramer#include "SIDefines.h" 265c35290fa35ae234fed02496404cb0fc37e1c8a5Benjamin Kramer#include "SIMachineFunctionInfo.h" 275c35290fa35ae234fed02496404cb0fc37e1c8a5Benjamin Kramer#include "SIRegisterInfo.h" 28bf1efe642111043eeb7ccaf3da759f4d2d1e4647Tom Stellard#include "llvm/MC/MCContext.h" 29bf1efe642111043eeb7ccaf3da759f4d2d1e4647Tom Stellard#include "llvm/MC/MCSectionELF.h" 30f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard#include "llvm/MC/MCStreamer.h" 31bf1efe642111043eeb7ccaf3da759f4d2d1e4647Tom Stellard#include "llvm/Support/ELF.h" 32f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard#include "llvm/Support/TargetRegistry.h" 3358a2cbef4aac9ee7d530dfb690c78d6fc11a2371Chandler Carruth#include "llvm/Target/TargetLoweringObjectFile.h" 34f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 35f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardusing namespace llvm; 36f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 37f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 38f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardstatic AsmPrinter *createAMDGPUAsmPrinterPass(TargetMachine &tm, 39f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard MCStreamer &Streamer) { 40f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return new AMDGPUAsmPrinter(tm, Streamer); 41f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard} 42f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 43f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardextern "C" void LLVMInitializeR600AsmPrinter() { 44f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard TargetRegistry::RegisterAsmPrinter(TheAMDGPUTarget, createAMDGPUAsmPrinterPass); 45f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard} 46f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 47f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard/// We need to override this function so we can avoid 48f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard/// the call to EmitFunctionHeader(), which the MCPureStreamer can't handle. 49f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardbool AMDGPUAsmPrinter::runOnMachineFunction(MachineFunction &MF) { 50f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard const AMDGPUSubtarget &STM = TM.getSubtarget<AMDGPUSubtarget>(); 51f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard if (STM.dumpCode()) { 52f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 53f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard MF.dump(); 54f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard#endif 55f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } 56f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SetupMachineFunction(MF); 573ce2ec847885b004c768869b825be1ff9d98eca3Tom Stellard if (OutStreamer.hasRawTextSupport()) { 583ce2ec847885b004c768869b825be1ff9d98eca3Tom Stellard OutStreamer.EmitRawText("@" + MF.getName() + ":"); 593ce2ec847885b004c768869b825be1ff9d98eca3Tom Stellard } 60141ca7fc6488bfb20ad59854cc12039e16688ed3Vincent Lejeune 61141ca7fc6488bfb20ad59854cc12039e16688ed3Vincent Lejeune const MCSectionELF *ConfigSection = getObjFileLowering().getContext() 62141ca7fc6488bfb20ad59854cc12039e16688ed3Vincent Lejeune .getELFSection(".AMDGPU.config", 6387cba4a4c1d5b8b026c83b0916b37255600ecd5fTom Stellard ELF::SHT_PROGBITS, 0, 64141ca7fc6488bfb20ad59854cc12039e16688ed3Vincent Lejeune SectionKind::getReadOnly()); 65141ca7fc6488bfb20ad59854cc12039e16688ed3Vincent Lejeune OutStreamer.SwitchSection(ConfigSection); 66f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard if (STM.device()->getGeneration() > AMDGPUDeviceInfo::HD6XXX) { 67141ca7fc6488bfb20ad59854cc12039e16688ed3Vincent Lejeune EmitProgramInfoSI(MF); 68141ca7fc6488bfb20ad59854cc12039e16688ed3Vincent Lejeune } else { 69141ca7fc6488bfb20ad59854cc12039e16688ed3Vincent Lejeune EmitProgramInfoR600(MF); 70f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } 71bf1efe642111043eeb7ccaf3da759f4d2d1e4647Tom Stellard OutStreamer.SwitchSection(getObjFileLowering().getTextSection()); 72f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard EmitFunctionBody(); 73f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return false; 74f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard} 75f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 76141ca7fc6488bfb20ad59854cc12039e16688ed3Vincent Lejeunevoid AMDGPUAsmPrinter::EmitProgramInfoR600(MachineFunction &MF) { 77141ca7fc6488bfb20ad59854cc12039e16688ed3Vincent Lejeune unsigned MaxGPR = 0; 7886cdb704174828b8e91e94132a19634e3c11d87dVincent Lejeune bool killPixel = false; 79141ca7fc6488bfb20ad59854cc12039e16688ed3Vincent Lejeune const R600RegisterInfo * RI = 80141ca7fc6488bfb20ad59854cc12039e16688ed3Vincent Lejeune static_cast<const R600RegisterInfo*>(TM.getRegisterInfo()); 812a74639bc7713146b1182328892807c421c84265Vincent Lejeune R600MachineFunctionInfo *MFI = MF.getInfo<R600MachineFunctionInfo>(); 82f07b5373d7493d29cd758ababf135c2d0d8da127Tom Stellard const AMDGPUSubtarget &STM = TM.getSubtarget<AMDGPUSubtarget>(); 83141ca7fc6488bfb20ad59854cc12039e16688ed3Vincent Lejeune 84141ca7fc6488bfb20ad59854cc12039e16688ed3Vincent Lejeune for (MachineFunction::iterator BB = MF.begin(), BB_E = MF.end(); 85141ca7fc6488bfb20ad59854cc12039e16688ed3Vincent Lejeune BB != BB_E; ++BB) { 86141ca7fc6488bfb20ad59854cc12039e16688ed3Vincent Lejeune MachineBasicBlock &MBB = *BB; 87141ca7fc6488bfb20ad59854cc12039e16688ed3Vincent Lejeune for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); 88141ca7fc6488bfb20ad59854cc12039e16688ed3Vincent Lejeune I != E; ++I) { 89141ca7fc6488bfb20ad59854cc12039e16688ed3Vincent Lejeune MachineInstr &MI = *I; 9086cdb704174828b8e91e94132a19634e3c11d87dVincent Lejeune if (MI.getOpcode() == AMDGPU::KILLGT) 9186cdb704174828b8e91e94132a19634e3c11d87dVincent Lejeune killPixel = true; 92141ca7fc6488bfb20ad59854cc12039e16688ed3Vincent Lejeune unsigned numOperands = MI.getNumOperands(); 93141ca7fc6488bfb20ad59854cc12039e16688ed3Vincent Lejeune for (unsigned op_idx = 0; op_idx < numOperands; op_idx++) { 94141ca7fc6488bfb20ad59854cc12039e16688ed3Vincent Lejeune MachineOperand & MO = MI.getOperand(op_idx); 95141ca7fc6488bfb20ad59854cc12039e16688ed3Vincent Lejeune if (!MO.isReg()) 96141ca7fc6488bfb20ad59854cc12039e16688ed3Vincent Lejeune continue; 97141ca7fc6488bfb20ad59854cc12039e16688ed3Vincent Lejeune unsigned HWReg = RI->getEncodingValue(MO.getReg()) & 0xff; 98141ca7fc6488bfb20ad59854cc12039e16688ed3Vincent Lejeune 99141ca7fc6488bfb20ad59854cc12039e16688ed3Vincent Lejeune // Register with value > 127 aren't GPR 100141ca7fc6488bfb20ad59854cc12039e16688ed3Vincent Lejeune if (HWReg > 127) 101141ca7fc6488bfb20ad59854cc12039e16688ed3Vincent Lejeune continue; 102141ca7fc6488bfb20ad59854cc12039e16688ed3Vincent Lejeune MaxGPR = std::max(MaxGPR, HWReg); 103141ca7fc6488bfb20ad59854cc12039e16688ed3Vincent Lejeune } 104141ca7fc6488bfb20ad59854cc12039e16688ed3Vincent Lejeune } 105141ca7fc6488bfb20ad59854cc12039e16688ed3Vincent Lejeune } 106f07b5373d7493d29cd758ababf135c2d0d8da127Tom Stellard 107f07b5373d7493d29cd758ababf135c2d0d8da127Tom Stellard unsigned RsrcReg; 108f07b5373d7493d29cd758ababf135c2d0d8da127Tom Stellard if (STM.device()->getGeneration() >= AMDGPUDeviceInfo::HD5XXX) { 109f07b5373d7493d29cd758ababf135c2d0d8da127Tom Stellard // Evergreen / Northern Islands 110f07b5373d7493d29cd758ababf135c2d0d8da127Tom Stellard switch (MFI->ShaderType) { 111f07b5373d7493d29cd758ababf135c2d0d8da127Tom Stellard default: // Fall through 112f07b5373d7493d29cd758ababf135c2d0d8da127Tom Stellard case ShaderType::COMPUTE: RsrcReg = R_0288D4_SQ_PGM_RESOURCES_LS; break; 113f07b5373d7493d29cd758ababf135c2d0d8da127Tom Stellard case ShaderType::GEOMETRY: RsrcReg = R_028878_SQ_PGM_RESOURCES_GS; break; 114f07b5373d7493d29cd758ababf135c2d0d8da127Tom Stellard case ShaderType::PIXEL: RsrcReg = R_028844_SQ_PGM_RESOURCES_PS; break; 115f07b5373d7493d29cd758ababf135c2d0d8da127Tom Stellard case ShaderType::VERTEX: RsrcReg = R_028860_SQ_PGM_RESOURCES_VS; break; 116f07b5373d7493d29cd758ababf135c2d0d8da127Tom Stellard } 117f07b5373d7493d29cd758ababf135c2d0d8da127Tom Stellard } else { 118f07b5373d7493d29cd758ababf135c2d0d8da127Tom Stellard // R600 / R700 119f07b5373d7493d29cd758ababf135c2d0d8da127Tom Stellard switch (MFI->ShaderType) { 120f07b5373d7493d29cd758ababf135c2d0d8da127Tom Stellard default: // Fall through 121f07b5373d7493d29cd758ababf135c2d0d8da127Tom Stellard case ShaderType::GEOMETRY: // Fall through 122f07b5373d7493d29cd758ababf135c2d0d8da127Tom Stellard case ShaderType::COMPUTE: // Fall through 123f07b5373d7493d29cd758ababf135c2d0d8da127Tom Stellard case ShaderType::VERTEX: RsrcReg = R_028868_SQ_PGM_RESOURCES_VS; break; 124f07b5373d7493d29cd758ababf135c2d0d8da127Tom Stellard case ShaderType::PIXEL: RsrcReg = R_028850_SQ_PGM_RESOURCES_PS; break; 125f07b5373d7493d29cd758ababf135c2d0d8da127Tom Stellard } 126f07b5373d7493d29cd758ababf135c2d0d8da127Tom Stellard } 127f07b5373d7493d29cd758ababf135c2d0d8da127Tom Stellard 128f07b5373d7493d29cd758ababf135c2d0d8da127Tom Stellard OutStreamer.EmitIntValue(RsrcReg, 4); 129f07b5373d7493d29cd758ababf135c2d0d8da127Tom Stellard OutStreamer.EmitIntValue(S_NUM_GPRS(MaxGPR + 1) | 130f07b5373d7493d29cd758ababf135c2d0d8da127Tom Stellard S_STACK_SIZE(MFI->StackSize), 4); 131f07b5373d7493d29cd758ababf135c2d0d8da127Tom Stellard OutStreamer.EmitIntValue(R_02880C_DB_SHADER_CONTROL, 4); 132f07b5373d7493d29cd758ababf135c2d0d8da127Tom Stellard OutStreamer.EmitIntValue(S_02880C_KILL_ENABLE(killPixel), 4); 133141ca7fc6488bfb20ad59854cc12039e16688ed3Vincent Lejeune} 134141ca7fc6488bfb20ad59854cc12039e16688ed3Vincent Lejeune 135141ca7fc6488bfb20ad59854cc12039e16688ed3Vincent Lejeunevoid AMDGPUAsmPrinter::EmitProgramInfoSI(MachineFunction &MF) { 136f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard unsigned MaxSGPR = 0; 137f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard unsigned MaxVGPR = 0; 138f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard bool VCCUsed = false; 139f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard const SIRegisterInfo * RI = 140f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard static_cast<const SIRegisterInfo*>(TM.getRegisterInfo()); 141f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 142f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard for (MachineFunction::iterator BB = MF.begin(), BB_E = MF.end(); 143f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard BB != BB_E; ++BB) { 144f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard MachineBasicBlock &MBB = *BB; 145f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); 146f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard I != E; ++I) { 147f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard MachineInstr &MI = *I; 148f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 149f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard unsigned numOperands = MI.getNumOperands(); 150f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard for (unsigned op_idx = 0; op_idx < numOperands; op_idx++) { 151f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard MachineOperand & MO = MI.getOperand(op_idx); 152f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard unsigned maxUsed; 153f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard unsigned width = 0; 154f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard bool isSGPR = false; 155f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard unsigned reg; 156f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard unsigned hwReg; 157f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard if (!MO.isReg()) { 158f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard continue; 159f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } 160f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard reg = MO.getReg(); 161f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard if (reg == AMDGPU::VCC) { 162f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard VCCUsed = true; 163f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard continue; 164f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } 165f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard switch (reg) { 166f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard default: break; 167f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case AMDGPU::EXEC: 168f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case AMDGPU::M0: 169f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard continue; 170f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } 171f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 172f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard if (AMDGPU::SReg_32RegClass.contains(reg)) { 173f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard isSGPR = true; 174f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard width = 1; 175f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } else if (AMDGPU::VReg_32RegClass.contains(reg)) { 176f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard isSGPR = false; 177f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard width = 1; 178f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } else if (AMDGPU::SReg_64RegClass.contains(reg)) { 179f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard isSGPR = true; 180f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard width = 2; 181f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } else if (AMDGPU::VReg_64RegClass.contains(reg)) { 182f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard isSGPR = false; 183f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard width = 2; 1844d0e8a8a3e2e5b98f598acad4d57452b99d52e74Christian Konig } else if (AMDGPU::VReg_96RegClass.contains(reg)) { 1854d0e8a8a3e2e5b98f598acad4d57452b99d52e74Christian Konig isSGPR = false; 1864d0e8a8a3e2e5b98f598acad4d57452b99d52e74Christian Konig width = 3; 187f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } else if (AMDGPU::SReg_128RegClass.contains(reg)) { 188f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard isSGPR = true; 189f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard width = 4; 190f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } else if (AMDGPU::VReg_128RegClass.contains(reg)) { 191f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard isSGPR = false; 192f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard width = 4; 193f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } else if (AMDGPU::SReg_256RegClass.contains(reg)) { 194f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard isSGPR = true; 195f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard width = 8; 19636ba9091843bd1205fe3499ba4b55bbedc6583c9Tom Stellard } else if (AMDGPU::VReg_256RegClass.contains(reg)) { 19736ba9091843bd1205fe3499ba4b55bbedc6583c9Tom Stellard isSGPR = false; 19836ba9091843bd1205fe3499ba4b55bbedc6583c9Tom Stellard width = 8; 19936ba9091843bd1205fe3499ba4b55bbedc6583c9Tom Stellard } else if (AMDGPU::VReg_512RegClass.contains(reg)) { 20036ba9091843bd1205fe3499ba4b55bbedc6583c9Tom Stellard isSGPR = false; 20136ba9091843bd1205fe3499ba4b55bbedc6583c9Tom Stellard width = 16; 202f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } else { 203f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard assert(!"Unknown register class"); 204f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } 205184f5c1545e06a99951f14d846a1d853ff19a2b8Tom Stellard hwReg = RI->getEncodingValue(reg) & 0xff; 206f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard maxUsed = hwReg + width - 1; 207f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard if (isSGPR) { 208f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard MaxSGPR = maxUsed > MaxSGPR ? maxUsed : MaxSGPR; 209f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } else { 210f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard MaxVGPR = maxUsed > MaxVGPR ? maxUsed : MaxVGPR; 211f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } 212f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } 213f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } 214f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } 215f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard if (VCCUsed) { 216f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard MaxSGPR += 2; 217f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } 218f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SIMachineFunctionInfo * MFI = MF.getInfo<SIMachineFunctionInfo>(); 2199a256300f8f61937f5f7a148b9cb09936d103a97Tom Stellard unsigned RsrcReg; 2209a256300f8f61937f5f7a148b9cb09936d103a97Tom Stellard switch (MFI->ShaderType) { 2219a256300f8f61937f5f7a148b9cb09936d103a97Tom Stellard default: // Fall through 2229a256300f8f61937f5f7a148b9cb09936d103a97Tom Stellard case ShaderType::COMPUTE: RsrcReg = R_00B848_COMPUTE_PGM_RSRC1; break; 2239a256300f8f61937f5f7a148b9cb09936d103a97Tom Stellard case ShaderType::GEOMETRY: RsrcReg = R_00B228_SPI_SHADER_PGM_RSRC1_GS; break; 2249a256300f8f61937f5f7a148b9cb09936d103a97Tom Stellard case ShaderType::PIXEL: RsrcReg = R_00B028_SPI_SHADER_PGM_RSRC1_PS; break; 2259a256300f8f61937f5f7a148b9cb09936d103a97Tom Stellard case ShaderType::VERTEX: RsrcReg = R_00B128_SPI_SHADER_PGM_RSRC1_VS; break; 2269a256300f8f61937f5f7a148b9cb09936d103a97Tom Stellard } 2279a256300f8f61937f5f7a148b9cb09936d103a97Tom Stellard 2289a256300f8f61937f5f7a148b9cb09936d103a97Tom Stellard OutStreamer.EmitIntValue(RsrcReg, 4); 2299a256300f8f61937f5f7a148b9cb09936d103a97Tom Stellard OutStreamer.EmitIntValue(S_00B028_VGPRS(MaxVGPR / 4) | S_00B028_SGPRS(MaxSGPR / 8), 4); 2309a256300f8f61937f5f7a148b9cb09936d103a97Tom Stellard if (MFI->ShaderType == ShaderType::PIXEL) { 2319a256300f8f61937f5f7a148b9cb09936d103a97Tom Stellard OutStreamer.EmitIntValue(R_0286CC_SPI_PS_INPUT_ENA, 4); 2329a256300f8f61937f5f7a148b9cb09936d103a97Tom Stellard OutStreamer.EmitIntValue(MFI->PSInputAddr, 4); 2339a256300f8f61937f5f7a148b9cb09936d103a97Tom Stellard } 234f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard} 235