AMDGPUISelLowering.cpp revision 30d84d8dfa0433088d541c66b92af0da3855bc9c
1f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard//===-- AMDGPUISelLowering.cpp - AMDGPU Common DAG lowering functions -----===// 2f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 3f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// The LLVM Compiler Infrastructure 4f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 5f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// This file is distributed under the University of Illinois Open Source 6f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// License. See LICENSE.TXT for details. 7f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 8f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard//===----------------------------------------------------------------------===// 9f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 10f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard/// \file 11f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard/// \brief This is the parent TargetLowering class for hardware code gen 12f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard/// targets. 13f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 14f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard//===----------------------------------------------------------------------===// 15f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 16f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard#include "AMDGPUISelLowering.h" 17e7397ee81ad07cab36362bab5a086f20acc60a80Tom Stellard#include "AMDGPU.h" 1890c64cbaa124e0e8541680efeaa56f0e6eb78d9aChristian Konig#include "AMDGPURegisterInfo.h" 1990c64cbaa124e0e8541680efeaa56f0e6eb78d9aChristian Konig#include "AMDGPUSubtarget.h" 205c35290fa35ae234fed02496404cb0fc37e1c8a5Benjamin Kramer#include "AMDILIntrinsicInfo.h" 21f502c292f6edd6b0562a93cc67cd241f52a57d54Tom Stellard#include "R600MachineFunctionInfo.h" 22e7397ee81ad07cab36362bab5a086f20acc60a80Tom Stellard#include "SIMachineFunctionInfo.h" 2390c64cbaa124e0e8541680efeaa56f0e6eb78d9aChristian Konig#include "llvm/CodeGen/CallingConvLower.h" 24f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard#include "llvm/CodeGen/MachineFunction.h" 25f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard#include "llvm/CodeGen/MachineRegisterInfo.h" 26f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard#include "llvm/CodeGen/SelectionDAG.h" 27f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" 28e3d4cbc7d25061441adafa47450a31571c87bf85Tom Stellard#include "llvm/IR/DataLayout.h" 29f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 30f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardusing namespace llvm; 31f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 3290c64cbaa124e0e8541680efeaa56f0e6eb78d9aChristian Konig#include "AMDGPUGenCallingConv.inc" 3390c64cbaa124e0e8541680efeaa56f0e6eb78d9aChristian Konig 34f98f2ce29e6e2996fa58f38979143eceaa818335Tom StellardAMDGPUTargetLowering::AMDGPUTargetLowering(TargetMachine &TM) : 35f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard TargetLowering(TM, new TargetLoweringObjectFileELF()) { 36f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 37f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // Initialize target lowering borrowed from AMDIL 38f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard InitAMDILLowering(); 39f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 40f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // We need to custom lower some of the intrinsics 41f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom); 42f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 43f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // Library functions. These default to Expand, but we have instructions 44f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // for them. 45f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard setOperationAction(ISD::FCEIL, MVT::f32, Legal); 46f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard setOperationAction(ISD::FEXP2, MVT::f32, Legal); 47f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard setOperationAction(ISD::FPOW, MVT::f32, Legal); 48f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard setOperationAction(ISD::FLOG2, MVT::f32, Legal); 49f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard setOperationAction(ISD::FABS, MVT::f32, Legal); 50f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard setOperationAction(ISD::FFLOOR, MVT::f32, Legal); 51f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard setOperationAction(ISD::FRINT, MVT::f32, Legal); 52f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 53ba534c21437ba133cb9d6b3f9dae80fa9c4f0cb7Tom Stellard // The hardware supports ROTR, but not ROTL 54ba534c21437ba133cb9d6b3f9dae80fa9c4f0cb7Tom Stellard setOperationAction(ISD::ROTL, MVT::i32, Expand); 55ba534c21437ba133cb9d6b3f9dae80fa9c4f0cb7Tom Stellard 56f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // Lower floating point store/load to integer store/load to reduce the number 57f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // of patterns in tablegen. 58f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard setOperationAction(ISD::STORE, MVT::f32, Promote); 59f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard AddPromotedToType(ISD::STORE, MVT::f32, MVT::i32); 60f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 61fc047278c160cf15d99502d8170d431cfcfe8a5bTom Stellard setOperationAction(ISD::STORE, MVT::v2f32, Promote); 62fc047278c160cf15d99502d8170d431cfcfe8a5bTom Stellard AddPromotedToType(ISD::STORE, MVT::v2f32, MVT::v2i32); 63fc047278c160cf15d99502d8170d431cfcfe8a5bTom Stellard 64f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard setOperationAction(ISD::STORE, MVT::v4f32, Promote); 65f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard AddPromotedToType(ISD::STORE, MVT::v4f32, MVT::v4i32); 66f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 6768e132866236f5d59271d2c7ffb77a9c8e743752Tom Stellard setOperationAction(ISD::STORE, MVT::f64, Promote); 6868e132866236f5d59271d2c7ffb77a9c8e743752Tom Stellard AddPromotedToType(ISD::STORE, MVT::f64, MVT::i64); 6968e132866236f5d59271d2c7ffb77a9c8e743752Tom Stellard 704c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard setTruncStoreAction(MVT::v2i32, MVT::v2i16, Custom); 714c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard setTruncStoreAction(MVT::v2i32, MVT::v2i8, Custom); 724c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard setTruncStoreAction(MVT::v4i32, MVT::v4i8, Custom); 734c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard // XXX: This can be change to Custom, once ExpandVectorStores can 744c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard // handle 64-bit stores. 754c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard setTruncStoreAction(MVT::v4i32, MVT::v4i16, Expand); 764c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard 77f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard setOperationAction(ISD::LOAD, MVT::f32, Promote); 78f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard AddPromotedToType(ISD::LOAD, MVT::f32, MVT::i32); 79f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 80ac85f3f65ce67f71bb8e4626e0a50d818500e426Tom Stellard setOperationAction(ISD::LOAD, MVT::v2f32, Promote); 81ac85f3f65ce67f71bb8e4626e0a50d818500e426Tom Stellard AddPromotedToType(ISD::LOAD, MVT::v2f32, MVT::v2i32); 82ac85f3f65ce67f71bb8e4626e0a50d818500e426Tom Stellard 83f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard setOperationAction(ISD::LOAD, MVT::v4f32, Promote); 84f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard AddPromotedToType(ISD::LOAD, MVT::v4f32, MVT::v4i32); 85f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 8668e132866236f5d59271d2c7ffb77a9c8e743752Tom Stellard setOperationAction(ISD::LOAD, MVT::f64, Promote); 8768e132866236f5d59271d2c7ffb77a9c8e743752Tom Stellard AddPromotedToType(ISD::LOAD, MVT::f64, MVT::i64); 8868e132866236f5d59271d2c7ffb77a9c8e743752Tom Stellard 89a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard setOperationAction(ISD::CONCAT_VECTORS, MVT::v4i32, Custom); 90a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard setOperationAction(ISD::CONCAT_VECTORS, MVT::v4f32, Custom); 91a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v2i32, Custom); 92a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v2f32, Custom); 93692ee102ebef535d311c35d53457028083e5c5beTom Stellard 9430d84d8dfa0433088d541c66b92af0da3855bc9cTom Stellard setLoadExtAction(ISD::EXTLOAD, MVT::v2i8, Expand); 9530d84d8dfa0433088d541c66b92af0da3855bc9cTom Stellard setLoadExtAction(ISD::SEXTLOAD, MVT::v2i8, Expand); 9630d84d8dfa0433088d541c66b92af0da3855bc9cTom Stellard setLoadExtAction(ISD::ZEXTLOAD, MVT::v2i8, Expand); 9730d84d8dfa0433088d541c66b92af0da3855bc9cTom Stellard setLoadExtAction(ISD::EXTLOAD, MVT::v4i8, Expand); 9830d84d8dfa0433088d541c66b92af0da3855bc9cTom Stellard setLoadExtAction(ISD::SEXTLOAD, MVT::v4i8, Expand); 9930d84d8dfa0433088d541c66b92af0da3855bc9cTom Stellard setLoadExtAction(ISD::ZEXTLOAD, MVT::v4i8, Expand); 10030d84d8dfa0433088d541c66b92af0da3855bc9cTom Stellard setLoadExtAction(ISD::EXTLOAD, MVT::v2i16, Expand); 10130d84d8dfa0433088d541c66b92af0da3855bc9cTom Stellard setLoadExtAction(ISD::SEXTLOAD, MVT::v2i16, Expand); 10230d84d8dfa0433088d541c66b92af0da3855bc9cTom Stellard setLoadExtAction(ISD::ZEXTLOAD, MVT::v2i16, Expand); 10330d84d8dfa0433088d541c66b92af0da3855bc9cTom Stellard setLoadExtAction(ISD::EXTLOAD, MVT::v4i16, Expand); 10430d84d8dfa0433088d541c66b92af0da3855bc9cTom Stellard setLoadExtAction(ISD::SEXTLOAD, MVT::v4i16, Expand); 10530d84d8dfa0433088d541c66b92af0da3855bc9cTom Stellard setLoadExtAction(ISD::ZEXTLOAD, MVT::v4i16, Expand); 10630d84d8dfa0433088d541c66b92af0da3855bc9cTom Stellard 107d7a472c9c696ebf010835d9254fb15036e558d84Tom Stellard setOperationAction(ISD::FNEG, MVT::v2f32, Expand); 108d7a472c9c696ebf010835d9254fb15036e558d84Tom Stellard setOperationAction(ISD::FNEG, MVT::v4f32, Expand); 109d7a472c9c696ebf010835d9254fb15036e558d84Tom Stellard 11045b14e341a8a85e877d001bbd43f5e2b25b61cb8Christian Konig setOperationAction(ISD::MUL, MVT::i64, Expand); 11145b14e341a8a85e877d001bbd43f5e2b25b61cb8Christian Konig 112f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard setOperationAction(ISD::UDIV, MVT::i32, Expand); 113f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard setOperationAction(ISD::UDIVREM, MVT::i32, Custom); 114f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard setOperationAction(ISD::UREM, MVT::i32, Expand); 115f5660aab413539bd94cfea8cd88fed80c54cd984Tom Stellard setOperationAction(ISD::VSELECT, MVT::v2f32, Expand); 116f5660aab413539bd94cfea8cd88fed80c54cd984Tom Stellard setOperationAction(ISD::VSELECT, MVT::v4f32, Expand); 117f97c7fef52098bbd6a7ccc69657d112a36d77660Aaron Watry 118787e71df693e94cc512f3e439bf91609a8ec9baeCraig Topper static const int types[] = { 119f97c7fef52098bbd6a7ccc69657d112a36d77660Aaron Watry (int)MVT::v2i32, 120f97c7fef52098bbd6a7ccc69657d112a36d77660Aaron Watry (int)MVT::v4i32 121f97c7fef52098bbd6a7ccc69657d112a36d77660Aaron Watry }; 122b9df53a40b22c74ce3f3a7b4a7c0676a38cf5e73Craig Topper const size_t NumTypes = array_lengthof(types); 123f97c7fef52098bbd6a7ccc69657d112a36d77660Aaron Watry 124f97c7fef52098bbd6a7ccc69657d112a36d77660Aaron Watry for (unsigned int x = 0; x < NumTypes; ++x) { 125f97c7fef52098bbd6a7ccc69657d112a36d77660Aaron Watry MVT::SimpleValueType VT = (MVT::SimpleValueType)types[x]; 126f97c7fef52098bbd6a7ccc69657d112a36d77660Aaron Watry //Expand the following operations for the current type by default 127f97c7fef52098bbd6a7ccc69657d112a36d77660Aaron Watry setOperationAction(ISD::ADD, VT, Expand); 128f97c7fef52098bbd6a7ccc69657d112a36d77660Aaron Watry setOperationAction(ISD::AND, VT, Expand); 129e3d60ac33421a69545e2989b890899d76a918d2fTom Stellard setOperationAction(ISD::FP_TO_SINT, VT, Expand); 130e3d60ac33421a69545e2989b890899d76a918d2fTom Stellard setOperationAction(ISD::FP_TO_UINT, VT, Expand); 131f97c7fef52098bbd6a7ccc69657d112a36d77660Aaron Watry setOperationAction(ISD::MUL, VT, Expand); 132f97c7fef52098bbd6a7ccc69657d112a36d77660Aaron Watry setOperationAction(ISD::OR, VT, Expand); 133f97c7fef52098bbd6a7ccc69657d112a36d77660Aaron Watry setOperationAction(ISD::SHL, VT, Expand); 134e3d60ac33421a69545e2989b890899d76a918d2fTom Stellard setOperationAction(ISD::SINT_TO_FP, VT, Expand); 135f97c7fef52098bbd6a7ccc69657d112a36d77660Aaron Watry setOperationAction(ISD::SRL, VT, Expand); 136f97c7fef52098bbd6a7ccc69657d112a36d77660Aaron Watry setOperationAction(ISD::SRA, VT, Expand); 137f97c7fef52098bbd6a7ccc69657d112a36d77660Aaron Watry setOperationAction(ISD::SUB, VT, Expand); 138f97c7fef52098bbd6a7ccc69657d112a36d77660Aaron Watry setOperationAction(ISD::UDIV, VT, Expand); 139e3d60ac33421a69545e2989b890899d76a918d2fTom Stellard setOperationAction(ISD::UINT_TO_FP, VT, Expand); 140f97c7fef52098bbd6a7ccc69657d112a36d77660Aaron Watry setOperationAction(ISD::UREM, VT, Expand); 141f5660aab413539bd94cfea8cd88fed80c54cd984Tom Stellard setOperationAction(ISD::VSELECT, VT, Expand); 142f97c7fef52098bbd6a7ccc69657d112a36d77660Aaron Watry setOperationAction(ISD::XOR, VT, Expand); 143f97c7fef52098bbd6a7ccc69657d112a36d77660Aaron Watry } 144f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard} 145f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 1462b272a1c8cb6d9f02223a598495d84cd9d75b13dTom Stellard//===----------------------------------------------------------------------===// 1472b272a1c8cb6d9f02223a598495d84cd9d75b13dTom Stellard// Target Information 1482b272a1c8cb6d9f02223a598495d84cd9d75b13dTom Stellard//===----------------------------------------------------------------------===// 1492b272a1c8cb6d9f02223a598495d84cd9d75b13dTom Stellard 1502b272a1c8cb6d9f02223a598495d84cd9d75b13dTom StellardMVT AMDGPUTargetLowering::getVectorIdxTy() const { 1512b272a1c8cb6d9f02223a598495d84cd9d75b13dTom Stellard return MVT::i32; 1522b272a1c8cb6d9f02223a598495d84cd9d75b13dTom Stellard} 1532b272a1c8cb6d9f02223a598495d84cd9d75b13dTom Stellard 1542b272a1c8cb6d9f02223a598495d84cd9d75b13dTom Stellard 155f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard//===---------------------------------------------------------------------===// 1561f67c63cb23ba5d405452d72bb8892df6b7ccd4fTom Stellard// Target Properties 1571f67c63cb23ba5d405452d72bb8892df6b7ccd4fTom Stellard//===---------------------------------------------------------------------===// 1581f67c63cb23ba5d405452d72bb8892df6b7ccd4fTom Stellard 1591f67c63cb23ba5d405452d72bb8892df6b7ccd4fTom Stellardbool AMDGPUTargetLowering::isFAbsFree(EVT VT) const { 1601f67c63cb23ba5d405452d72bb8892df6b7ccd4fTom Stellard assert(VT.isFloatingPoint()); 1611f67c63cb23ba5d405452d72bb8892df6b7ccd4fTom Stellard return VT == MVT::f32; 1621f67c63cb23ba5d405452d72bb8892df6b7ccd4fTom Stellard} 1631f67c63cb23ba5d405452d72bb8892df6b7ccd4fTom Stellard 1641f67c63cb23ba5d405452d72bb8892df6b7ccd4fTom Stellardbool AMDGPUTargetLowering::isFNegFree(EVT VT) const { 1651f67c63cb23ba5d405452d72bb8892df6b7ccd4fTom Stellard assert(VT.isFloatingPoint()); 1661f67c63cb23ba5d405452d72bb8892df6b7ccd4fTom Stellard return VT == MVT::f32; 1671f67c63cb23ba5d405452d72bb8892df6b7ccd4fTom Stellard} 1681f67c63cb23ba5d405452d72bb8892df6b7ccd4fTom Stellard 1691f67c63cb23ba5d405452d72bb8892df6b7ccd4fTom Stellard//===---------------------------------------------------------------------===// 170f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// TargetLowering Callbacks 171f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard//===---------------------------------------------------------------------===// 172f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 17390c64cbaa124e0e8541680efeaa56f0e6eb78d9aChristian Konigvoid AMDGPUTargetLowering::AnalyzeFormalArguments(CCState &State, 17490c64cbaa124e0e8541680efeaa56f0e6eb78d9aChristian Konig const SmallVectorImpl<ISD::InputArg> &Ins) const { 17590c64cbaa124e0e8541680efeaa56f0e6eb78d9aChristian Konig 17690c64cbaa124e0e8541680efeaa56f0e6eb78d9aChristian Konig State.AnalyzeFormalArguments(Ins, CC_AMDGPU); 177f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard} 178f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 179f98f2ce29e6e2996fa58f38979143eceaa818335Tom StellardSDValue AMDGPUTargetLowering::LowerReturn( 180f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SDValue Chain, 181f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard CallingConv::ID CallConv, 182f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard bool isVarArg, 183f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard const SmallVectorImpl<ISD::OutputArg> &Outs, 184f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard const SmallVectorImpl<SDValue> &OutVals, 185ac6d9bec671252dd1e596fa71180ff6b39d06b5dAndrew Trick SDLoc DL, SelectionDAG &DAG) const { 186f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return DAG.getNode(AMDGPUISD::RET_FLAG, DL, MVT::Other, Chain); 187f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard} 188f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 189f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard//===---------------------------------------------------------------------===// 190f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// Target specific lowering 191f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard//===---------------------------------------------------------------------===// 192f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 193f98f2ce29e6e2996fa58f38979143eceaa818335Tom StellardSDValue AMDGPUTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) 194f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard const { 195f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard switch (Op.getOpcode()) { 196f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard default: 197f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard Op.getNode()->dump(); 198f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard assert(0 && "Custom lowering code for this" 199f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard "instruction is not implemented yet!"); 200f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard break; 201f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // AMDIL DAG lowering 202f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case ISD::SDIV: return LowerSDIV(Op, DAG); 203f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case ISD::SREM: return LowerSREM(Op, DAG); 204f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case ISD::SIGN_EXTEND_INREG: return LowerSIGN_EXTEND_INREG(Op, DAG); 205f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case ISD::BRCOND: return LowerBRCOND(Op, DAG); 206f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // AMDGPU DAG lowering 207a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard case ISD::CONCAT_VECTORS: return LowerCONCAT_VECTORS(Op, DAG); 208a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard case ISD::EXTRACT_SUBVECTOR: return LowerEXTRACT_SUBVECTOR(Op, DAG); 209f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case ISD::INTRINSIC_WO_CHAIN: return LowerINTRINSIC_WO_CHAIN(Op, DAG); 2104c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard case ISD::STORE: return LowerVectorStore(Op, DAG); 211f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case ISD::UDIVREM: return LowerUDIVREM(Op, DAG); 212f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } 213f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return Op; 214f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard} 215f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 216e3d4cbc7d25061441adafa47450a31571c87bf85Tom StellardSDValue AMDGPUTargetLowering::LowerGlobalAddress(AMDGPUMachineFunction* MFI, 217e3d4cbc7d25061441adafa47450a31571c87bf85Tom Stellard SDValue Op, 218e3d4cbc7d25061441adafa47450a31571c87bf85Tom Stellard SelectionDAG &DAG) const { 219e3d4cbc7d25061441adafa47450a31571c87bf85Tom Stellard 220e3d4cbc7d25061441adafa47450a31571c87bf85Tom Stellard const DataLayout *TD = getTargetMachine().getDataLayout(); 221e3d4cbc7d25061441adafa47450a31571c87bf85Tom Stellard GlobalAddressSDNode *G = cast<GlobalAddressSDNode>(Op); 222e3d4cbc7d25061441adafa47450a31571c87bf85Tom Stellard // XXX: What does the value of G->getOffset() mean? 223e3d4cbc7d25061441adafa47450a31571c87bf85Tom Stellard assert(G->getOffset() == 0 && 224e3d4cbc7d25061441adafa47450a31571c87bf85Tom Stellard "Do not know what to do with an non-zero offset"); 225e3d4cbc7d25061441adafa47450a31571c87bf85Tom Stellard 226e3d4cbc7d25061441adafa47450a31571c87bf85Tom Stellard unsigned Offset = MFI->LDSSize; 227e3d4cbc7d25061441adafa47450a31571c87bf85Tom Stellard const GlobalValue *GV = G->getGlobal(); 228e3d4cbc7d25061441adafa47450a31571c87bf85Tom Stellard uint64_t Size = TD->getTypeAllocSize(GV->getType()->getElementType()); 229e3d4cbc7d25061441adafa47450a31571c87bf85Tom Stellard 230e3d4cbc7d25061441adafa47450a31571c87bf85Tom Stellard // XXX: Account for alignment? 231e3d4cbc7d25061441adafa47450a31571c87bf85Tom Stellard MFI->LDSSize += Size; 232e3d4cbc7d25061441adafa47450a31571c87bf85Tom Stellard 233a3e39dc7055486cbf514ccd868cfabc69d7f6f4eMichel Danzer return DAG.getConstant(Offset, TD->getPointerSize() == 8 ? MVT::i64 : MVT::i32); 234e3d4cbc7d25061441adafa47450a31571c87bf85Tom Stellard} 235e3d4cbc7d25061441adafa47450a31571c87bf85Tom Stellard 236a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellardvoid AMDGPUTargetLowering::ExtractVectorElements(SDValue Op, SelectionDAG &DAG, 237a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard SmallVectorImpl<SDValue> &Args, 238a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard unsigned Start, 239a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard unsigned Count) const { 240a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard EVT VT = Op.getValueType(); 241a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard for (unsigned i = Start, e = Start + Count; i != e; ++i) { 242a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard Args.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(Op), 243a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard VT.getVectorElementType(), 244a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard Op, DAG.getConstant(i, MVT::i32))); 245a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard } 246a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard} 247a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard 248a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom StellardSDValue AMDGPUTargetLowering::LowerCONCAT_VECTORS(SDValue Op, 249a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard SelectionDAG &DAG) const { 250a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard SmallVector<SDValue, 8> Args; 251a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard SDValue A = Op.getOperand(0); 252a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard SDValue B = Op.getOperand(1); 253a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard 254a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard ExtractVectorElements(A, DAG, Args, 0, 255a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard A.getValueType().getVectorNumElements()); 256a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard ExtractVectorElements(B, DAG, Args, 0, 257a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard B.getValueType().getVectorNumElements()); 258a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard 259a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(Op), Op.getValueType(), 260a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard &Args[0], Args.size()); 261a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard} 262a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard 263a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom StellardSDValue AMDGPUTargetLowering::LowerEXTRACT_SUBVECTOR(SDValue Op, 264a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard SelectionDAG &DAG) const { 265a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard 266a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard SmallVector<SDValue, 8> Args; 267a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard EVT VT = Op.getValueType(); 268a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard unsigned Start = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue(); 269a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard ExtractVectorElements(Op.getOperand(0), DAG, Args, Start, 270a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard VT.getVectorNumElements()); 271a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard 272a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(Op), Op.getValueType(), 273a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard &Args[0], Args.size()); 274a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard} 275a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard 276a41520cf9b9cefed2091a0624a34c5f7fdb42a68Tom Stellard 277f98f2ce29e6e2996fa58f38979143eceaa818335Tom StellardSDValue AMDGPUTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, 278f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SelectionDAG &DAG) const { 279f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard unsigned IntrinsicID = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue(); 280ac6d9bec671252dd1e596fa71180ff6b39d06b5dAndrew Trick SDLoc DL(Op); 281f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard EVT VT = Op.getValueType(); 282f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 283f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard switch (IntrinsicID) { 284f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard default: return Op; 285f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case AMDGPUIntrinsic::AMDIL_abs: 286f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return LowerIntrinsicIABS(Op, DAG); 287f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case AMDGPUIntrinsic::AMDIL_exp: 288f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return DAG.getNode(ISD::FEXP2, DL, VT, Op.getOperand(1)); 289f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case AMDGPUIntrinsic::AMDGPU_lrp: 290f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return LowerIntrinsicLRP(Op, DAG); 291f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case AMDGPUIntrinsic::AMDIL_fraction: 292f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return DAG.getNode(AMDGPUISD::FRACT, DL, VT, Op.getOperand(1)); 293f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case AMDGPUIntrinsic::AMDIL_max: 294f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return DAG.getNode(AMDGPUISD::FMAX, DL, VT, Op.getOperand(1), 295f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard Op.getOperand(2)); 296f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case AMDGPUIntrinsic::AMDGPU_imax: 297f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return DAG.getNode(AMDGPUISD::SMAX, DL, VT, Op.getOperand(1), 298f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard Op.getOperand(2)); 299f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case AMDGPUIntrinsic::AMDGPU_umax: 300f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return DAG.getNode(AMDGPUISD::UMAX, DL, VT, Op.getOperand(1), 301f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard Op.getOperand(2)); 302f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case AMDGPUIntrinsic::AMDIL_min: 303f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return DAG.getNode(AMDGPUISD::FMIN, DL, VT, Op.getOperand(1), 304f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard Op.getOperand(2)); 305f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case AMDGPUIntrinsic::AMDGPU_imin: 306f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return DAG.getNode(AMDGPUISD::SMIN, DL, VT, Op.getOperand(1), 307f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard Op.getOperand(2)); 308f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case AMDGPUIntrinsic::AMDGPU_umin: 309f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return DAG.getNode(AMDGPUISD::UMIN, DL, VT, Op.getOperand(1), 310f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard Op.getOperand(2)); 311f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case AMDGPUIntrinsic::AMDIL_round_nearest: 312f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return DAG.getNode(ISD::FRINT, DL, VT, Op.getOperand(1)); 313f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } 314f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard} 315f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 316f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard///IABS(a) = SMAX(sub(0, a), a) 317f98f2ce29e6e2996fa58f38979143eceaa818335Tom StellardSDValue AMDGPUTargetLowering::LowerIntrinsicIABS(SDValue Op, 318f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SelectionDAG &DAG) const { 319f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 320ac6d9bec671252dd1e596fa71180ff6b39d06b5dAndrew Trick SDLoc DL(Op); 321f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard EVT VT = Op.getValueType(); 322f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SDValue Neg = DAG.getNode(ISD::SUB, DL, VT, DAG.getConstant(0, VT), 323f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard Op.getOperand(1)); 324f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 325f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return DAG.getNode(AMDGPUISD::SMAX, DL, VT, Neg, Op.getOperand(1)); 326f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard} 327f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 328f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard/// Linear Interpolation 329f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard/// LRP(a, b, c) = muladd(a, b, (1 - a) * c) 330f98f2ce29e6e2996fa58f38979143eceaa818335Tom StellardSDValue AMDGPUTargetLowering::LowerIntrinsicLRP(SDValue Op, 331f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SelectionDAG &DAG) const { 332ac6d9bec671252dd1e596fa71180ff6b39d06b5dAndrew Trick SDLoc DL(Op); 333f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard EVT VT = Op.getValueType(); 334f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SDValue OneSubA = DAG.getNode(ISD::FSUB, DL, VT, 335f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard DAG.getConstantFP(1.0f, MVT::f32), 336f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard Op.getOperand(1)); 337f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SDValue OneSubAC = DAG.getNode(ISD::FMUL, DL, VT, OneSubA, 338f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard Op.getOperand(3)); 339e3111964a0902bc38440980b0915b189f829c395Vincent Lejeune return DAG.getNode(ISD::FADD, DL, VT, 340e3111964a0902bc38440980b0915b189f829c395Vincent Lejeune DAG.getNode(ISD::FMUL, DL, VT, Op.getOperand(1), Op.getOperand(2)), 341e3111964a0902bc38440980b0915b189f829c395Vincent Lejeune OneSubAC); 342f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard} 343f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 344f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard/// \brief Generate Min/Max node 345f98f2ce29e6e2996fa58f38979143eceaa818335Tom StellardSDValue AMDGPUTargetLowering::LowerMinMax(SDValue Op, 346f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SelectionDAG &DAG) const { 347ac6d9bec671252dd1e596fa71180ff6b39d06b5dAndrew Trick SDLoc DL(Op); 348f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard EVT VT = Op.getValueType(); 349f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 350f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SDValue LHS = Op.getOperand(0); 351f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SDValue RHS = Op.getOperand(1); 352f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SDValue True = Op.getOperand(2); 353f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SDValue False = Op.getOperand(3); 354f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SDValue CC = Op.getOperand(4); 355f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 356f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard if (VT != MVT::f32 || 357f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard !((LHS == True && RHS == False) || (LHS == False && RHS == True))) { 358f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return SDValue(); 359f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } 360f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 361f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard ISD::CondCode CCOpcode = cast<CondCodeSDNode>(CC)->get(); 362f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard switch (CCOpcode) { 363f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case ISD::SETOEQ: 364f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case ISD::SETONE: 365f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case ISD::SETUNE: 366f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case ISD::SETNE: 367f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case ISD::SETUEQ: 368f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case ISD::SETEQ: 369f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case ISD::SETFALSE: 370f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case ISD::SETFALSE2: 371f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case ISD::SETTRUE: 372f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case ISD::SETTRUE2: 373f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case ISD::SETUO: 374f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case ISD::SETO: 375f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard assert(0 && "Operation should already be optimised !"); 376f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case ISD::SETULE: 377f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case ISD::SETULT: 378f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case ISD::SETOLE: 379f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case ISD::SETOLT: 380f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case ISD::SETLE: 381f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case ISD::SETLT: { 382f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard if (LHS == True) 383f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return DAG.getNode(AMDGPUISD::FMIN, DL, VT, LHS, RHS); 384f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard else 385f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return DAG.getNode(AMDGPUISD::FMAX, DL, VT, LHS, RHS); 386f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } 387f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case ISD::SETGT: 388f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case ISD::SETGE: 389f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case ISD::SETUGE: 390f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case ISD::SETOGE: 391f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case ISD::SETUGT: 392f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case ISD::SETOGT: { 393f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard if (LHS == True) 394f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return DAG.getNode(AMDGPUISD::FMAX, DL, VT, LHS, RHS); 395f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard else 396f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return DAG.getNode(AMDGPUISD::FMIN, DL, VT, LHS, RHS); 397f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } 398f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case ISD::SETCC_INVALID: 399f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard assert(0 && "Invalid setcc condcode !"); 400f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } 401f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return Op; 402f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard} 403f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 404f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 405f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 406f98f2ce29e6e2996fa58f38979143eceaa818335Tom StellardSDValue AMDGPUTargetLowering::LowerUDIVREM(SDValue Op, 407f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SelectionDAG &DAG) const { 408ac6d9bec671252dd1e596fa71180ff6b39d06b5dAndrew Trick SDLoc DL(Op); 409f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard EVT VT = Op.getValueType(); 410f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 411f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SDValue Num = Op.getOperand(0); 412f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SDValue Den = Op.getOperand(1); 413f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 414f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SmallVector<SDValue, 8> Results; 415f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 416f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // RCP = URECIP(Den) = 2^32 / Den + e 417f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // e is rounding error. 418f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SDValue RCP = DAG.getNode(AMDGPUISD::URECIP, DL, VT, Den); 419f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 420f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // RCP_LO = umulo(RCP, Den) */ 421f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SDValue RCP_LO = DAG.getNode(ISD::UMULO, DL, VT, RCP, Den); 422f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 423f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // RCP_HI = mulhu (RCP, Den) */ 424f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SDValue RCP_HI = DAG.getNode(ISD::MULHU, DL, VT, RCP, Den); 425f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 426f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // NEG_RCP_LO = -RCP_LO 427f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SDValue NEG_RCP_LO = DAG.getNode(ISD::SUB, DL, VT, DAG.getConstant(0, VT), 428f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard RCP_LO); 429f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 430f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // ABS_RCP_LO = (RCP_HI == 0 ? NEG_RCP_LO : RCP_LO) 431f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SDValue ABS_RCP_LO = DAG.getSelectCC(DL, RCP_HI, DAG.getConstant(0, VT), 432f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard NEG_RCP_LO, RCP_LO, 433f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard ISD::SETEQ); 434f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // Calculate the rounding error from the URECIP instruction 435f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // E = mulhu(ABS_RCP_LO, RCP) 436f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SDValue E = DAG.getNode(ISD::MULHU, DL, VT, ABS_RCP_LO, RCP); 437f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 438f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // RCP_A_E = RCP + E 439f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SDValue RCP_A_E = DAG.getNode(ISD::ADD, DL, VT, RCP, E); 440f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 441f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // RCP_S_E = RCP - E 442f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SDValue RCP_S_E = DAG.getNode(ISD::SUB, DL, VT, RCP, E); 443f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 444f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // Tmp0 = (RCP_HI == 0 ? RCP_A_E : RCP_SUB_E) 445f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SDValue Tmp0 = DAG.getSelectCC(DL, RCP_HI, DAG.getConstant(0, VT), 446f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard RCP_A_E, RCP_S_E, 447f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard ISD::SETEQ); 448f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // Quotient = mulhu(Tmp0, Num) 449f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SDValue Quotient = DAG.getNode(ISD::MULHU, DL, VT, Tmp0, Num); 450f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 451f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // Num_S_Remainder = Quotient * Den 452f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SDValue Num_S_Remainder = DAG.getNode(ISD::UMULO, DL, VT, Quotient, Den); 453f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 454f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // Remainder = Num - Num_S_Remainder 455f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SDValue Remainder = DAG.getNode(ISD::SUB, DL, VT, Num, Num_S_Remainder); 456f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 457f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // Remainder_GE_Den = (Remainder >= Den ? -1 : 0) 458f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SDValue Remainder_GE_Den = DAG.getSelectCC(DL, Remainder, Den, 459f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard DAG.getConstant(-1, VT), 460f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard DAG.getConstant(0, VT), 461f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard ISD::SETGE); 462f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // Remainder_GE_Zero = (Remainder >= 0 ? -1 : 0) 463f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SDValue Remainder_GE_Zero = DAG.getSelectCC(DL, Remainder, 464f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard DAG.getConstant(0, VT), 465f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard DAG.getConstant(-1, VT), 466f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard DAG.getConstant(0, VT), 467f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard ISD::SETGE); 468f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // Tmp1 = Remainder_GE_Den & Remainder_GE_Zero 469f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SDValue Tmp1 = DAG.getNode(ISD::AND, DL, VT, Remainder_GE_Den, 470f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard Remainder_GE_Zero); 471f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 472f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // Calculate Division result: 473f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 474f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // Quotient_A_One = Quotient + 1 475f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SDValue Quotient_A_One = DAG.getNode(ISD::ADD, DL, VT, Quotient, 476f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard DAG.getConstant(1, VT)); 477f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 478f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // Quotient_S_One = Quotient - 1 479f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SDValue Quotient_S_One = DAG.getNode(ISD::SUB, DL, VT, Quotient, 480f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard DAG.getConstant(1, VT)); 481f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 482f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // Div = (Tmp1 == 0 ? Quotient : Quotient_A_One) 483f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SDValue Div = DAG.getSelectCC(DL, Tmp1, DAG.getConstant(0, VT), 484f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard Quotient, Quotient_A_One, ISD::SETEQ); 485f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 486f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // Div = (Remainder_GE_Zero == 0 ? Quotient_S_One : Div) 487f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard Div = DAG.getSelectCC(DL, Remainder_GE_Zero, DAG.getConstant(0, VT), 488f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard Quotient_S_One, Div, ISD::SETEQ); 489f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 490f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // Calculate Rem result: 491f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 492f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // Remainder_S_Den = Remainder - Den 493f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SDValue Remainder_S_Den = DAG.getNode(ISD::SUB, DL, VT, Remainder, Den); 494f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 495f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // Remainder_A_Den = Remainder + Den 496f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SDValue Remainder_A_Den = DAG.getNode(ISD::ADD, DL, VT, Remainder, Den); 497f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 498f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // Rem = (Tmp1 == 0 ? Remainder : Remainder_S_Den) 499f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SDValue Rem = DAG.getSelectCC(DL, Tmp1, DAG.getConstant(0, VT), 500f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard Remainder, Remainder_S_Den, ISD::SETEQ); 501f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 502f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // Rem = (Remainder_GE_Zero == 0 ? Remainder_A_Den : Rem) 503f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard Rem = DAG.getSelectCC(DL, Remainder_GE_Zero, DAG.getConstant(0, VT), 504f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard Remainder_A_Den, Rem, ISD::SETEQ); 505f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SDValue Ops[2]; 506f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard Ops[0] = Div; 507f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard Ops[1] = Rem; 508f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return DAG.getMergeValues(Ops, 2, DL); 509f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard} 510f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 5114c52d450dc3968267d1f089d36397fc785dcc7b4Tom StellardSDValue AMDGPUTargetLowering::LowerVectorStore(const SDValue &Op, 5124c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard SelectionDAG &DAG) const { 5134c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard StoreSDNode *Store = dyn_cast<StoreSDNode>(Op); 5144c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard EVT MemVT = Store->getMemoryVT(); 5154c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard unsigned MemBits = MemVT.getSizeInBits(); 5164c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard 5174c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard // Byte stores are really expensive, so if possible, try to pack 5184c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard // 32-bit vector truncatating store into an i32 store. 5194c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard // XXX: We could also handle optimize other vector bitwidths 5204c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard if (!MemVT.isVector() || MemBits > 32) { 5214c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard return SDValue(); 5224c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard } 5234c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard 5244c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard SDLoc DL(Op); 5254c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard const SDValue &Value = Store->getValue(); 5264c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard EVT VT = Value.getValueType(); 5274c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard const SDValue &Ptr = Store->getBasePtr(); 5284c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard EVT MemEltVT = MemVT.getVectorElementType(); 5294c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard unsigned MemEltBits = MemEltVT.getSizeInBits(); 5304c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard unsigned MemNumElements = MemVT.getVectorNumElements(); 5314c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard EVT PackedVT = EVT::getIntegerVT(*DAG.getContext(), MemVT.getSizeInBits()); 5324c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard SDValue Mask; 5334c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard switch(MemEltBits) { 5344c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard case 8: 5354c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard Mask = DAG.getConstant(0xFF, PackedVT); 5364c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard break; 5374c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard case 16: 5384c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard Mask = DAG.getConstant(0xFFFF, PackedVT); 5394c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard break; 5404c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard default: 5414c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard llvm_unreachable("Cannot lower this vector store"); 5424c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard } 5434c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard SDValue PackedValue; 5444c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard for (unsigned i = 0; i < MemNumElements; ++i) { 5454c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard EVT ElemVT = VT.getVectorElementType(); 5464c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard SDValue Elt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, ElemVT, Value, 5474c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard DAG.getConstant(i, MVT::i32)); 5484c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard Elt = DAG.getZExtOrTrunc(Elt, DL, PackedVT); 5494c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard Elt = DAG.getNode(ISD::AND, DL, PackedVT, Elt, Mask); 5504c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard SDValue Shift = DAG.getConstant(MemEltBits * i, PackedVT); 5514c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard Elt = DAG.getNode(ISD::SHL, DL, PackedVT, Elt, Shift); 5524c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard if (i == 0) { 5534c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard PackedValue = Elt; 5544c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard } else { 5554c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard PackedValue = DAG.getNode(ISD::OR, DL, PackedVT, PackedValue, Elt); 5564c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard } 5574c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard } 5584c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard return DAG.getStore(Store->getChain(), DL, PackedValue, Ptr, 5594c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard MachinePointerInfo(Store->getMemOperand()->getValue()), 5604c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard Store->isVolatile(), Store->isNonTemporal(), 5614c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard Store->getAlignment()); 5624c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard} 5634c52d450dc3968267d1f089d36397fc785dcc7b4Tom Stellard 564f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard//===----------------------------------------------------------------------===// 565f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// Helper functions 566f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard//===----------------------------------------------------------------------===// 567f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 568f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardbool AMDGPUTargetLowering::isHWTrueValue(SDValue Op) const { 569f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard if (ConstantFPSDNode * CFP = dyn_cast<ConstantFPSDNode>(Op)) { 570f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return CFP->isExactlyValue(1.0); 571f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } 572f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op)) { 573f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return C->isAllOnesValue(); 574f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } 575f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return false; 576f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard} 577f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 578f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardbool AMDGPUTargetLowering::isHWFalseValue(SDValue Op) const { 579f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard if (ConstantFPSDNode * CFP = dyn_cast<ConstantFPSDNode>(Op)) { 580f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return CFP->getValueAPF().isZero(); 581f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } 582f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op)) { 583f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return C->isNullValue(); 584f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } 585f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return false; 586f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard} 587f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 588f98f2ce29e6e2996fa58f38979143eceaa818335Tom StellardSDValue AMDGPUTargetLowering::CreateLiveInRegister(SelectionDAG &DAG, 589f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard const TargetRegisterClass *RC, 590f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard unsigned Reg, EVT VT) const { 591f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard MachineFunction &MF = DAG.getMachineFunction(); 592f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard MachineRegisterInfo &MRI = MF.getRegInfo(); 593f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard unsigned VirtualRegister; 594f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard if (!MRI.isLiveIn(Reg)) { 595f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard VirtualRegister = MRI.createVirtualRegister(RC); 596f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard MRI.addLiveIn(Reg, VirtualRegister); 597f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } else { 598f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard VirtualRegister = MRI.getLiveInVirtReg(Reg); 599f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } 600f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return DAG.getRegister(VirtualRegister, VT); 601f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard} 602f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 603f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard#define NODE_NAME_CASE(node) case AMDGPUISD::node: return #node; 604f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 605f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardconst char* AMDGPUTargetLowering::getTargetNodeName(unsigned Opcode) const { 606f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard switch (Opcode) { 607f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard default: return 0; 608f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // AMDIL DAG nodes 609f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard NODE_NAME_CASE(CALL); 610f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard NODE_NAME_CASE(UMUL); 611f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard NODE_NAME_CASE(DIV_INF); 612f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard NODE_NAME_CASE(RET_FLAG); 613f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard NODE_NAME_CASE(BRANCH_COND); 614f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 615f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // AMDGPU DAG nodes 616f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard NODE_NAME_CASE(DWORDADDR) 617f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard NODE_NAME_CASE(FRACT) 618f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard NODE_NAME_CASE(FMAX) 619f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard NODE_NAME_CASE(SMAX) 620f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard NODE_NAME_CASE(UMAX) 621f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard NODE_NAME_CASE(FMIN) 622f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard NODE_NAME_CASE(SMIN) 623f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard NODE_NAME_CASE(UMIN) 624f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard NODE_NAME_CASE(URECIP) 625f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard NODE_NAME_CASE(EXPORT) 626c7e1888d93f4cb2982266986f3af7e99df631fa1Tom Stellard NODE_NAME_CASE(CONST_ADDRESS) 627c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard NODE_NAME_CASE(REGISTER_LOAD) 628c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard NODE_NAME_CASE(REGISTER_STORE) 62968db37b952be497c94c7aa98cf26f3baadb5afd3Tom Stellard NODE_NAME_CASE(LOAD_CONSTANT) 63068db37b952be497c94c7aa98cf26f3baadb5afd3Tom Stellard NODE_NAME_CASE(LOAD_INPUT) 63168db37b952be497c94c7aa98cf26f3baadb5afd3Tom Stellard NODE_NAME_CASE(SAMPLE) 63268db37b952be497c94c7aa98cf26f3baadb5afd3Tom Stellard NODE_NAME_CASE(SAMPLEB) 63368db37b952be497c94c7aa98cf26f3baadb5afd3Tom Stellard NODE_NAME_CASE(SAMPLED) 63468db37b952be497c94c7aa98cf26f3baadb5afd3Tom Stellard NODE_NAME_CASE(SAMPLEL) 635ec484277dd04399d7b2ea37508e39fc4998bc9a7Tom Stellard NODE_NAME_CASE(STORE_MSKOR) 636f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } 637f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard} 638