CMakeLists.txt revision dce4a407a24b04eebc6a376f8e62b41aaa7b071f 
1set(LLVM_TARGET_DEFINITIONS AMDGPU.td)
2
3tablegen(LLVM AMDGPUGenRegisterInfo.inc -gen-register-info)
4tablegen(LLVM AMDGPUGenInstrInfo.inc -gen-instr-info)
5tablegen(LLVM AMDGPUGenDAGISel.inc -gen-dag-isel)
6tablegen(LLVM AMDGPUGenCallingConv.inc -gen-callingconv)
7tablegen(LLVM AMDGPUGenSubtargetInfo.inc -gen-subtarget)
8tablegen(LLVM AMDGPUGenIntrinsics.inc -gen-tgt-intrinsic)
9tablegen(LLVM AMDGPUGenMCCodeEmitter.inc -gen-emitter -mc-emitter)
10tablegen(LLVM AMDGPUGenDFAPacketizer.inc -gen-dfa-packetizer)
11tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer)
12add_public_tablegen_target(AMDGPUCommonTableGen)
13
14add_llvm_target(R600CodeGen
15  AMDILCFGStructurizer.cpp
16  AMDILIntrinsicInfo.cpp
17  AMDILISelLowering.cpp
18  AMDGPUAsmPrinter.cpp
19  AMDGPUFrameLowering.cpp
20  AMDGPUISelDAGToDAG.cpp
21  AMDGPUMCInstLower.cpp
22  AMDGPUMachineFunction.cpp
23  AMDGPUSubtarget.cpp
24  AMDGPUTargetMachine.cpp
25  AMDGPUTargetTransformInfo.cpp
26  AMDGPUISelLowering.cpp
27  AMDGPUConvertToISA.cpp
28  AMDGPUInstrInfo.cpp
29  AMDGPURegisterInfo.cpp
30  R600ClauseMergePass.cpp
31  R600ControlFlowFinalizer.cpp
32  R600EmitClauseMarkers.cpp
33  R600ExpandSpecialInstrs.cpp
34  R600InstrInfo.cpp
35  R600ISelLowering.cpp
36  R600MachineFunctionInfo.cpp
37  R600MachineScheduler.cpp
38  R600OptimizeVectorRegisters.cpp
39  R600Packetizer.cpp
40  R600RegisterInfo.cpp
41  R600TextureIntrinsicsReplacer.cpp
42  SIAnnotateControlFlow.cpp
43  SIFixSGPRCopies.cpp
44  SIInsertWaits.cpp
45  SIInstrInfo.cpp
46  SIISelLowering.cpp
47  SILowerControlFlow.cpp
48  SILowerI1Copies.cpp
49  SIMachineFunctionInfo.cpp
50  SIRegisterInfo.cpp
51  SITypeRewriter.cpp
52  )
53
54add_subdirectory(InstPrinter)
55add_subdirectory(TargetInfo)
56add_subdirectory(MCTargetDesc)
57