1f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard//===- R600MCCodeEmitter.cpp - Code Emitter for R600->Cayman GPU families -===// 2f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 3f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// The LLVM Compiler Infrastructure 4f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 5f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// This file is distributed under the University of Illinois Open Source 6f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// License. See LICENSE.TXT for details. 7f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 8f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard//===----------------------------------------------------------------------===// 9f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 10f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard/// \file 11f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard/// 124f3d8a644043f85063ef7aac1ff87bfd4d83ca4cTom Stellard/// \brief The R600 code emitter produces machine code that can be executed 134f3d8a644043f85063ef7aac1ff87bfd4d83ca4cTom Stellard/// directly on the GPU device. 14f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 15f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard//===----------------------------------------------------------------------===// 16f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 17f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard#include "R600Defines.h" 18f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard#include "MCTargetDesc/AMDGPUMCCodeEmitter.h" 1958a2cbef4aac9ee7d530dfb690c78d6fc11a2371Chandler Carruth#include "MCTargetDesc/AMDGPUMCTargetDesc.h" 20f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard#include "llvm/MC/MCCodeEmitter.h" 21f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard#include "llvm/MC/MCContext.h" 22f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard#include "llvm/MC/MCInst.h" 23f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard#include "llvm/MC/MCInstrInfo.h" 24f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard#include "llvm/MC/MCRegisterInfo.h" 25f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard#include "llvm/MC/MCSubtargetInfo.h" 26f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard#include "llvm/Support/raw_ostream.h" 27f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 28f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardusing namespace llvm; 29f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 30f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardnamespace { 31f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 32f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardclass R600MCCodeEmitter : public AMDGPUMCCodeEmitter { 33a39058aaed4540fc37681cad728b99546595b2e8David Blaikie R600MCCodeEmitter(const R600MCCodeEmitter &) LLVM_DELETED_FUNCTION; 34a39058aaed4540fc37681cad728b99546595b2e8David Blaikie void operator=(const R600MCCodeEmitter &) LLVM_DELETED_FUNCTION; 35f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard const MCInstrInfo &MCII; 36f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard const MCRegisterInfo &MRI; 37f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 38f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardpublic: 39f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 4036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines R600MCCodeEmitter(const MCInstrInfo &mcii, const MCRegisterInfo &mri) 4136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines : MCII(mcii), MRI(mri) { } 42f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 43f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard /// \brief Encode the instruction and write it to the OS. 44dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines void EncodeInstruction(const MCInst &MI, raw_ostream &OS, 4536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines SmallVectorImpl<MCFixup> &Fixups, 46dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const MCSubtargetInfo &STI) const override; 47f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 48f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard /// \returns the encoding for an MCOperand. 49dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO, 50dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SmallVectorImpl<MCFixup> &Fixups, 51dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const MCSubtargetInfo &STI) const override; 52f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardprivate: 53f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 54f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard void EmitByte(unsigned int byte, raw_ostream &OS) const; 55f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 56f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard void Emit(uint32_t value, raw_ostream &OS) const; 57f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard void Emit(uint64_t value, raw_ostream &OS) const; 58f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 59f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard unsigned getHWRegChan(unsigned reg) const; 60f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard unsigned getHWReg(unsigned regNo) const; 61f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 62f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard}; 63f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 64f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard} // End anonymous namespace 65f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 66f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardenum RegElement { 67f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard ELEMENT_X = 0, 68f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard ELEMENT_Y, 69f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard ELEMENT_Z, 70f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard ELEMENT_W 71f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard}; 72f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 73f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardenum FCInstr { 74f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard FC_IF_PREDICATE = 0, 75f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard FC_ELSE, 76f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard FC_ENDIF, 77f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard FC_BGNLOOP, 78f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard FC_ENDLOOP, 79f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard FC_BREAK_PREDICATE, 80f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard FC_CONTINUE 81f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard}; 82f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 83f98f2ce29e6e2996fa58f38979143eceaa818335Tom StellardMCCodeEmitter *llvm::createR600MCCodeEmitter(const MCInstrInfo &MCII, 8434f533a6c351d8b255810c9b4b8713700e66ee88Tom Stellard const MCRegisterInfo &MRI, 8534f533a6c351d8b255810c9b4b8713700e66ee88Tom Stellard const MCSubtargetInfo &STI) { 8636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines return new R600MCCodeEmitter(MCII, MRI); 87f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard} 88f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 89f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardvoid R600MCCodeEmitter::EncodeInstruction(const MCInst &MI, raw_ostream &OS, 9036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines SmallVectorImpl<MCFixup> &Fixups, 9136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines const MCSubtargetInfo &STI) const { 9232c76107d029c1cad5935d08cdcde6139cf874bbTom Stellard const MCInstrDesc &Desc = MCII.get(MI.getOpcode()); 9332c76107d029c1cad5935d08cdcde6139cf874bbTom Stellard if (MI.getOpcode() == AMDGPU::RETURN || 94b6379de427c009284d47c5fc764f11bbd2bf2484Vincent Lejeune MI.getOpcode() == AMDGPU::FETCH_CLAUSE || 952c836f84dba99e7b041909160c739db779760b79Vincent Lejeune MI.getOpcode() == AMDGPU::ALU_CLAUSE || 96f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard MI.getOpcode() == AMDGPU::BUNDLE || 97f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard MI.getOpcode() == AMDGPU::KILL) { 98f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return; 9932c76107d029c1cad5935d08cdcde6139cf874bbTom Stellard } else if (IS_VTX(Desc)) { 10036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines uint64_t InstWord01 = getBinaryCodeForInstr(MI, Fixups, STI); 10132c76107d029c1cad5935d08cdcde6139cf874bbTom Stellard uint32_t InstWord2 = MI.getOperand(2).getImm(); // Offset 102d6055262d23b1a8f2b5c74ab94fc6c143aca1c45Tom Stellard if (!(STI.getFeatureBits() & AMDGPU::FeatureCaymanISA)) { 103d6055262d23b1a8f2b5c74ab94fc6c143aca1c45Tom Stellard InstWord2 |= 1 << 19; // Mega-Fetch bit 104d6055262d23b1a8f2b5c74ab94fc6c143aca1c45Tom Stellard } 10532c76107d029c1cad5935d08cdcde6139cf874bbTom Stellard 10632c76107d029c1cad5935d08cdcde6139cf874bbTom Stellard Emit(InstWord01, OS); 10732c76107d029c1cad5935d08cdcde6139cf874bbTom Stellard Emit(InstWord2, OS); 1082134219b654641a7e813d593f4491ad18133963cRafael Espindola Emit((uint32_t) 0, OS); 10932c76107d029c1cad5935d08cdcde6139cf874bbTom Stellard } else if (IS_TEX(Desc)) { 110d3293b49f9c7af741d2edd3062499fb50db0e89bVincent Lejeune int64_t Sampler = MI.getOperand(14).getImm(); 111d3293b49f9c7af741d2edd3062499fb50db0e89bVincent Lejeune 112eee6cdd7819b66e0d95a7a18337569b981374937Rafael Espindola int64_t SrcSelect[4] = { 113d3293b49f9c7af741d2edd3062499fb50db0e89bVincent Lejeune MI.getOperand(2).getImm(), 114d3293b49f9c7af741d2edd3062499fb50db0e89bVincent Lejeune MI.getOperand(3).getImm(), 115d3293b49f9c7af741d2edd3062499fb50db0e89bVincent Lejeune MI.getOperand(4).getImm(), 116d3293b49f9c7af741d2edd3062499fb50db0e89bVincent Lejeune MI.getOperand(5).getImm() 117d3293b49f9c7af741d2edd3062499fb50db0e89bVincent Lejeune }; 1187eac03220344d1b558ea6690cf73d2b76c7e551eRafael Espindola int64_t Offsets[3] = { 119d3293b49f9c7af741d2edd3062499fb50db0e89bVincent Lejeune MI.getOperand(6).getImm() & 0x1F, 120d3293b49f9c7af741d2edd3062499fb50db0e89bVincent Lejeune MI.getOperand(7).getImm() & 0x1F, 121d3293b49f9c7af741d2edd3062499fb50db0e89bVincent Lejeune MI.getOperand(8).getImm() & 0x1F 122d3293b49f9c7af741d2edd3062499fb50db0e89bVincent Lejeune }; 123d3293b49f9c7af741d2edd3062499fb50db0e89bVincent Lejeune 12436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines uint64_t Word01 = getBinaryCodeForInstr(MI, Fixups, STI); 125d3293b49f9c7af741d2edd3062499fb50db0e89bVincent Lejeune uint32_t Word2 = Sampler << 15 | SrcSelect[ELEMENT_X] << 20 | 126d3293b49f9c7af741d2edd3062499fb50db0e89bVincent Lejeune SrcSelect[ELEMENT_Y] << 23 | SrcSelect[ELEMENT_Z] << 26 | 127d3293b49f9c7af741d2edd3062499fb50db0e89bVincent Lejeune SrcSelect[ELEMENT_W] << 29 | Offsets[0] << 0 | Offsets[1] << 5 | 128d3293b49f9c7af741d2edd3062499fb50db0e89bVincent Lejeune Offsets[2] << 10; 129d3293b49f9c7af741d2edd3062499fb50db0e89bVincent Lejeune 130d3293b49f9c7af741d2edd3062499fb50db0e89bVincent Lejeune Emit(Word01, OS); 131d3293b49f9c7af741d2edd3062499fb50db0e89bVincent Lejeune Emit(Word2, OS); 1322134219b654641a7e813d593f4491ad18133963cRafael Espindola Emit((uint32_t) 0, OS); 133f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } else { 13436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines uint64_t Inst = getBinaryCodeForInstr(MI, Fixups, STI); 1350976e3c6d9b1bfaea1267188e6a20dc41318832aTom Stellard if ((STI.getFeatureBits() & AMDGPU::FeatureR600ALUInst) && 1360976e3c6d9b1bfaea1267188e6a20dc41318832aTom Stellard ((Desc.TSFlags & R600_InstFlag::OP1) || 1370976e3c6d9b1bfaea1267188e6a20dc41318832aTom Stellard Desc.TSFlags & R600_InstFlag::OP2)) { 1380976e3c6d9b1bfaea1267188e6a20dc41318832aTom Stellard uint64_t ISAOpCode = Inst & (0x3FFULL << 39); 1390976e3c6d9b1bfaea1267188e6a20dc41318832aTom Stellard Inst &= ~(0x3FFULL << 39); 1400976e3c6d9b1bfaea1267188e6a20dc41318832aTom Stellard Inst |= ISAOpCode << 1; 1410976e3c6d9b1bfaea1267188e6a20dc41318832aTom Stellard } 14232c76107d029c1cad5935d08cdcde6139cf874bbTom Stellard Emit(Inst, OS); 143f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } 144f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard} 145f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 146f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardvoid R600MCCodeEmitter::EmitByte(unsigned int Byte, raw_ostream &OS) const { 147f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard OS.write((uint8_t) Byte & 0xff); 148f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard} 149f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 150f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardvoid R600MCCodeEmitter::Emit(uint32_t Value, raw_ostream &OS) const { 151f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard for (unsigned i = 0; i < 4; i++) { 152f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard OS.write((uint8_t) ((Value >> (8 * i)) & 0xff)); 153f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } 154f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard} 155f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 156f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardvoid R600MCCodeEmitter::Emit(uint64_t Value, raw_ostream &OS) const { 157f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard for (unsigned i = 0; i < 8; i++) { 158f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard EmitByte((Value >> (8 * i)) & 0xff, OS); 159f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } 160f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard} 161f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 162f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardunsigned R600MCCodeEmitter::getHWRegChan(unsigned reg) const { 163f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return MRI.getEncodingValue(reg) >> HW_CHAN_SHIFT; 164f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard} 165f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 166f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardunsigned R600MCCodeEmitter::getHWReg(unsigned RegNo) const { 167f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return MRI.getEncodingValue(RegNo) & HW_REG_MASK; 168f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard} 169f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 170f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellarduint64_t R600MCCodeEmitter::getMachineOpValue(const MCInst &MI, 171f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard const MCOperand &MO, 17236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines SmallVectorImpl<MCFixup> &Fixup, 17336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines const MCSubtargetInfo &STI) const { 174f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard if (MO.isReg()) { 175cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines if (HAS_NATIVE_OPERANDS(MCII.get(MI.getOpcode()).TSFlags)) 176f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return MRI.getEncodingValue(MO.getReg()); 177cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines return getHWReg(MO.getReg()); 178f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } 179cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines 180cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines assert(MO.isImm()); 181cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines return MO.getImm(); 182f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard} 183f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 184f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard#include "AMDGPUGenMCCodeEmitter.inc" 185