1dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune//===-- R600ClauseMergePass - Merge consecutive CF_ALU -------------------===// 2dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune// 3dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune// The LLVM Compiler Infrastructure 4dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune// 5dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune// This file is distributed under the University of Illinois Open Source 6dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune// License. See LICENSE.TXT for details. 7dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune// 8dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune//===----------------------------------------------------------------------===// 9dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune// 10dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune/// \file 11dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune/// R600EmitClauseMarker pass emits CFAlu instruction in a conservative maneer. 12dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune/// This pass is merging consecutive CFAlus where applicable. 13dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune/// It needs to be called after IfCvt for best results. 14dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune//===----------------------------------------------------------------------===// 15dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune 16dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune#include "AMDGPU.h" 17dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune#include "R600Defines.h" 18dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune#include "R600InstrInfo.h" 19dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune#include "R600MachineFunctionInfo.h" 20dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune#include "R600RegisterInfo.h" 21dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune#include "llvm/CodeGen/MachineFunctionPass.h" 22dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune#include "llvm/CodeGen/MachineInstrBuilder.h" 23dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune#include "llvm/CodeGen/MachineRegisterInfo.h" 24dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune#include "llvm/Support/Debug.h" 25dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune#include "llvm/Support/raw_ostream.h" 26dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune 27dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeuneusing namespace llvm; 28dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune 29dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines#define DEBUG_TYPE "r600mergeclause" 30dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 31dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeunenamespace { 32dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune 33dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeunestatic bool isCFAlu(const MachineInstr *MI) { 34dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune switch (MI->getOpcode()) { 35dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune case AMDGPU::CF_ALU: 36dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune case AMDGPU::CF_ALU_PUSH_BEFORE: 37dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune return true; 38dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune default: 39dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune return false; 40dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune } 41dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune} 42dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune 43dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeuneclass R600ClauseMergePass : public MachineFunctionPass { 44dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune 45dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeuneprivate: 46dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune static char ID; 47dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune const R600InstrInfo *TII; 48dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune 49dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune unsigned getCFAluSize(const MachineInstr *MI) const; 50dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune bool isCFAluEnabled(const MachineInstr *MI) const; 51dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune 52dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune /// IfCvt pass can generate "disabled" ALU clause marker that need to be 53dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune /// removed and their content affected to the previous alu clause. 5436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines /// This function parse instructions after CFAlu until it find a disabled 55dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune /// CFAlu and merge the content, or an enabled CFAlu. 56dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune void cleanPotentialDisabledCFAlu(MachineInstr *CFAlu) const; 57dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune 58dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune /// Check whether LatrCFAlu can be merged into RootCFAlu and do it if 59dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune /// it is the case. 60dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune bool mergeIfPossible(MachineInstr *RootCFAlu, const MachineInstr *LatrCFAlu) 61dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune const; 62dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune 63dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeunepublic: 64dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune R600ClauseMergePass(TargetMachine &tm) : MachineFunctionPass(ID) { } 65dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune 66dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool runOnMachineFunction(MachineFunction &MF) override; 67dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune 68dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const char *getPassName() const override; 69dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune}; 70dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune 71dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeunechar R600ClauseMergePass::ID = 0; 72dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune 73dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeuneunsigned R600ClauseMergePass::getCFAluSize(const MachineInstr *MI) const { 74dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune assert(isCFAlu(MI)); 75dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune return MI->getOperand( 76dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune TII->getOperandIdx(MI->getOpcode(), AMDGPU::OpName::COUNT)).getImm(); 77dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune} 78dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune 79dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeunebool R600ClauseMergePass::isCFAluEnabled(const MachineInstr *MI) const { 80dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune assert(isCFAlu(MI)); 81dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune return MI->getOperand( 82dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune TII->getOperandIdx(MI->getOpcode(), AMDGPU::OpName::Enabled)).getImm(); 83dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune} 84dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune 85dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeunevoid R600ClauseMergePass::cleanPotentialDisabledCFAlu(MachineInstr *CFAlu) 86dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune const { 87dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune int CntIdx = TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::COUNT); 88dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune MachineBasicBlock::iterator I = CFAlu, E = CFAlu->getParent()->end(); 89dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune I++; 90dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune do { 91dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune while (I!= E && !isCFAlu(I)) 92dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune I++; 93dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune if (I == E) 94dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune return; 95dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune MachineInstr *MI = I++; 96dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune if (isCFAluEnabled(MI)) 97dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune break; 98dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune CFAlu->getOperand(CntIdx).setImm(getCFAluSize(CFAlu) + getCFAluSize(MI)); 99dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune MI->eraseFromParent(); 100dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune } while (I != E); 101dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune} 102dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune 103dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeunebool R600ClauseMergePass::mergeIfPossible(MachineInstr *RootCFAlu, 104dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune const MachineInstr *LatrCFAlu) const { 105dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune assert(isCFAlu(RootCFAlu) && isCFAlu(LatrCFAlu)); 106dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune int CntIdx = TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::COUNT); 107dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune unsigned RootInstCount = getCFAluSize(RootCFAlu), 108dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune LaterInstCount = getCFAluSize(LatrCFAlu); 109dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune unsigned CumuledInsts = RootInstCount + LaterInstCount; 110dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune if (CumuledInsts >= TII->getMaxAlusPerClause()) { 111dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune DEBUG(dbgs() << "Excess inst counts\n"); 112dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune return false; 113dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune } 114dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune if (RootCFAlu->getOpcode() == AMDGPU::CF_ALU_PUSH_BEFORE) 115dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune return false; 116dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune // Is KCache Bank 0 compatible ? 117dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune int Mode0Idx = 118dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::KCACHE_MODE0); 119dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune int KBank0Idx = 120dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::KCACHE_BANK0); 121dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune int KBank0LineIdx = 122dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::KCACHE_ADDR0); 123dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune if (LatrCFAlu->getOperand(Mode0Idx).getImm() && 124dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune RootCFAlu->getOperand(Mode0Idx).getImm() && 125dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune (LatrCFAlu->getOperand(KBank0Idx).getImm() != 126dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune RootCFAlu->getOperand(KBank0Idx).getImm() || 127dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune LatrCFAlu->getOperand(KBank0LineIdx).getImm() != 128dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune RootCFAlu->getOperand(KBank0LineIdx).getImm())) { 129dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune DEBUG(dbgs() << "Wrong KC0\n"); 130dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune return false; 131dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune } 132dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune // Is KCache Bank 1 compatible ? 133dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune int Mode1Idx = 134dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::KCACHE_MODE1); 135dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune int KBank1Idx = 136dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::KCACHE_BANK1); 137dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune int KBank1LineIdx = 138dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::KCACHE_ADDR1); 139dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune if (LatrCFAlu->getOperand(Mode1Idx).getImm() && 140dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune RootCFAlu->getOperand(Mode1Idx).getImm() && 141dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune (LatrCFAlu->getOperand(KBank1Idx).getImm() != 142dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune RootCFAlu->getOperand(KBank1Idx).getImm() || 143dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune LatrCFAlu->getOperand(KBank1LineIdx).getImm() != 144dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune RootCFAlu->getOperand(KBank1LineIdx).getImm())) { 145dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune DEBUG(dbgs() << "Wrong KC0\n"); 146dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune return false; 147dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune } 148dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune if (LatrCFAlu->getOperand(Mode0Idx).getImm()) { 149dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune RootCFAlu->getOperand(Mode0Idx).setImm( 150dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune LatrCFAlu->getOperand(Mode0Idx).getImm()); 151dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune RootCFAlu->getOperand(KBank0Idx).setImm( 152dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune LatrCFAlu->getOperand(KBank0Idx).getImm()); 153dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune RootCFAlu->getOperand(KBank0LineIdx).setImm( 154dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune LatrCFAlu->getOperand(KBank0LineIdx).getImm()); 155dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune } 156dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune if (LatrCFAlu->getOperand(Mode1Idx).getImm()) { 157dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune RootCFAlu->getOperand(Mode1Idx).setImm( 158dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune LatrCFAlu->getOperand(Mode1Idx).getImm()); 159dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune RootCFAlu->getOperand(KBank1Idx).setImm( 160dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune LatrCFAlu->getOperand(KBank1Idx).getImm()); 161dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune RootCFAlu->getOperand(KBank1LineIdx).setImm( 162dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune LatrCFAlu->getOperand(KBank1LineIdx).getImm()); 163dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune } 164dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune RootCFAlu->getOperand(CntIdx).setImm(CumuledInsts); 165dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune RootCFAlu->setDesc(TII->get(LatrCFAlu->getOpcode())); 166dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune return true; 167dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune} 168dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune 169dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeunebool R600ClauseMergePass::runOnMachineFunction(MachineFunction &MF) { 170dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune TII = static_cast<const R600InstrInfo *>(MF.getTarget().getInstrInfo()); 171dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune for (MachineFunction::iterator BB = MF.begin(), BB_E = MF.end(); 172dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune BB != BB_E; ++BB) { 173dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune MachineBasicBlock &MBB = *BB; 174dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); 175dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune MachineBasicBlock::iterator LatestCFAlu = E; 176dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune while (I != E) { 177dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune MachineInstr *MI = I++; 178dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune if ((!TII->canBeConsideredALU(MI) && !isCFAlu(MI)) || 179dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune TII->mustBeLastInClause(MI->getOpcode())) 180dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune LatestCFAlu = E; 181dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune if (!isCFAlu(MI)) 182dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune continue; 183dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune cleanPotentialDisabledCFAlu(MI); 184dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune 185dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune if (LatestCFAlu != E && mergeIfPossible(LatestCFAlu, MI)) { 186dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune MI->eraseFromParent(); 187dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune } else { 188dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune assert(MI->getOperand(8).getImm() && "CF ALU instruction disabled"); 189dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune LatestCFAlu = MI; 190dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune } 191dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune } 192dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune } 193dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune return false; 194dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune} 195dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune 196dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeuneconst char *R600ClauseMergePass::getPassName() const { 197dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune return "R600 Merge Clause Markers Pass"; 198dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune} 199dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune 200dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune} // end anonymous namespace 201dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune 202dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune 203dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeunellvm::FunctionPass *llvm::createR600ClauseMergePass(TargetMachine &TM) { 204dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune return new R600ClauseMergePass(TM); 205dfef7cbfc6a96d129b99750f554c7dbc000d3228Vincent Lejeune} 206