SIMachineFunctionInfo.h revision 36b56886974eae4f9c5ebc96befd3e7bfe5de338 
1//===- SIMachineFunctionInfo.h - SIMachineFunctionInfo interface -*- C++ -*-==//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10/// \file
11//
12//===----------------------------------------------------------------------===//
13
14
15#ifndef SIMACHINEFUNCTIONINFO_H_
16#define SIMACHINEFUNCTIONINFO_H_
17
18#include "AMDGPUMachineFunction.h"
19#include <map>
20
21namespace llvm {
22
23class MachineRegisterInfo;
24
25/// This class keeps track of the SPI_SP_INPUT_ADDR config register, which
26/// tells the hardware which interpolation parameters to load.
27class SIMachineFunctionInfo : public AMDGPUMachineFunction {
28  virtual void anchor();
29public:
30
31  struct SpilledReg {
32    unsigned VGPR;
33    int Lane;
34    SpilledReg(unsigned R, int L) : VGPR (R), Lane (L) { }
35    SpilledReg() : VGPR(0), Lane(-1) { }
36    bool hasLane() { return Lane != -1;}
37  };
38
39  struct RegSpillTracker {
40  private:
41    unsigned CurrentLane;
42    std::map<unsigned, SpilledReg> SpilledRegisters;
43  public:
44    unsigned LaneVGPR;
45    RegSpillTracker() : CurrentLane(0), SpilledRegisters(), LaneVGPR(0) { }
46    unsigned getNextLane(MachineRegisterInfo &MRI);
47    void addSpilledReg(unsigned FrameIndex, unsigned Reg, int Lane = -1);
48    const SpilledReg& getSpilledReg(unsigned FrameIndex);
49    bool programSpillsRegisters() { return !SpilledRegisters.empty(); }
50  };
51
52  // SIMachineFunctionInfo definition
53
54  SIMachineFunctionInfo(const MachineFunction &MF);
55  unsigned PSInputAddr;
56  struct RegSpillTracker SpillTracker;
57};
58
59} // End namespace llvm
60
61
62#endif //_SIMACHINEFUNCTIONINFO_H_
63