SIRegisterInfo.cpp revision f98f2ce29e6e2996fa58f38979143eceaa818335 
1//===-- SIRegisterInfo.cpp - SI Register Information ---------------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10/// \file
11/// \brief SI implementation of the TargetRegisterInfo class.
12//
13//===----------------------------------------------------------------------===//
14
15
16#include "SIRegisterInfo.h"
17#include "AMDGPUTargetMachine.h"
18
19using namespace llvm;
20
21SIRegisterInfo::SIRegisterInfo(AMDGPUTargetMachine &tm,
22    const TargetInstrInfo &tii)
23: AMDGPURegisterInfo(tm, tii),
24  TM(tm),
25  TII(tii)
26  { }
27
28BitVector SIRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
29  BitVector Reserved(getNumRegs());
30  return Reserved;
31}
32
33const TargetRegisterClass *
34SIRegisterInfo::getISARegClass(const TargetRegisterClass * rc) const {
35  switch (rc->getID()) {
36  case AMDGPU::GPRF32RegClassID:
37    return &AMDGPU::VReg_32RegClass;
38  default: return rc;
39  }
40}
41
42const TargetRegisterClass * SIRegisterInfo::getCFGStructurizerRegClass(
43                                                                   MVT VT) const {
44  switch(VT.SimpleTy) {
45    default:
46    case MVT::i32: return &AMDGPU::VReg_32RegClass;
47  }
48}
49