Sparc.td revision 0d170a7969e7e36ad00afe596f2937f0c74d2b49 
1//===- SparcV8.td - Describe the SparcV8 Target Machine ---------*- C++ -*-===//
2// 
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7// 
8//===----------------------------------------------------------------------===//
9//
10//
11//===----------------------------------------------------------------------===//
12
13//===----------------------------------------------------------------------===//
14// Target-independent interfaces which we are implementing
15//===----------------------------------------------------------------------===//
16
17include "../Target.td"
18
19//===----------------------------------------------------------------------===//
20// PowerPC Subtarget features.
21//
22 
23def Feature64Bit     : SubtargetFeature<"64bit", "bool", "Is64Bit",
24                                        "Enable 64-bit instructions">;
25
26
27//===----------------------------------------------------------------------===//
28// Register File Description
29//===----------------------------------------------------------------------===//
30
31include "SparcV8RegisterInfo.td"
32
33//===----------------------------------------------------------------------===//
34// Instruction Descriptions
35//===----------------------------------------------------------------------===//
36
37include "SparcV8InstrInfo.td"
38
39def SparcV8InstrInfo : InstrInfo {
40  let PHIInst = PHI;
41
42  // Define how we want to layout our target-specific information field.
43  let TSFlagsFields = [];
44  let TSFlagsShifts = [];
45}
46
47//===----------------------------------------------------------------------===//
48// SPARC processors supported.
49//===----------------------------------------------------------------------===//
50
51def : Processor<"generic", NoItineraries, []>;
52def : Processor<"v8", NoItineraries, []>;
53def : Processor<"v9", NoItineraries, [Feature64Bit]>;
54
55//===----------------------------------------------------------------------===//
56// Declare the target which we are implementing
57//===----------------------------------------------------------------------===//
58
59def SparcV8 : Target {
60  // Pointers are 32-bits in size.
61  let PointerType = i32;
62
63  // FIXME: Specify callee-saved registers
64  let CalleeSavedRegisters = [];
65
66  // Pull in Instruction Info:
67  let InstructionSet = SparcV8InstrInfo;
68}
69