Sparc.td revision 4dcfaac2e390fdd0e8a562aeccb666178bd8664c 
1//===- SparcV8.td - Describe the SparcV8 Target Machine ---------*- C++ -*-===//
2// 
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7// 
8//===----------------------------------------------------------------------===//
9//
10//
11//===----------------------------------------------------------------------===//
12
13//===----------------------------------------------------------------------===//
14// Target-independent interfaces which we are implementing
15//===----------------------------------------------------------------------===//
16
17include "../Target.td"
18
19//===----------------------------------------------------------------------===//
20// SPARC Subtarget features.
21//
22 
23def FeatureV9
24  : SubtargetFeature<"v9", "bool", "IsV9",
25                     "Enable SPARC-V9 instructions">;
26def FeatureV8Deprecated
27  : SubtargetFeature<"deprecated-v8", "bool", "V8DeprecatedInsts",
28                     "Enable deprecated V8 instructions in V9 mode">;
29def FeatureVIS
30  : SubtargetFeature<"vis", "bool", "IsVIS",
31                     "Enable UltraSPARC Visual Instruction Set extensions">;
32
33//===----------------------------------------------------------------------===//
34// Register File Description
35//===----------------------------------------------------------------------===//
36
37include "SparcV8RegisterInfo.td"
38
39//===----------------------------------------------------------------------===//
40// Instruction Descriptions
41//===----------------------------------------------------------------------===//
42
43include "SparcV8InstrInfo.td"
44
45def SparcV8InstrInfo : InstrInfo {
46  let PHIInst = PHI;
47
48  // Define how we want to layout our target-specific information field.
49  let TSFlagsFields = [];
50  let TSFlagsShifts = [];
51}
52
53//===----------------------------------------------------------------------===//
54// SPARC processors supported.
55//===----------------------------------------------------------------------===//
56
57class Proc<string Name, list<SubtargetFeature> Features>
58 : Processor<Name, NoItineraries, Features>;
59
60def : Proc<"generic",         []>;
61def : Proc<"v8",              []>;
62def : Proc<"supersparc",      []>;
63def : Proc<"sparclite",       []>;
64def : Proc<"f934",            []>;
65def : Proc<"hypersparc",      []>;
66def : Proc<"sparclite86x",    []>;
67def : Proc<"sparclet",        []>;
68def : Proc<"tsc701",          []>;
69def : Proc<"v9",              [FeatureV9]>;
70def : Proc<"ultrasparc",      [FeatureV9, FeatureV8Deprecated]>;
71def : Proc<"ultrasparc3",     [FeatureV9, FeatureV8Deprecated]>;
72def : Proc<"ultrasparc3-vis", [FeatureV9, FeatureV8Deprecated, FeatureVIS]>;
73
74
75//===----------------------------------------------------------------------===//
76// Declare the target which we are implementing
77//===----------------------------------------------------------------------===//
78
79def SparcV8 : Target {
80  // Pointers are 32-bits in size.
81  let PointerType = i32;
82
83  // FIXME: Specify callee-saved registers
84  let CalleeSavedRegisters = [];
85
86  // Pull in Instruction Info:
87  let InstructionSet = SparcV8InstrInfo;
88}
89