Sparc.td revision c01d497255f0d344163178c5f827e8b73f6f04d6
1//===- Sparc.td - Describe the Sparc Target Machine -------------*- C++ -*-===//
2// 
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7// 
8//===----------------------------------------------------------------------===//
9//
10//
11//===----------------------------------------------------------------------===//
12
13//===----------------------------------------------------------------------===//
14// Target-independent interfaces which we are implementing
15//===----------------------------------------------------------------------===//
16
17include "../Target.td"
18
19//===----------------------------------------------------------------------===//
20// SPARC Subtarget features.
21//
22 
23def FeatureV9
24  : SubtargetFeature<"v9", "IsV9", "true",
25                     "Enable SPARC-V9 instructions">;
26def FeatureV8Deprecated
27  : SubtargetFeature<"deprecated-v8", "V8DeprecatedInsts", "true",
28                     "Enable deprecated V8 instructions in V9 mode">;
29def FeatureVIS
30  : SubtargetFeature<"vis", "IsVIS", "true",
31                     "Enable UltraSPARC Visual Instruction Set extensions">;
32
33//===----------------------------------------------------------------------===//
34// Register File Description
35//===----------------------------------------------------------------------===//
36
37include "SparcRegisterInfo.td"
38
39//===----------------------------------------------------------------------===//
40// Instruction Descriptions
41//===----------------------------------------------------------------------===//
42
43include "SparcInstrInfo.td"
44
45def SparcInstrInfo : InstrInfo {
46  // Define how we want to layout our target-specific information field.
47  let TSFlagsFields = [];
48  let TSFlagsShifts = [];
49}
50
51//===----------------------------------------------------------------------===//
52// SPARC processors supported.
53//===----------------------------------------------------------------------===//
54
55class Proc<string Name, list<SubtargetFeature> Features>
56 : Processor<Name, NoItineraries, Features>;
57
58def : Proc<"generic",         []>;
59def : Proc<"v8",              []>;
60def : Proc<"supersparc",      []>;
61def : Proc<"sparclite",       []>;
62def : Proc<"f934",            []>;
63def : Proc<"hypersparc",      []>;
64def : Proc<"sparclite86x",    []>;
65def : Proc<"sparclet",        []>;
66def : Proc<"tsc701",          []>;
67def : Proc<"v9",              [FeatureV9]>;
68def : Proc<"ultrasparc",      [FeatureV9, FeatureV8Deprecated]>;
69def : Proc<"ultrasparc3",     [FeatureV9, FeatureV8Deprecated]>;
70def : Proc<"ultrasparc3-vis", [FeatureV9, FeatureV8Deprecated, FeatureVIS]>;
71
72
73//===----------------------------------------------------------------------===//
74// Declare the target which we are implementing
75//===----------------------------------------------------------------------===//
76
77def Sparc : Target {
78  // FIXME: Specify callee-saved registers
79  let CalleeSavedRegisters = [];
80
81  // Pull in Instruction Info:
82  let InstructionSet = SparcInstrInfo;
83}
84