SparcFrameLowering.cpp revision 3a1e76d62706f2773c23a684446b4c549c151669 
1//===-- SparcFrameLowering.cpp - Sparc Frame Information ------------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the Sparc implementation of TargetFrameLowering class.
11//
12//===----------------------------------------------------------------------===//
13
14#include "SparcFrameLowering.h"
15#include "SparcInstrInfo.h"
16#include "SparcMachineFunctionInfo.h"
17#include "llvm/CodeGen/MachineFrameInfo.h"
18#include "llvm/CodeGen/MachineFunction.h"
19#include "llvm/CodeGen/MachineInstrBuilder.h"
20#include "llvm/CodeGen/MachineModuleInfo.h"
21#include "llvm/CodeGen/MachineRegisterInfo.h"
22#include "llvm/IR/DataLayout.h"
23#include "llvm/IR/Function.h"
24#include "llvm/Support/CommandLine.h"
25#include "llvm/Target/TargetOptions.h"
26
27using namespace llvm;
28
29static cl::opt<bool>
30DisableLeafProc("disable-sparc-leaf-proc",
31                cl::init(false),
32                cl::desc("Disable Sparc leaf procedure optimization."),
33                cl::Hidden);
34
35
36void SparcFrameLowering::emitSPAdjustment(MachineFunction &MF,
37                                          MachineBasicBlock &MBB,
38                                          MachineBasicBlock::iterator MBBI,
39                                          int NumBytes,
40                                          unsigned ADDrr,
41                                          unsigned ADDri) const {
42
43  DebugLoc dl = (MBBI != MBB.end()) ? MBBI->getDebugLoc() : DebugLoc();
44  const SparcInstrInfo &TII =
45    *static_cast<const SparcInstrInfo*>(MF.getTarget().getInstrInfo());
46
47  if (NumBytes >= -4096 && NumBytes < 4096) {
48    BuildMI(MBB, MBBI, dl, TII.get(ADDri), SP::O6)
49      .addReg(SP::O6).addImm(NumBytes);
50    return;
51  }
52
53  // Emit this the hard way.  This clobbers G1 which we always know is
54  // available here.
55  if (NumBytes >= 0) {
56    // Emit nonnegative numbers with sethi + or.
57    // sethi %hi(NumBytes), %g1
58    // or %g1, %lo(NumBytes), %g1
59    // add %sp, %g1, %sp
60    BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1)
61      .addImm(HI22(NumBytes));
62    BuildMI(MBB, MBBI, dl, TII.get(SP::ORri), SP::G1)
63      .addReg(SP::G1).addImm(LO10(NumBytes));
64    BuildMI(MBB, MBBI, dl, TII.get(ADDrr), SP::O6)
65      .addReg(SP::O6).addReg(SP::G1);
66    return ;
67  }
68
69  // Emit negative numbers with sethi + xor.
70  // sethi %hix(NumBytes), %g1
71  // xor %g1, %lox(NumBytes), %g1
72  // add %sp, %g1, %sp
73  BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1)
74    .addImm(HIX22(NumBytes));
75  BuildMI(MBB, MBBI, dl, TII.get(SP::XORri), SP::G1)
76    .addReg(SP::G1).addImm(LOX10(NumBytes));
77  BuildMI(MBB, MBBI, dl, TII.get(ADDrr), SP::O6)
78    .addReg(SP::O6).addReg(SP::G1);
79}
80
81void SparcFrameLowering::emitPrologue(MachineFunction &MF) const {
82  SparcMachineFunctionInfo *FuncInfo = MF.getInfo<SparcMachineFunctionInfo>();
83
84  MachineBasicBlock &MBB = MF.front();
85  MachineFrameInfo *MFI = MF.getFrameInfo();
86  const SparcInstrInfo &TII =
87    *static_cast<const SparcInstrInfo*>(MF.getTarget().getInstrInfo());
88  MachineBasicBlock::iterator MBBI = MBB.begin();
89  DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
90
91  // Get the number of bytes to allocate from the FrameInfo
92  int NumBytes = (int) MFI->getStackSize();
93
94  unsigned SAVEri = SP::SAVEri;
95  unsigned SAVErr = SP::SAVErr;
96  if (FuncInfo->isLeafProc()) {
97    if (NumBytes == 0)
98      return;
99    SAVEri = SP::ADDri;
100    SAVErr = SP::ADDrr;
101  }
102  NumBytes = - SubTarget.getAdjustedFrameSize(NumBytes);
103  emitSPAdjustment(MF, MBB, MBBI, NumBytes, SAVErr, SAVEri);
104
105  MachineModuleInfo &MMI = MF.getMMI();
106  const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
107  MCSymbol *FrameLabel = MMI.getContext().CreateTempSymbol();
108  BuildMI(MBB, MBBI, dl, TII.get(SP::PROLOG_LABEL)).addSym(FrameLabel);
109
110  unsigned regFP = MRI->getDwarfRegNum(SP::I6, true);
111
112  // Emit ".cfi_def_cfa_register 30".
113  MMI.addFrameInst(MCCFIInstruction::createDefCfaRegister(FrameLabel,
114                                                          regFP));
115  // Emit ".cfi_window_save".
116  MMI.addFrameInst(MCCFIInstruction::createWindowSave(FrameLabel));
117
118  unsigned regInRA = MRI->getDwarfRegNum(SP::I7, true);
119  unsigned regOutRA = MRI->getDwarfRegNum(SP::O7, true);
120  // Emit ".cfi_register 15, 31".
121  MMI.addFrameInst(MCCFIInstruction::createRegister(FrameLabel,
122                                                    regOutRA,
123                                                    regInRA));
124}
125
126void SparcFrameLowering::
127eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
128                              MachineBasicBlock::iterator I) const {
129  if (!hasReservedCallFrame(MF)) {
130    MachineInstr &MI = *I;
131    DebugLoc DL = MI.getDebugLoc();
132    int Size = MI.getOperand(0).getImm();
133    if (MI.getOpcode() == SP::ADJCALLSTACKDOWN)
134      Size = -Size;
135
136    if (Size)
137      emitSPAdjustment(MF, MBB, I, Size, SP::ADDrr, SP::ADDri);
138  }
139  MBB.erase(I);
140}
141
142
143void SparcFrameLowering::emitEpilogue(MachineFunction &MF,
144                                  MachineBasicBlock &MBB) const {
145  SparcMachineFunctionInfo *FuncInfo = MF.getInfo<SparcMachineFunctionInfo>();
146  MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
147  const SparcInstrInfo &TII =
148    *static_cast<const SparcInstrInfo*>(MF.getTarget().getInstrInfo());
149  DebugLoc dl = MBBI->getDebugLoc();
150  assert(MBBI->getOpcode() == SP::RETL &&
151         "Can only put epilog before 'retl' instruction!");
152  if (!FuncInfo->isLeafProc()) {
153    BuildMI(MBB, MBBI, dl, TII.get(SP::RESTORErr), SP::G0).addReg(SP::G0)
154      .addReg(SP::G0);
155    return;
156  }
157  MachineFrameInfo *MFI = MF.getFrameInfo();
158
159  int NumBytes = (int) MFI->getStackSize();
160  if (NumBytes == 0)
161    return;
162
163  NumBytes = SubTarget.getAdjustedFrameSize(NumBytes);
164  emitSPAdjustment(MF, MBB, MBBI, NumBytes, SP::ADDrr, SP::ADDri);
165}
166
167bool SparcFrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
168  // Reserve call frame if there are no variable sized objects on the stack.
169  return !MF.getFrameInfo()->hasVarSizedObjects();
170}
171
172// hasFP - Return true if the specified function should have a dedicated frame
173// pointer register.  This is true if the function has variable sized allocas or
174// if frame pointer elimination is disabled.
175bool SparcFrameLowering::hasFP(const MachineFunction &MF) const {
176  const MachineFrameInfo *MFI = MF.getFrameInfo();
177  return MF.getTarget().Options.DisableFramePointerElim(MF) ||
178    MFI->hasVarSizedObjects() || MFI->isFrameAddressTaken();
179}
180
181
182static bool LLVM_ATTRIBUTE_UNUSED verifyLeafProcRegUse(MachineRegisterInfo *MRI)
183{
184
185  for (unsigned reg = SP::I0; reg <= SP::I7; ++reg)
186    if (MRI->isPhysRegUsed(reg))
187      return false;
188
189  for (unsigned reg = SP::L0; reg <= SP::L7; ++reg)
190    if (MRI->isPhysRegUsed(reg))
191      return false;
192
193  return true;
194}
195
196bool SparcFrameLowering::isLeafProc(MachineFunction &MF) const
197{
198
199  MachineRegisterInfo &MRI = MF.getRegInfo();
200  MachineFrameInfo    *MFI = MF.getFrameInfo();
201
202  return !(MFI->hasCalls()              // has calls
203           || MRI.isPhysRegUsed(SP::L0) // Too many registers needed
204           || MRI.isPhysRegUsed(SP::O6) // %SP is used
205           || hasFP(MF));               // need %FP
206}
207
208void SparcFrameLowering::remapRegsForLeafProc(MachineFunction &MF) const {
209
210  MachineRegisterInfo &MRI = MF.getRegInfo();
211
212  // Remap %i[0-7] to %o[0-7].
213  for (unsigned reg = SP::I0; reg <= SP::I7; ++reg) {
214    if (!MRI.isPhysRegUsed(reg))
215      continue;
216    unsigned mapped_reg = (reg - SP::I0 + SP::O0);
217    assert(!MRI.isPhysRegUsed(mapped_reg));
218
219    // Replace I register with O register.
220    MRI.replaceRegWith(reg, mapped_reg);
221
222    // Mark the reg unused.
223    MRI.setPhysRegUnused(reg);
224  }
225
226  // Rewrite MBB's Live-ins.
227  for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
228       MBB != E; ++MBB) {
229    for (unsigned reg = SP::I0; reg <= SP::I7; ++reg) {
230      if (!MBB->isLiveIn(reg))
231        continue;
232      MBB->removeLiveIn(reg);
233      MBB->addLiveIn(reg - SP::I0 + SP::O0);
234    }
235  }
236
237  assert(verifyLeafProcRegUse(&MRI));
238#ifdef XDEBUG
239  MF.verify(0, "After LeafProc Remapping");
240#endif
241}
242
243void SparcFrameLowering::processFunctionBeforeCalleeSavedScan
244                  (MachineFunction &MF, RegScavenger *RS) const {
245
246  if (!DisableLeafProc && isLeafProc(MF)) {
247    SparcMachineFunctionInfo *MFI = MF.getInfo<SparcMachineFunctionInfo>();
248    MFI->setLeafProc(true);
249
250    remapRegsForLeafProc(MF);
251  }
252
253}
254