SparcFrameLowering.cpp revision 530086925695f074b0e1e38a0d88ee6a4c91c54c 
1//===-- SparcFrameLowering.cpp - Sparc Frame Information ------------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the Sparc implementation of TargetFrameLowering class.
11//
12//===----------------------------------------------------------------------===//
13
14#include "SparcFrameLowering.h"
15#include "SparcInstrInfo.h"
16#include "SparcMachineFunctionInfo.h"
17#include "llvm/CodeGen/MachineFrameInfo.h"
18#include "llvm/CodeGen/MachineFunction.h"
19#include "llvm/CodeGen/MachineInstrBuilder.h"
20#include "llvm/CodeGen/MachineModuleInfo.h"
21#include "llvm/CodeGen/MachineRegisterInfo.h"
22#include "llvm/IR/DataLayout.h"
23#include "llvm/IR/Function.h"
24#include "llvm/Support/CommandLine.h"
25#include "llvm/Target/TargetOptions.h"
26
27using namespace llvm;
28
29static cl::opt<bool>
30DisableLeafProc("disable-sparc-leaf-proc",
31                cl::init(true),
32                cl::desc("Disable Sparc leaf procedure optimization."),
33                cl::Hidden);
34
35
36void SparcFrameLowering::emitPrologue(MachineFunction &MF) const {
37  SparcMachineFunctionInfo *FuncInfo = MF.getInfo<SparcMachineFunctionInfo>();
38  if (FuncInfo->isLeafProc())
39    return;
40
41  MachineBasicBlock &MBB = MF.front();
42  MachineFrameInfo *MFI = MF.getFrameInfo();
43  const SparcInstrInfo &TII =
44    *static_cast<const SparcInstrInfo*>(MF.getTarget().getInstrInfo());
45  MachineBasicBlock::iterator MBBI = MBB.begin();
46  DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
47
48  // Get the number of bytes to allocate from the FrameInfo
49  int NumBytes = (int) MFI->getStackSize();
50
51  if (SubTarget.is64Bit()) {
52    // All 64-bit stack frames must be 16-byte aligned, and must reserve space
53    // for spilling the 16 window registers at %sp+BIAS..%sp+BIAS+128.
54    NumBytes += 128;
55    // Frames with calls must also reserve space for 6 outgoing arguments
56    // whether they are used or not. LowerCall_64 takes care of that.
57    assert(NumBytes % 16 == 0 && "Stack size not 16-byte aligned");
58  } else {
59    // Emit the correct save instruction based on the number of bytes in
60    // the frame. Minimum stack frame size according to V8 ABI is:
61    //   16 words for register window spill
62    //    1 word for address of returned aggregate-value
63    // +  6 words for passing parameters on the stack
64    // ----------
65    //   23 words * 4 bytes per word = 92 bytes
66    NumBytes += 92;
67
68    // Round up to next doubleword boundary -- a double-word boundary
69    // is required by the ABI.
70    NumBytes = RoundUpToAlignment(NumBytes, 8);
71  }
72  NumBytes = -NumBytes;
73
74  if (NumBytes >= -4096) {
75    BuildMI(MBB, MBBI, dl, TII.get(SP::SAVEri), SP::O6)
76      .addReg(SP::O6).addImm(NumBytes);
77  } else {
78    // Emit this the hard way.  This clobbers G1 which we always know is
79    // available here.
80    unsigned OffHi = (unsigned)NumBytes >> 10U;
81    BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1).addImm(OffHi);
82    // Emit G1 = G1 + I6
83    BuildMI(MBB, MBBI, dl, TII.get(SP::ORri), SP::G1)
84      .addReg(SP::G1).addImm(NumBytes & ((1 << 10)-1));
85    BuildMI(MBB, MBBI, dl, TII.get(SP::SAVErr), SP::O6)
86      .addReg(SP::O6).addReg(SP::G1);
87  }
88}
89
90void SparcFrameLowering::
91eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
92                              MachineBasicBlock::iterator I) const {
93  if (!hasReservedCallFrame(MF)) {
94    MachineInstr &MI = *I;
95    DebugLoc DL = MI.getDebugLoc();
96    int Size = MI.getOperand(0).getImm();
97    if (MI.getOpcode() == SP::ADJCALLSTACKDOWN)
98      Size = -Size;
99    const SparcInstrInfo &TII =
100      *static_cast<const SparcInstrInfo*>(MF.getTarget().getInstrInfo());
101    if (Size)
102      BuildMI(MBB, I, DL, TII.get(SP::ADDri), SP::O6).addReg(SP::O6)
103        .addImm(Size);
104  }
105  MBB.erase(I);
106}
107
108
109void SparcFrameLowering::emitEpilogue(MachineFunction &MF,
110                                  MachineBasicBlock &MBB) const {
111  SparcMachineFunctionInfo *FuncInfo = MF.getInfo<SparcMachineFunctionInfo>();
112  if (FuncInfo->isLeafProc())
113    return;
114  MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
115  const SparcInstrInfo &TII =
116    *static_cast<const SparcInstrInfo*>(MF.getTarget().getInstrInfo());
117  DebugLoc dl = MBBI->getDebugLoc();
118  assert(MBBI->getOpcode() == SP::RETL &&
119         "Can only put epilog before 'retl' instruction!");
120  BuildMI(MBB, MBBI, dl, TII.get(SP::RESTORErr), SP::G0).addReg(SP::G0)
121    .addReg(SP::G0);
122}
123
124bool SparcFrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
125  //Reserve call frame if there are no variable sized objects on the stack
126  return !MF.getFrameInfo()->hasVarSizedObjects();
127}
128
129// hasFP - Return true if the specified function should have a dedicated frame
130// pointer register.  This is true if the function has variable sized allocas or
131// if frame pointer elimination is disabled.
132bool SparcFrameLowering::hasFP(const MachineFunction &MF) const {
133  const MachineFrameInfo *MFI = MF.getFrameInfo();
134  return MF.getTarget().Options.DisableFramePointerElim(MF) ||
135    MFI->hasVarSizedObjects() || MFI->isFrameAddressTaken();
136}
137
138
139static bool verifyLeafProcRegUse(MachineRegisterInfo *MRI)
140{
141
142  for (unsigned reg = SP::I0; reg <= SP::I7; ++reg)
143    if (MRI->isPhysRegUsed(reg))
144      return false;
145
146  for (unsigned reg = SP::L0; reg <= SP::L7; ++reg)
147    if (MRI->isPhysRegUsed(reg))
148      return false;
149
150  return true;
151}
152
153bool SparcFrameLowering::isLeafProc(MachineFunction &MF) const
154{
155
156  MachineRegisterInfo &MRI = MF.getRegInfo();
157  MachineFrameInfo    *MFI = MF.getFrameInfo();
158
159  return !(MFI->hasCalls()              // has calls
160           || MRI.isPhysRegUsed(SP::L0) // Too many registers needed
161           || MRI.isPhysRegUsed(SP::O6) // %SP is used
162           || hasFP(MF));               // need %FP
163}
164
165void SparcFrameLowering::remapRegsForLeafProc(MachineFunction &MF) const {
166
167  MachineRegisterInfo &MRI = MF.getRegInfo();
168
169  //remap %i[0-7] to %o[0-7]
170  for (unsigned reg = SP::I0; reg <= SP::I7; ++reg) {
171    if (!MRI.isPhysRegUsed(reg))
172      continue;
173    unsigned mapped_reg = (reg - SP::I0 + SP::O0);
174    assert(!MRI.isPhysRegUsed(mapped_reg));
175
176    //Replace I register with O register
177    MRI.replaceRegWith(reg, mapped_reg);
178
179    //mark the reg unused.
180    MRI.setPhysRegUnused(reg);
181  }
182
183  assert(verifyLeafProcRegUse(&MRI));
184#ifdef XDEBUG
185  MF.verify(0, "After LeafProc Remapping");
186#endif
187}
188
189void SparcFrameLowering::processFunctionBeforeCalleeSavedScan
190                  (MachineFunction &MF, RegScavenger *RS) const {
191
192  if (!DisableLeafProc && isLeafProc(MF)) {
193    SparcMachineFunctionInfo *MFI = MF.getInfo<SparcMachineFunctionInfo>();
194    MFI->setLeafProc(true);
195
196    remapRegsForLeafProc(MF);
197  }
198
199}
200