SparcFrameLowering.cpp revision 8717679c449db5555ec0ce2873bbbe53106f4c88 
1//===-- SparcFrameLowering.cpp - Sparc Frame Information ------------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the Sparc implementation of TargetFrameLowering class.
11//
12//===----------------------------------------------------------------------===//
13
14#include "SparcFrameLowering.h"
15#include "SparcInstrInfo.h"
16#include "SparcMachineFunctionInfo.h"
17#include "llvm/CodeGen/MachineFrameInfo.h"
18#include "llvm/CodeGen/MachineFunction.h"
19#include "llvm/CodeGen/MachineInstrBuilder.h"
20#include "llvm/CodeGen/MachineModuleInfo.h"
21#include "llvm/CodeGen/MachineRegisterInfo.h"
22#include "llvm/IR/DataLayout.h"
23#include "llvm/IR/Function.h"
24#include "llvm/Support/CommandLine.h"
25#include "llvm/Target/TargetOptions.h"
26
27using namespace llvm;
28
29static cl::opt<bool>
30DisableLeafProc("disable-sparc-leaf-proc",
31                cl::init(false),
32                cl::desc("Disable Sparc leaf procedure optimization."),
33                cl::Hidden);
34
35
36void SparcFrameLowering::emitPrologue(MachineFunction &MF) const {
37  SparcMachineFunctionInfo *FuncInfo = MF.getInfo<SparcMachineFunctionInfo>();
38
39  MachineBasicBlock &MBB = MF.front();
40  MachineFrameInfo *MFI = MF.getFrameInfo();
41  const SparcInstrInfo &TII =
42    *static_cast<const SparcInstrInfo*>(MF.getTarget().getInstrInfo());
43  MachineBasicBlock::iterator MBBI = MBB.begin();
44  DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
45
46  // Get the number of bytes to allocate from the FrameInfo
47  int NumBytes = (int) MFI->getStackSize();
48
49  unsigned SAVEri = SP::SAVEri;
50  unsigned SAVErr = SP::SAVErr;
51  if (FuncInfo->isLeafProc()) {
52    if (NumBytes == 0)
53      return;
54    SAVEri = SP::ADDri;
55    SAVErr = SP::ADDrr;
56  }
57  NumBytes = - SubTarget.getAdjustedFrameSize(NumBytes);
58
59  if (NumBytes >= -4096) {
60    BuildMI(MBB, MBBI, dl, TII.get(SAVEri), SP::O6)
61      .addReg(SP::O6).addImm(NumBytes);
62  } else {
63    // Emit this the hard way.  This clobbers G1 which we always know is
64    // available here.
65    unsigned OffHi = (unsigned)NumBytes >> 10U;
66    BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1).addImm(OffHi);
67    // Emit G1 = G1 + I6
68    BuildMI(MBB, MBBI, dl, TII.get(SP::ORri), SP::G1)
69      .addReg(SP::G1).addImm(NumBytes & ((1 << 10)-1));
70    BuildMI(MBB, MBBI, dl, TII.get(SAVErr), SP::O6)
71      .addReg(SP::O6).addReg(SP::G1);
72  }
73}
74
75void SparcFrameLowering::
76eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
77                              MachineBasicBlock::iterator I) const {
78  if (!hasReservedCallFrame(MF)) {
79    MachineInstr &MI = *I;
80    DebugLoc DL = MI.getDebugLoc();
81    int Size = MI.getOperand(0).getImm();
82    if (MI.getOpcode() == SP::ADJCALLSTACKDOWN)
83      Size = -Size;
84    const SparcInstrInfo &TII =
85      *static_cast<const SparcInstrInfo*>(MF.getTarget().getInstrInfo());
86    if (Size)
87      BuildMI(MBB, I, DL, TII.get(SP::ADDri), SP::O6).addReg(SP::O6)
88        .addImm(Size);
89  }
90  MBB.erase(I);
91}
92
93
94void SparcFrameLowering::emitEpilogue(MachineFunction &MF,
95                                  MachineBasicBlock &MBB) const {
96  SparcMachineFunctionInfo *FuncInfo = MF.getInfo<SparcMachineFunctionInfo>();
97  MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
98  const SparcInstrInfo &TII =
99    *static_cast<const SparcInstrInfo*>(MF.getTarget().getInstrInfo());
100  DebugLoc dl = MBBI->getDebugLoc();
101  assert(MBBI->getOpcode() == SP::RETL &&
102         "Can only put epilog before 'retl' instruction!");
103  if (!FuncInfo->isLeafProc()) {
104    BuildMI(MBB, MBBI, dl, TII.get(SP::RESTORErr), SP::G0).addReg(SP::G0)
105      .addReg(SP::G0);
106    return;
107  }
108  MachineFrameInfo *MFI = MF.getFrameInfo();
109
110  int NumBytes = (int) MFI->getStackSize();
111  if (NumBytes == 0)
112    return;
113
114  NumBytes = SubTarget.getAdjustedFrameSize(NumBytes);
115
116  if (NumBytes < 4096) {
117    BuildMI(MBB, MBBI, dl, TII.get(SP::ADDri), SP::O6)
118      .addReg(SP::O6).addImm(NumBytes);
119  } else {
120    // Emit this the hard way.  This clobbers G1 which we always know is
121    // available here.
122    unsigned OffHi = (unsigned)NumBytes >> 10U;
123    BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1).addImm(OffHi);
124    // Emit G1 = G1 + I6
125    BuildMI(MBB, MBBI, dl, TII.get(SP::ORri), SP::G1)
126      .addReg(SP::G1).addImm(NumBytes & ((1 << 10)-1));
127    BuildMI(MBB, MBBI, dl, TII.get(SP::ADDrr), SP::O6)
128      .addReg(SP::O6).addReg(SP::G1);
129  }
130}
131
132bool SparcFrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
133  // Reserve call frame if there are no variable sized objects on the stack.
134  return !MF.getFrameInfo()->hasVarSizedObjects();
135}
136
137// hasFP - Return true if the specified function should have a dedicated frame
138// pointer register.  This is true if the function has variable sized allocas or
139// if frame pointer elimination is disabled.
140bool SparcFrameLowering::hasFP(const MachineFunction &MF) const {
141  const MachineFrameInfo *MFI = MF.getFrameInfo();
142  return MF.getTarget().Options.DisableFramePointerElim(MF) ||
143    MFI->hasVarSizedObjects() || MFI->isFrameAddressTaken();
144}
145
146
147static bool LLVM_ATTRIBUTE_UNUSED verifyLeafProcRegUse(MachineRegisterInfo *MRI)
148{
149
150  for (unsigned reg = SP::I0; reg <= SP::I7; ++reg)
151    if (MRI->isPhysRegUsed(reg))
152      return false;
153
154  for (unsigned reg = SP::L0; reg <= SP::L7; ++reg)
155    if (MRI->isPhysRegUsed(reg))
156      return false;
157
158  return true;
159}
160
161bool SparcFrameLowering::isLeafProc(MachineFunction &MF) const
162{
163
164  MachineRegisterInfo &MRI = MF.getRegInfo();
165  MachineFrameInfo    *MFI = MF.getFrameInfo();
166
167  return !(MFI->hasCalls()              // has calls
168           || MRI.isPhysRegUsed(SP::L0) // Too many registers needed
169           || MRI.isPhysRegUsed(SP::O6) // %SP is used
170           || hasFP(MF));               // need %FP
171}
172
173void SparcFrameLowering::remapRegsForLeafProc(MachineFunction &MF) const {
174
175  MachineRegisterInfo &MRI = MF.getRegInfo();
176
177  // Remap %i[0-7] to %o[0-7].
178  for (unsigned reg = SP::I0; reg <= SP::I7; ++reg) {
179    if (!MRI.isPhysRegUsed(reg))
180      continue;
181    unsigned mapped_reg = (reg - SP::I0 + SP::O0);
182    assert(!MRI.isPhysRegUsed(mapped_reg));
183
184    // Replace I register with O register.
185    MRI.replaceRegWith(reg, mapped_reg);
186
187    // Mark the reg unused.
188    MRI.setPhysRegUnused(reg);
189  }
190
191  // Rewrite MBB's Live-ins.
192  for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
193       MBB != E; ++MBB) {
194    for (unsigned reg = SP::I0; reg <= SP::I7; ++reg) {
195      if (!MBB->isLiveIn(reg))
196        continue;
197      MBB->removeLiveIn(reg);
198      MBB->addLiveIn(reg - SP::I0 + SP::O0);
199    }
200  }
201
202  assert(verifyLeafProcRegUse(&MRI));
203#ifdef XDEBUG
204  MF.verify(0, "After LeafProc Remapping");
205#endif
206}
207
208void SparcFrameLowering::processFunctionBeforeCalleeSavedScan
209                  (MachineFunction &MF, RegScavenger *RS) const {
210
211  if (!DisableLeafProc && isLeafProc(MF)) {
212    SparcMachineFunctionInfo *MFI = MF.getInfo<SparcMachineFunctionInfo>();
213    MFI->setLeafProc(true);
214
215    remapRegsForLeafProc(MF);
216  }
217
218}
219