SparcISelLowering.h revision 0ba2bcfcc3149a25d08aa8aa00fb6c34a4e25bdd 
1//===-- SparcISelLowering.h - Sparc DAG Lowering Interface ------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines the interfaces that Sparc uses to lower LLVM code into a
11// selection DAG.
12//
13//===----------------------------------------------------------------------===//
14
15#ifndef SPARC_ISELLOWERING_H
16#define SPARC_ISELLOWERING_H
17
18#include "llvm/Target/TargetLowering.h"
19#include "Sparc.h"
20
21namespace llvm {
22  namespace SPISD {
23    enum {
24      FIRST_NUMBER = ISD::BUILTIN_OP_END,
25      CMPICC,      // Compare two GPR operands, set icc.
26      CMPFCC,      // Compare two FP operands, set fcc.
27      BRICC,       // Branch to dest on icc condition
28      BRFCC,       // Branch to dest on fcc condition
29      SELECT_ICC,  // Select between two values using the current ICC flags.
30      SELECT_FCC,  // Select between two values using the current FCC flags.
31
32      Hi, Lo,      // Hi/Lo operations, typically on a global address.
33
34      FTOI,        // FP to Int within a FP register.
35      ITOF,        // Int to FP within a FP register.
36
37      CALL,        // A call instruction.
38      RET_FLAG     // Return with a flag operand.
39    };
40  }
41
42  class SparcTargetLowering : public TargetLowering {
43    int VarArgsFrameOffset;   // Frame offset to start of varargs area.
44  public:
45    SparcTargetLowering(TargetMachine &TM);
46    virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG);
47
48    int getVarArgsFrameOffset() const { return VarArgsFrameOffset; }
49
50    /// computeMaskedBitsForTargetNode - Determine which of the bits specified
51    /// in Mask are known to be either zero or one and return them in the
52    /// KnownZero/KnownOne bitsets.
53    virtual void computeMaskedBitsForTargetNode(const SDValue Op,
54                                                const APInt &Mask,
55                                                APInt &KnownZero,
56                                                APInt &KnownOne,
57                                                const SelectionDAG &DAG,
58                                                unsigned Depth = 0) const;
59
60    virtual void LowerArguments(Function &F, SelectionDAG &DAG,
61                                SmallVectorImpl<SDValue> &ArgValues);
62    virtual MachineBasicBlock *EmitInstrWithCustomInserter(MachineInstr *MI,
63                                                        MachineBasicBlock *MBB);
64
65    virtual const char *getTargetNodeName(unsigned Opcode) const;
66  };
67} // end namespace llvm
68
69#endif    // SPARC_ISELLOWERING_H
70