SparcInstrInfo.h revision 34dcc6fadca0a1117cdbd0e9b35c991a55b6e556
15f016e2cb5d11daeb237544de1c5d59f20fe1a6eReid Spencer//===- SparcInstrInfo.h - Sparc Instruction Information ---------*- C++ -*-===// 25f016e2cb5d11daeb237544de1c5d59f20fe1a6eReid Spencer// 35f016e2cb5d11daeb237544de1c5d59f20fe1a6eReid Spencer// The LLVM Compiler Infrastructure 45f016e2cb5d11daeb237544de1c5d59f20fe1a6eReid Spencer// 50bc735ffcfb223c0186419547abaa5c84482663eChris Lattner// This file is distributed under the University of Illinois Open Source 60bc735ffcfb223c0186419547abaa5c84482663eChris Lattner// License. See LICENSE.TXT for details. 75f016e2cb5d11daeb237544de1c5d59f20fe1a6eReid Spencer// 85f016e2cb5d11daeb237544de1c5d59f20fe1a6eReid Spencer//===----------------------------------------------------------------------===// 95f016e2cb5d11daeb237544de1c5d59f20fe1a6eReid Spencer// 105f016e2cb5d11daeb237544de1c5d59f20fe1a6eReid Spencer// This file contains the Sparc implementation of the TargetInstrInfo class. 115f016e2cb5d11daeb237544de1c5d59f20fe1a6eReid Spencer// 125f016e2cb5d11daeb237544de1c5d59f20fe1a6eReid Spencer//===----------------------------------------------------------------------===// 135f016e2cb5d11daeb237544de1c5d59f20fe1a6eReid Spencer 145f016e2cb5d11daeb237544de1c5d59f20fe1a6eReid Spencer#ifndef SPARCINSTRUCTIONINFO_H 155f016e2cb5d11daeb237544de1c5d59f20fe1a6eReid Spencer#define SPARCINSTRUCTIONINFO_H 165f016e2cb5d11daeb237544de1c5d59f20fe1a6eReid Spencer 17207f4d8543529221932af82836016a2ef066c917Peter Collingbourne#include "llvm/Target/TargetInstrInfo.h" 182e1cd4264d363ca869bf37ef160902f211d21b8cDouglas Gregor#include "SparcRegisterInfo.h" 19e7d07d113677a39026ff5119b8b67f6fe8ca9793Ted Kremenek 20ca1bdd7c269a2390d43c040a60511edd017ee130Douglas Gregornamespace llvm { 21fe6b2d481d91140923f4541f273b253291884214Douglas Gregor 220a0d2b179085a52c10402feebeb6db8b4d96a140Douglas Gregor/// SPII - This namespace holds all of the target specific flags that 23ad75653f81dece1c806e9c28dd7e7582c9929a27Ted Kremenek/// instruction info tracks. 24ab452ba8323d1985e08bade2bced588cddf2cc28Douglas Gregor/// 25d249e1d1f1498b81314459ceda19d6ff25c278adDouglas Gregornamespace SPII { 267532dc66648cfe7432c9fe66dec5225f0ab301c6Douglas Gregor enum { 27464175bba1318bef7905122e9fda20cff926df78Chris Lattner Pseudo = (1<<0), 2850d62d1b4a98adbc83de8f8cd1379ea1c25656f7Douglas Gregor Load = (1<<1), 29046861b912ed72bdc364d7905180ee63e5b08870Anders Carlsson Store = (1<<2), 30464175bba1318bef7905122e9fda20cff926df78Chris Lattner DelaySlot = (1<<3) 3168d331a78e655d97294e94fcfa63f92cc1f40578Steve Naroff }; 324f32786ac45210143654390177105eb749b614e9Ted Kremenek} 332cf2634ffdb4f7c8d46cef3f8e60a55993f1c57aDouglas Gregor 34432a8893f7e30d141d7f279bd00b741a3cdac81fFariborz Jahanianclass SparcInstrInfo : public TargetInstrInfoImpl { 356c2b6eb8d836da19007f7540709e16d5e39a1cbaChris Lattner const SparcRegisterInfo RI; 365f016e2cb5d11daeb237544de1c5d59f20fe1a6eReid Spencer const SparcSubtarget& Subtarget; 375f016e2cb5d11daeb237544de1c5d59f20fe1a6eReid Spencerpublic: 38b7cfe88e88cb4f46308de89cf3f0c81bfe624128Chris Lattner explicit SparcInstrInfo(SparcSubtarget &ST); 39b7cfe88e88cb4f46308de89cf3f0c81bfe624128Chris Lattner 40b7cfe88e88cb4f46308de89cf3f0c81bfe624128Chris Lattner /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As 41b7cfe88e88cb4f46308de89cf3f0c81bfe624128Chris Lattner /// such, whenever a client has an instance of instruction info, it should 425f016e2cb5d11daeb237544de1c5d59f20fe1a6eReid Spencer /// always be able to get register info as well (through this method). 43a9376d470ccb0eac74fe09a6b2a18a890f1d17c4Chris Lattner /// 44e91593ef084479340582b2ba177b44be50a717b7Daniel Dunbar virtual const SparcRegisterInfo &getRegisterInfo() const { return RI; } 455e530af5d51572a0ed5dbe50da54bd333840c63dDavid Chisnall 46bdc601b196c48d4cd56a5ceb45d41ae4e87371abKen Dyck /// Return true if the instruction is a register to register move and return 47d6471f7c1921c7802804ce3ff6fe9768310f72b9David Blaikie /// the source and dest operands and their sub-register indices by reference. 48e91593ef084479340582b2ba177b44be50a717b7Daniel Dunbar virtual bool isMoveInstr(const MachineInstr &MI, 492cf2634ffdb4f7c8d46cef3f8e60a55993f1c57aDouglas Gregor unsigned &SrcReg, unsigned &DstReg, 507b90340c9c7d07aef4e301e72b5e8a30d5f4f0c8Argyrios Kyrtzidis unsigned &SrcSubIdx, unsigned &DstSubIdx) const; 51c7229c338c21ef26b01ef3ecf9eec4fd373fa9ecChris Lattner 52e91593ef084479340582b2ba177b44be50a717b7Daniel Dunbar /// isLoadFromStackSlot - If the specified machine instruction is a direct 53e91593ef084479340582b2ba177b44be50a717b7Daniel Dunbar /// load from a stack slot, return the virtual or physical register number of 54d934112e6170b0fd940d8e40db6936cea2cdcf62Douglas Gregor /// the destination along with the FrameIndex of the loaded stack slot. If 55071cc7deffad608165b1ddd5263e8bf181861520Charles Davis /// not, return 0. This predicate must return 0 if the instruction has 56e91593ef084479340582b2ba177b44be50a717b7Daniel Dunbar /// any side effects other than loading from the stack slot. 573478eb6872d836600caf45b0f81c2065d685d6e0Ted Kremenek virtual unsigned isLoadFromStackSlot(const MachineInstr *MI, 58f53df2398e07d13be9962b95aebc19b31706fa33Anders Carlsson int &FrameIndex) const; 59f53df2398e07d13be9962b95aebc19b31706fa33Anders Carlsson 60e91593ef084479340582b2ba177b44be50a717b7Daniel Dunbar /// isStoreToStackSlot - If the specified machine instruction is a direct 610d8df780aef1acda5962347a32591efc629b6748Anders Carlsson /// store to a stack slot, return the virtual or physical register number of 6214110477887e3dc168ffc6c191e72d705051f99ePeter Collingbourne /// the source reg along with the FrameIndex of the loaded stack slot. If 630d8df780aef1acda5962347a32591efc629b6748Anders Carlsson /// not, return 0. This predicate must return 0 if the instruction has 640d8df780aef1acda5962347a32591efc629b6748Anders Carlsson /// any side effects other than storing to the stack slot. 65c56f34a1c1779de15330bdb3eec39b3418802d47Daniel Dunbar virtual unsigned isStoreToStackSlot(const MachineInstr *MI, 66e91593ef084479340582b2ba177b44be50a717b7Daniel Dunbar int &FrameIndex) const; 670c01d18094100db92d38daa923c95661512db203John McCall 68e91593ef084479340582b2ba177b44be50a717b7Daniel Dunbar 693e1274f2b99cb99c03cc8e2c6517c37d330b597aDouglas Gregor virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, 700d8df780aef1acda5962347a32591efc629b6748Anders Carlsson MachineBasicBlock *FBB, 71e91593ef084479340582b2ba177b44be50a717b7Daniel Dunbar const SmallVectorImpl<MachineOperand> &Cond) const; 72e91593ef084479340582b2ba177b44be50a717b7Daniel Dunbar 73162e1c1b487352434552147967c3dd296ebee2f7Richard Smith virtual bool copyRegToReg(MachineBasicBlock &MBB, 740d8df780aef1acda5962347a32591efc629b6748Anders Carlsson MachineBasicBlock::iterator I, 75ed97649e9574b9d854fa4d6109c9333ae0993554John McCall unsigned DestReg, unsigned SrcReg, 76eec51cf1ba5f0e62c9cdb81b5c63babdd6e649abJohn McCall const TargetRegisterClass *DestRC, 771eb4433ac451dc16f4133a88af2d002ac26c58efMike Stump const TargetRegisterClass *SrcRC, 781b63e4f732dbc73d90abf886b4d21f8e3a165f6dChris Lattner DebugLoc DL) const; 791eb4433ac451dc16f4133a88af2d002ac26c58efMike Stump 805f016e2cb5d11daeb237544de1c5d59f20fe1a6eReid Spencer virtual void storeRegToStackSlot(MachineBasicBlock &MBB, 815f016e2cb5d11daeb237544de1c5d59f20fe1a6eReid Spencer MachineBasicBlock::iterator MBBI, 824f32786ac45210143654390177105eb749b614e9Ted Kremenek unsigned SrcReg, bool isKill, int FrameIndex, 83ef99001908e799c388f1363b1e607dad5f5b57d3John McCall const TargetRegisterClass *RC, 84ef99001908e799c388f1363b1e607dad5f5b57d3John McCall const TargetRegisterInfo *TRI) const; 854ba2a17694148e16eaa8d3917f657ffcd3667be4Jay Foad 864ba2a17694148e16eaa8d3917f657ffcd3667be4Jay Foad virtual void loadRegFromStackSlot(MachineBasicBlock &MBB, 874ba2a17694148e16eaa8d3917f657ffcd3667be4Jay Foad MachineBasicBlock::iterator MBBI, 884ba2a17694148e16eaa8d3917f657ffcd3667be4Jay Foad unsigned DestReg, int FrameIndex, 894ba2a17694148e16eaa8d3917f657ffcd3667be4Jay Foad const TargetRegisterClass *RC, 904ba2a17694148e16eaa8d3917f657ffcd3667be4Jay Foad const TargetRegisterInfo *TRI) const; 914ba2a17694148e16eaa8d3917f657ffcd3667be4Jay Foad 924ba2a17694148e16eaa8d3917f657ffcd3667be4Jay Foad virtual MachineInstr* foldMemoryOperandImpl(MachineFunction &MF, 934ba2a17694148e16eaa8d3917f657ffcd3667be4Jay Foad MachineInstr* MI, 944ba2a17694148e16eaa8d3917f657ffcd3667be4Jay Foad const SmallVectorImpl<unsigned> &Ops, 954ba2a17694148e16eaa8d3917f657ffcd3667be4Jay Foad int FrameIndex) const; 964ba2a17694148e16eaa8d3917f657ffcd3667be4Jay Foad 974ba2a17694148e16eaa8d3917f657ffcd3667be4Jay Foad virtual MachineInstr* foldMemoryOperandImpl(MachineFunction &MF, 984ba2a17694148e16eaa8d3917f657ffcd3667be4Jay Foad MachineInstr* MI, 994ba2a17694148e16eaa8d3917f657ffcd3667be4Jay Foad const SmallVectorImpl<unsigned> &Ops, 1004ba2a17694148e16eaa8d3917f657ffcd3667be4Jay Foad MachineInstr* LoadMI) const { 1018026f6d82f7fa544bc0453714fe94bca62a1196eSebastian Redl return 0; 1028026f6d82f7fa544bc0453714fe94bca62a1196eSebastian Redl } 1034ba2a17694148e16eaa8d3917f657ffcd3667be4Jay Foad 1044ba2a17694148e16eaa8d3917f657ffcd3667be4Jay Foad unsigned getGlobalBaseReg(MachineFunction *MF) const; 1054ba2a17694148e16eaa8d3917f657ffcd3667be4Jay Foad}; 1064ba2a17694148e16eaa8d3917f657ffcd3667be4Jay Foad 1074ba2a17694148e16eaa8d3917f657ffcd3667be4Jay Foad} 108c3069d618f4661d923cb1b5c4525b082fce73b04Douglas Gregor 109c3069d618f4661d923cb1b5c4525b082fce73b04Douglas Gregor#endif 1104ba2a17694148e16eaa8d3917f657ffcd3667be4Jay Foad