SparcInstrInfo.h revision b5f662fa0314f7e7e690aae8ebff7136cc3a5ab0 
1//===- SparcV8InstrInfo.h - SparcV8 Instruction Information -----*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the SparcV8 implementation of the TargetInstrInfo class.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef SPARCV8INSTRUCTIONINFO_H
15#define SPARCV8INSTRUCTIONINFO_H
16
17#include "llvm/Target/TargetInstrInfo.h"
18#include "SparcV8RegisterInfo.h"
19
20namespace llvm {
21
22/// V8II - This namespace holds all of the target specific flags that
23/// instruction info tracks.
24///
25namespace V8II {
26  enum {
27    Pseudo = (1<<0),
28    Load = (1<<1),
29    Store = (1<<2),
30    DelaySlot = (1<<3)
31  };
32};
33
34class SparcV8InstrInfo : public TargetInstrInfo {
35  const SparcV8RegisterInfo RI;
36public:
37  SparcV8InstrInfo();
38
39  /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info.  As
40  /// such, whenever a client has an instance of instruction info, it should
41  /// always be able to get register info as well (through this method).
42  ///
43  virtual const MRegisterInfo &getRegisterInfo() const { return RI; }
44
45  /// Return true if the instruction is a register to register move and
46  /// leave the source and dest operands in the passed parameters.
47  ///
48  virtual bool isMoveInstr(const MachineInstr &MI,
49                           unsigned &SrcReg, unsigned &DstReg) const;
50};
51
52}
53
54#endif
55