SparcRegisterInfo.h revision 4ee451de366474b9c228b4e5fa573795a715216d
190dce4d38c5ff5333bea97d859d4e484e27edf0cTorne (Richard Coles)//===- SparcRegisterInfo.h - Sparc Register Information Impl ----*- C++ -*-===// 290dce4d38c5ff5333bea97d859d4e484e27edf0cTorne (Richard Coles)// 390dce4d38c5ff5333bea97d859d4e484e27edf0cTorne (Richard Coles)// The LLVM Compiler Infrastructure 490dce4d38c5ff5333bea97d859d4e484e27edf0cTorne (Richard Coles)// 590dce4d38c5ff5333bea97d859d4e484e27edf0cTorne (Richard Coles)// This file is distributed under the University of Illinois Open Source 690dce4d38c5ff5333bea97d859d4e484e27edf0cTorne (Richard Coles)// License. See LICENSE.TXT for details. 75d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)// 85d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)//===----------------------------------------------------------------------===// 95d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)// 1090dce4d38c5ff5333bea97d859d4e484e27edf0cTorne (Richard Coles)// This file contains the Sparc implementation of the MRegisterInfo class. 1190dce4d38c5ff5333bea97d859d4e484e27edf0cTorne (Richard Coles)// 125d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)//===----------------------------------------------------------------------===// 1390dce4d38c5ff5333bea97d859d4e484e27edf0cTorne (Richard Coles) 147dbb3d5cf0c15f500944d211057644d6a2f37371Ben Murdoch#ifndef SPARCREGISTERINFO_H 1590dce4d38c5ff5333bea97d859d4e484e27edf0cTorne (Richard Coles)#define SPARCREGISTERINFO_H 1690dce4d38c5ff5333bea97d859d4e484e27edf0cTorne (Richard Coles) 1790dce4d38c5ff5333bea97d859d4e484e27edf0cTorne (Richard Coles)#include "llvm/Target/MRegisterInfo.h" 185d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)#include "SparcGenRegisterInfo.h.inc" 195d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles) 2090dce4d38c5ff5333bea97d859d4e484e27edf0cTorne (Richard Coles)namespace llvm { 2190dce4d38c5ff5333bea97d859d4e484e27edf0cTorne (Richard Coles) 2290dce4d38c5ff5333bea97d859d4e484e27edf0cTorne (Richard Coles)class SparcSubtarget; 2390dce4d38c5ff5333bea97d859d4e484e27edf0cTorne (Richard Coles)class TargetInstrInfo; 2490dce4d38c5ff5333bea97d859d4e484e27edf0cTorne (Richard Coles)class Type; 2590dce4d38c5ff5333bea97d859d4e484e27edf0cTorne (Richard Coles) 2690dce4d38c5ff5333bea97d859d4e484e27edf0cTorne (Richard Coles)struct SparcRegisterInfo : public SparcGenRegisterInfo { 275d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles) SparcSubtarget &Subtarget; 2890dce4d38c5ff5333bea97d859d4e484e27edf0cTorne (Richard Coles) const TargetInstrInfo &TII; 295d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles) 3090dce4d38c5ff5333bea97d859d4e484e27edf0cTorne (Richard Coles) SparcRegisterInfo(SparcSubtarget &st, const TargetInstrInfo &tii); 3190dce4d38c5ff5333bea97d859d4e484e27edf0cTorne (Richard Coles) 3290dce4d38c5ff5333bea97d859d4e484e27edf0cTorne (Richard Coles) /// Code Generation virtual methods... 3390dce4d38c5ff5333bea97d859d4e484e27edf0cTorne (Richard Coles) void storeRegToStackSlot(MachineBasicBlock &MBB, 3490dce4d38c5ff5333bea97d859d4e484e27edf0cTorne (Richard Coles) MachineBasicBlock::iterator MBBI, 3590dce4d38c5ff5333bea97d859d4e484e27edf0cTorne (Richard Coles) unsigned SrcReg, bool isKill, int FrameIndex, 3690dce4d38c5ff5333bea97d859d4e484e27edf0cTorne (Richard Coles) const TargetRegisterClass *RC) const; 3790dce4d38c5ff5333bea97d859d4e484e27edf0cTorne (Richard Coles) 3890dce4d38c5ff5333bea97d859d4e484e27edf0cTorne (Richard Coles) void storeRegToAddr(MachineFunction &MF, unsigned SrcReg, bool isKill, 3990dce4d38c5ff5333bea97d859d4e484e27edf0cTorne (Richard Coles) SmallVectorImpl<MachineOperand> &Addr, 405d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles) const TargetRegisterClass *RC, 415d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles) SmallVectorImpl<MachineInstr*> &NewMIs) const; 425d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles) 435d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles) void loadRegFromStackSlot(MachineBasicBlock &MBB, 445d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles) MachineBasicBlock::iterator MBBI, 455d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles) unsigned DestReg, int FrameIndex, 465d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles) const TargetRegisterClass *RC) const; 475d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles) 485d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles) void loadRegFromAddr(MachineFunction &MF, unsigned DestReg, 495d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles) SmallVectorImpl<MachineOperand> &Addr, 505d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles) const TargetRegisterClass *RC, 515d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles) SmallVectorImpl<MachineInstr*> &NewMIs) const; 525d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles) 5390dce4d38c5ff5333bea97d859d4e484e27edf0cTorne (Richard Coles) void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, 54 unsigned DestReg, unsigned SrcReg, 55 const TargetRegisterClass *DestRC, 56 const TargetRegisterClass *SrcRC) const; 57 58 void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, 59 unsigned DestReg, const MachineInstr *Orig) const; 60 61 virtual MachineInstr* foldMemoryOperand(MachineInstr* MI, 62 SmallVectorImpl<unsigned> &Ops, 63 int FrameIndex) const; 64 65 virtual MachineInstr* foldMemoryOperand(MachineInstr* MI, 66 SmallVectorImpl<unsigned> &Ops, 67 MachineInstr* LoadMI) const { 68 return 0; 69 } 70 71 const unsigned *getCalleeSavedRegs(const MachineFunction *MF = 0) const; 72 73 const TargetRegisterClass* const* getCalleeSavedRegClasses( 74 const MachineFunction *MF = 0) const; 75 76 BitVector getReservedRegs(const MachineFunction &MF) const; 77 78 bool hasFP(const MachineFunction &MF) const; 79 80 void eliminateCallFramePseudoInstr(MachineFunction &MF, 81 MachineBasicBlock &MBB, 82 MachineBasicBlock::iterator I) const; 83 84 void eliminateFrameIndex(MachineBasicBlock::iterator II, 85 int SPAdj, RegScavenger *RS = NULL) const; 86 87 void processFunctionBeforeFrameFinalized(MachineFunction &MF) const; 88 89 void emitPrologue(MachineFunction &MF) const; 90 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const; 91 92 // Debug information queries. 93 unsigned getRARegister() const; 94 unsigned getFrameRegister(MachineFunction &MF) const; 95 96 // Exception handling queries. 97 unsigned getEHExceptionRegister() const; 98 unsigned getEHHandlerRegister() const; 99 100 int getDwarfRegNum(unsigned RegNum, bool isEH) const; 101}; 102 103} // end namespace llvm 104 105#endif 106